commit fb2ca87ca2e5a42885e5cb667dca61e2c43adca5 Author: Kaiser <706598421@qq.com> Date: Mon Sep 29 10:42:07 2025 +0800 版本管理首次远端推送 diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000..1048220 --- /dev/null +++ b/.clang-format @@ -0,0 +1,31 @@ +BasedOnStyle: LLVM + +# 强制花括号遵循 Allman 风格 +BreakBeforeBraces: Allman + +# 对齐连续的宏定义 +AlignConsecutiveMacros: AcrossEmptyLinesAndComments + +# 控制行宽，避免行太长 +ColumnLimit: 120 + +# 控制空格和标点符号风格 +SpaceBeforeParens: ControlStatements # 控制语句的括号前有空格 +SpaceBeforeAssignmentOperators: true # 赋值操作符前插入空格 + +# 缩进设置 +IndentWidth: 4 # 使用4个空格缩进 + +# 控制每行最大空行数（避免空行过多） +MaxEmptyLinesToKeep: 1 + +# 启用注释对齐，注释前保留一个空格 +AlignTrailingComments: true +SpacesBeforeTrailingComments: 1 + +# 对齐转义的换行符到左侧 +AlignEscapedNewlinesLeft: true + +# 允许将参数换行，但保持多个参数在同一行（打包参数） +AllowAllParametersOfDeclarationOnNextLine: true +BinPackParameters: true # 启用参数打包，减少换行次数 \ No newline at end of file diff --git a/.clangd b/.clangd new file mode 100644 index 0000000..50c62c4 --- /dev/null +++ b/.clangd @@ -0,0 +1,11 @@ +CompileFlags: + Add: + - '-ferror-limit=0' + - '-Wno-implicit-int' + CompilationDatabase: build/Debug +Diagnostics: + Suppress: + - unused-includes + - unknown_typename + - unknown_typename_suggest + - typename_requires_specqual diff --git a/Inc/FreeRTOSConfig.h b/Inc/FreeRTOSConfig.h new file mode 100644 index 0000000..684cf03 --- /dev/null +++ b/Inc/FreeRTOSConfig.h @@ -0,0 +1,170 @@ +/* USER CODE BEGIN Header */ +/* + * FreeRTOS Kernel V10.3.1 + * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ +/* USER CODE END Header */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * These parameters and more are described within the 'configuration' section of the + * FreeRTOS API documentation available on the FreeRTOS.org web site. + * + * See http://www.freertos.org/a00110.html + *----------------------------------------------------------*/ + +/* USER CODE BEGIN Includes */ +/* Section where include file can be added */ +/* USER CODE END Includes */ + +/* Ensure definitions are only used by the compiler, and not by the assembler. */ +#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) + #include + extern uint32_t SystemCoreClock; +#endif +#ifndef CMSIS_device_header +#define CMSIS_device_header "stm32h7xx.h" +#endif /* CMSIS_device_header */ + +#define configENABLE_FPU 0 +#define configENABLE_MPU 0 + +#define configUSE_PREEMPTION 1 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( SystemCoreClock ) +#define configTICK_RATE_HZ ((TickType_t)1000) +#define configMAX_PRIORITIES ( 56 ) +#define configMINIMAL_STACK_SIZE ((uint16_t)256) +#define configTOTAL_HEAP_SIZE ((size_t)20480) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configUSE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 8 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */ +/* Defaults to size_t for backward compatibility, but can be changed + if lengths will always be less than the number of bytes in a size_t. */ +#define configMESSAGE_BUFFER_LENGTH_TYPE size_t +/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */ + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( 2 ) +#define configTIMER_QUEUE_LENGTH 10 +#define configTIMER_TASK_STACK_DEPTH 256 + +/* CMSIS-RTOS V2 flags */ +#define configUSE_OS2_THREAD_SUSPEND_RESUME 1 +#define configUSE_OS2_THREAD_ENUMERATE 1 +#define configUSE_OS2_EVENTFLAGS_FROM_ISR 1 +#define configUSE_OS2_THREAD_FLAGS 1 +#define configUSE_OS2_TIMER 1 +#define configUSE_OS2_MUTEX 1 + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xQueueGetMutexHolder 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_eTaskGetState 1 + +/* + * The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used + * by the application thus the correct define need to be enabled below + */ +#define USE_FreeRTOS_HEAP_4 + +/* Cortex-M specific definitions. */ +#ifdef __NVIC_PRIO_BITS + /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ + #define configPRIO_BITS __NVIC_PRIO_BITS +#else + #define configPRIO_BITS 4 +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15 + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) + +/* Normal assert() semantics without relying on the provision of an assert.h +header file. */ +/* USER CODE BEGIN 1 */ +#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );} +/* USER CODE END 1 */ + +/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +standard names. */ +#define vPortSVCHandler SVC_Handler +#define xPortPendSVHandler PendSV_Handler + +/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */ + +#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0 + +/* USER CODE BEGIN Defines */ +/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */ +/* USER CODE END Defines */ + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Inc/main.h b/Inc/main.h new file mode 100644 index 0000000..d643f55 --- /dev/null +++ b/Inc/main.h @@ -0,0 +1,84 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32h7xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ +struct uCommunication +{ + uint16_t Deep; + uint8_t Gain; + uint8_t ChannelNum; + uint8_t MeasurementPrecision; + float MeasurementResult; + _Bool MeasurementFlag; + _Bool SingelStrengthMeasurementFlag; + float BatteryVoltage; + float BatteryCurrent; +}; +extern struct uCommunication CommunicationData; +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/Inc/stm32h7xx_hal_conf.h b/Inc/stm32h7xx_hal_conf.h new file mode 100644 index 0000000..aa97ca0 --- /dev/null +++ b/Inc/stm32h7xx_hal_conf.h @@ -0,0 +1,514 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32H7xx_HAL_CONF_H +#define STM32H7xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + + #define HAL_ADC_MODULE_ENABLED +/* #define HAL_FDCAN_MODULE_ENABLED */ +/* #define HAL_FMAC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CORDIC_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_ETH_LEGACY_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_OTFDEC_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HRTIM_MODULE_ENABLED */ +/* #define HAL_HSEM_MODULE_ENABLED */ +/* #define HAL_GFXMMU_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_OPAMP_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_RAMECC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_SPI_MODULE_ENABLED */ +/* #define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_MDIOS_MODULE_ENABLED */ +/* #define HAL_PSSI_MODULE_ENABLED */ +/* #define HAL_DTS_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_MDMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_HSEM_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal oscillator (CSI) default value. + * This value is the default CSI value after Reset. + */ +#if !defined (CSI_VALUE) + #define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */ +#define USE_RTOS 0 +#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ +#define USE_SPI_CRC 0U /*!< use CRC in SPI */ + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ +#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################### Ethernet Configuration ######################### */ +#define ETH_TX_DESC_CNT 4U /* number of Ethernet Tx DMA descriptors */ +#define ETH_RX_DESC_CNT 4U /* number of Ethernet Rx DMA descriptors */ + +#define ETH_MAC_ADDR0 (0x02UL) +#define ETH_MAC_ADDR1 (0x00UL) +#define ETH_MAC_ADDR2 (0x00UL) +#define ETH_MAC_ADDR3 (0x00UL) +#define ETH_MAC_ADDR4 (0x00UL) +#define ETH_MAC_ADDR5 (0x00UL) + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32h7xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32h7xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32h7xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_MDMA_MODULE_ENABLED + #include "stm32h7xx_hal_mdma.h" +#endif /* HAL_MDMA_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32h7xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32h7xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32h7xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32h7xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32h7xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_DTS_MODULE_ENABLED + #include "stm32h7xx_hal_dts.h" +#endif /* HAL_DTS_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32h7xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_ETH_LEGACY_MODULE_ENABLED + #include "stm32h7xx_hal_eth_legacy.h" +#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32h7xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32h7xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32h7xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED + #include "stm32h7xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32h7xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32h7xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED + #include "stm32h7xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32h7xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32h7xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32h7xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32h7xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32h7xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED + #include "stm32h7xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED + #include "stm32h7xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_HSEM_MODULE_ENABLED + #include "stm32h7xx_hal_hsem.h" +#endif /* HAL_HSEM_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32h7xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32h7xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32h7xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32h7xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32h7xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_JPEG_MODULE_ENABLED + #include "stm32h7xx_hal_jpeg.h" +#endif /* HAL_JPEG_MODULE_ENABLED */ + +#ifdef HAL_MDIOS_MODULE_ENABLED + #include "stm32h7xx_hal_mdios.h" +#endif /* HAL_MDIOS_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32h7xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32h7xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32h7xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32h7xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32h7xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED +#include "stm32h7xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32h7xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32h7xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32h7xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RAMECC_MODULE_ENABLED + #include "stm32h7xx_hal_ramecc.h" +#endif /* HAL_RAMECC_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32h7xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32h7xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32h7xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32h7xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32h7xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32h7xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32h7xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32h7xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32h7xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32h7xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32h7xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32h7xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32h7xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32h7xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32h7xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32h7xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32H7xx_HAL_CONF_H */ diff --git a/Inc/stm32h7xx_it.h b/Inc/stm32h7xx_it.h new file mode 100644 index 0000000..af6e755 --- /dev/null +++ b/Inc/stm32h7xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32H7xx_IT_H +#define __STM32H7xx_IT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void DebugMon_Handler(void); +void DMA1_Stream5_IRQHandler(void); +void USART1_IRQHandler(void); +void TIM7_IRQHandler(void); +void OTG_FS_IRQHandler(void); +void DMAMUX2_OVR_IRQHandler(void); +void BDMA_Channel0_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32H7xx_IT_H */ diff --git a/Inc/usb_device.h b/Inc/usb_device.h new file mode 100644 index 0000000..7bba362 --- /dev/null +++ b/Inc/usb_device.h @@ -0,0 +1,102 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usb_device.h + * @version : v1.0_Cube + * @brief : Header for usb_device.c file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_DEVICE__H__ +#define __USB_DEVICE__H__ + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32h7xx.h" +#include "stm32h7xx_hal.h" +#include "usbd_def.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/** @addtogroup USBD_OTG_DRIVER + * @{ + */ + +/** @defgroup USBD_DEVICE USBD_DEVICE + * @brief Device file for Usb otg low level driver. + * @{ + */ + +/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables + * @brief Public variables. + * @{ + */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* + * -- Insert your variables declaration here -- + */ +/* USER CODE BEGIN VARIABLES */ + +/* USER CODE END VARIABLES */ +/** + * @} + */ + +/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype + * @brief Declaration of public functions for Usb device. + * @{ + */ + +/** USB Device initialization function. */ +void MX_USB_DEVICE_Init(void); + +/* + * -- Insert functions declaration here -- + */ +/* USER CODE BEGIN FD */ + +/* USER CODE END FD */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USB_DEVICE__H__ */ diff --git a/Inc/usbd_cdc_if.h b/Inc/usbd_cdc_if.h new file mode 100644 index 0000000..f74a220 --- /dev/null +++ b/Inc/usbd_cdc_if.h @@ -0,0 +1,132 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_cdc_if.h + * @version : v1.0_Cube + * @brief : Header for usbd_cdc_if.c file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ + +#ifndef __USBD_CDC_IF_H__ +#define __USBD_CDC_IF_H__ + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_cdc.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY + * @brief For Usb device. + * @{ + */ + +/** @defgroup USBD_CDC_IF USBD_CDC_IF + * @brief Usb VCP device module + * @{ + */ + +/** @defgroup USBD_CDC_IF_Exported_Defines USBD_CDC_IF_Exported_Defines + * @brief Defines. + * @{ + */ +/* Define size for the receive and transmit buffer over CDC */ +#define APP_RX_DATA_SIZE 2048 +#define APP_TX_DATA_SIZE 2048 +/* USER CODE BEGIN EXPORTED_DEFINES */ + +/* USER CODE END EXPORTED_DEFINES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Exported_Types USBD_CDC_IF_Exported_Types + * @brief Types. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_TYPES */ + +/* USER CODE END EXPORTED_TYPES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Exported_Macros USBD_CDC_IF_Exported_Macros + * @brief Aliases. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_MACRO */ + +/* USER CODE END EXPORTED_MACRO */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables + * @brief Public variables. + * @{ + */ + +/** CDC Interface callback. */ +extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS; + +/* USER CODE BEGIN EXPORTED_VARIABLES */ + +/* USER CODE END EXPORTED_VARIABLES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype USBD_CDC_IF_Exported_FunctionsPrototype + * @brief Public functions declaration. + * @{ + */ + +uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); + +/* USER CODE BEGIN EXPORTED_FUNCTIONS */ + +/* USER CODE END EXPORTED_FUNCTIONS */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBD_CDC_IF_H__ */ + diff --git a/Inc/usbd_conf.h b/Inc/usbd_conf.h new file mode 100644 index 0000000..00effc8 --- /dev/null +++ b/Inc/usbd_conf.h @@ -0,0 +1,173 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_conf.h + * @version : v1.0_Cube + * @brief : Header for usbd_conf.c file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USBD_CONF__H__ +#define __USBD_CONF__H__ + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include +#include +#include +#include "main.h" +#include "stm32h7xx.h" +#include "stm32h7xx_hal.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/** @addtogroup USBD_OTG_DRIVER + * @brief Driver for Usb device. + * @{ + */ + +/** @defgroup USBD_CONF USBD_CONF + * @brief Configuration file for Usb otg low level driver. + * @{ + */ + +/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables + * @brief Public variables. + * @{ + */ + +/** + * @} + */ + +/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines + * @brief Defines for configuration of the Usb device. + * @{ + */ + +/*---------- -----------*/ +#define USBD_MAX_NUM_INTERFACES 1U +/*---------- -----------*/ +#define USBD_MAX_NUM_CONFIGURATION 1U +/*---------- -----------*/ +#define USBD_MAX_STR_DESC_SIZ 512U +/*---------- -----------*/ +#define USBD_DEBUG_LEVEL 0U +/*---------- -----------*/ +#define USBD_LPM_ENABLED 1U +/*---------- -----------*/ +#define USBD_SELF_POWERED 1U + +/****************************************/ +/* #define for FS and HS identification */ +#define DEVICE_FS 0 +#define DEVICE_HS 1 + +/** + * @} + */ + +/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros + * @brief Aliases. + * @{ + */ +/* Memory management macros make sure to use static memory allocation */ +/** Alias for memory allocation. */ + +#define USBD_malloc (void *)USBD_static_malloc + +/** Alias for memory release. */ +#define USBD_free USBD_static_free + +/** Alias for memory set. */ +#define USBD_memset memset + +/** Alias for memory copy. */ +#define USBD_memcpy memcpy + +/** Alias for delay. */ +#define USBD_Delay HAL_Delay + +/* DEBUG macros */ + +#if (USBD_DEBUG_LEVEL > 0) +#define USBD_UsrLog(...) printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_UsrLog(...) +#endif /* (USBD_DEBUG_LEVEL > 0U) */ + +#if (USBD_DEBUG_LEVEL > 1) + +#define USBD_ErrLog(...) printf("ERROR: ");\ + printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_ErrLog(...) +#endif /* (USBD_DEBUG_LEVEL > 1U) */ + +#if (USBD_DEBUG_LEVEL > 2) +#define USBD_DbgLog(...) printf("DEBUG : ");\ + printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_DbgLog(...) +#endif /* (USBD_DEBUG_LEVEL > 2U) */ + +/** + * @} + */ + +/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types + * @brief Types. + * @{ + */ + +/** + * @} + */ + +/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype + * @brief Declaration of public functions for Usb device. + * @{ + */ + +/* Exported functions -------------------------------------------------------*/ +void *USBD_static_malloc(uint32_t size); +void USBD_static_free(void *p); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBD_CONF__H__ */ + diff --git a/Inc/usbd_desc.h b/Inc/usbd_desc.h new file mode 100644 index 0000000..0146169 --- /dev/null +++ b/Inc/usbd_desc.h @@ -0,0 +1,143 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_desc.c + * @version : v1.0_Cube + * @brief : Header for usbd_conf.c file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USBD_DESC__C__ +#define __USBD_DESC__C__ + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_def.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY + * @{ + */ + +/** @defgroup USBD_DESC USBD_DESC + * @brief Usb device descriptors module. + * @{ + */ + +/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants + * @brief Constants. + * @{ + */ +#define DEVICE_ID1 (UID_BASE) +#define DEVICE_ID2 (UID_BASE + 0x4) +#define DEVICE_ID3 (UID_BASE + 0x8) + +#define USB_SIZ_STRING_SERIAL 0x1A + +/* USER CODE BEGIN EXPORTED_CONSTANTS */ + +/* USER CODE END EXPORTED_CONSTANTS */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines + * @brief Defines. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_DEFINES */ + +/* USER CODE END EXPORTED_DEFINES */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions + * @brief Types. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_TYPES */ + +/* USER CODE END EXPORTED_TYPES */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros + * @brief Aliases. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_MACRO */ + +/* USER CODE END EXPORTED_MACRO */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables + * @brief Public variables. + * @{ + */ + +/** Descriptor for the Usb device. */ +extern USBD_DescriptorsTypeDef FS_Desc; + +/* USER CODE BEGIN EXPORTED_VARIABLES */ + +/* USER CODE END EXPORTED_VARIABLES */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype + * @brief Public functions declaration. + * @{ + */ + +/* USER CODE BEGIN EXPORTED_FUNCTIONS */ + +/* USER CODE END EXPORTED_FUNCTIONS */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBD_DESC__C__ */ + diff --git a/MDK-ARM/RTE/_WTZS32-2/RTE_Components.h b/MDK-ARM/RTE/_WTZS32-2/RTE_Components.h new file mode 100644 index 0000000..fa4a6b0 --- /dev/null +++ b/MDK-ARM/RTE/_WTZS32-2/RTE_Components.h @@ -0,0 +1,14 @@ +/* + * UVISION generated file: DO NOT EDIT! + * Generated by: uVision version 5.42.0.0 + * + * Project: 'WTZS32-2' + * Target: 'WTZS32-2' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/MDK-ARM/RTE/_WTZS32V2/RTE_Components.h b/MDK-ARM/RTE/_WTZS32V2/RTE_Components.h new file mode 100644 index 0000000..9944f68 --- /dev/null +++ b/MDK-ARM/RTE/_WTZS32V2/RTE_Components.h @@ -0,0 +1,20 @@ +/* + * UVISION generated file: DO NOT EDIT! + * Generated by: uVision version 5.40.0.0 + * + * Project: 'WTZS32V2' + * Target: 'WTZS32V2' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "stm32h7xx.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/MDK-ARM/WTZS32-2.uvprojx b/MDK-ARM/WTZS32-2.uvprojx new file mode 100644 index 0000000..2bd9b6c --- /dev/null +++ b/MDK-ARM/WTZS32-2.uvprojx @@ -0,0 +1,2895 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + WTZS32-2 + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7 + 5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7 + 0 + + + STM32H750IBTx + STMicroelectronics + Keil.STM32H7xx_DFP.4.1.0 + https://www.keil.com/pack/ + IRAM(0x20000000-0x2001FFFF) IRAM2(0x24000000-0x2407FFFF) IROM(0x8000000-0x801FFFF) CLOCK(12000000) FPU3(DFPU) CPUTYPE("Cortex-M7") ELITTLE + + + + + + + + + + + + + + + $$Device:STM32H750IBTx$CMSIS\SVD\STM32H750.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + WTZS32-2\ + WTZS32-2 + 1 + 0 + 1 + 1 + 1 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 1 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4101 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 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../Inc;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Inc;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/include;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Core/Inc;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/CMSIS/Device/ST/STM32H7xx/Include;C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/CMSIS/Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 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+:10E8B0000F120E120D120C1A0BCE120912081207AB +:10E8C00012061205120412032A02DA14389C1C2CB8 +:0CE8D00090D003E4027F101AAA0181001E +:040000050800029954 +:00000001FF diff --git a/MDK-ARM/WTZS32-2/WTZS32-2.map b/MDK-ARM/WTZS32-2/WTZS32-2.map new file mode 100644 index 0000000..d85f406 --- /dev/null +++ b/MDK-ARM/WTZS32-2/WTZS32-2.map @@ -0,0 +1,5270 @@ +Component: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601] + +============================================================================== + +Section Cross References + + startup_stm32h750xx.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32h750xx.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32h750xx.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32h750xx.o(RESET) refers to startup_stm32h750xx.o(STACK) for __initial_sp + startup_stm32h750xx.o(RESET) refers to startup_stm32h750xx.o(.text) for Reset_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.NMI_Handler) for NMI_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.HardFault_Handler) for HardFault_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.MemManage_Handler) for MemManage_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.BusFault_Handler) for BusFault_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.UsageFault_Handler) for UsageFault_Handler + startup_stm32h750xx.o(RESET) refers to port.o(.emb_text) for SVC_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.DebugMon_Handler) for DebugMon_Handler + startup_stm32h750xx.o(RESET) refers to cmsis_os2.o(i.SysTick_Handler) for SysTick_Handler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.DMA1_Stream5_IRQHandler) for DMA1_Stream5_IRQHandler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.USART1_IRQHandler) for USART1_IRQHandler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.TIM7_IRQHandler) for TIM7_IRQHandler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.OTG_FS_IRQHandler) for OTG_FS_IRQHandler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.DMAMUX2_OVR_IRQHandler) for DMAMUX2_OVR_IRQHandler + startup_stm32h750xx.o(RESET) refers to stm32h7xx_it.o(i.BDMA_Channel0_IRQHandler) for BDMA_Channel0_IRQHandler + startup_stm32h750xx.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_stm32h750xx.o(.text) refers to system_stm32h7xx.o(i.SystemInit) for SystemInit + startup_stm32h750xx.o(.text) refers to __main.o(!!!main) for __main + startup_stm32h750xx.o(.text) refers to startup_stm32h750xx.o(HEAP) for Heap_Mem + startup_stm32h750xx.o(.text) refers to startup_stm32h750xx.o(STACK) for Stack_Mem + communicaion.o(i.Command_AddReadIndex) refers to communicaion.o(.data) for .data + communicaion.o(i.Command_Deal) refers to cmsis_os2.o(i.osSemaphoreAcquire) for osSemaphoreAcquire + communicaion.o(i.Command_Deal) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + communicaion.o(i.Command_Deal) refers to communicaion.o(i.Command_GetCommand) for Command_GetCommand + communicaion.o(i.Command_Deal) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + communicaion.o(i.Command_Deal) refers to cmsis_os2.o(i.osDelay) for osDelay + communicaion.o(i.Command_Deal) refers to main.o(i.CLKHZSET) for CLKHZSET + communicaion.o(i.Command_Deal) refers to communicaion.o(i.FramePack) for FramePack + communicaion.o(i.Command_Deal) refers to stm32h7xx_hal_uart.o(i.HAL_UART_Transmit) for HAL_UART_Transmit + communicaion.o(i.Command_Deal) refers to stm32h7xx_hal_uart.o(i.HAL_UART_GetState) for HAL_UART_GetState + communicaion.o(i.Command_Deal) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) for HAL_UARTEx_ReceiveToIdle_DMA + communicaion.o(i.Command_Deal) refers to main.o(.data) for Command_Semaphore + communicaion.o(i.Command_Deal) refers to communicaion.o(.bss) for .bss + communicaion.o(i.Command_Deal) refers to communicaion.o(.data) for .data + communicaion.o(i.Command_Deal) refers to main.o(.bss) for LineCheckF + communicaion.o(i.Command_GetCommand) refers to communicaion.o(i.Command_Read) for Command_Read + communicaion.o(i.Command_GetCommand) refers to communicaion.o(i.Command_AddReadIndex) for Command_AddReadIndex + communicaion.o(i.Command_GetCommand) refers to communicaion.o(i.Command_GetLength) for Command_GetLength + communicaion.o(i.Command_GetCommand) refers to communicaion.o(.data) for .data + communicaion.o(i.Command_GetLength) refers to communicaion.o(.data) for .data + communicaion.o(i.Command_GetRemain) refers to communicaion.o(i.Command_GetLength) for Command_GetLength + communicaion.o(i.Command_Read) refers to communicaion.o(.bss) for .bss + communicaion.o(i.Command_Write) refers to communicaion.o(i.Command_GetRemain) for Command_GetRemain + communicaion.o(i.Command_Write) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + communicaion.o(i.Command_Write) refers to communicaion.o(.data) for .data + communicaion.o(i.Command_Write) refers to communicaion.o(.bss) for .bss + communicaion.o(i.FramePack) refers to rt_memclr.o(.text) for __aeabi_memclr + main.o(i.CLKHZSET) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 + main.o(i.CLKHZSET) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + main.o(i.CLKHZSET) refers to main.o(.data) for .data + main.o(i.CLKHZSET) refers to main.o(.constdata) for .constdata + main.o(i.ChannelSelect) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.CheckMaxV) refers to main.o(.data) for .data + main.o(i.Clk_Set) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) for HAL_TIM_PWM_Stop + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + main.o(i.Clk_Set) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) for HAL_TIM_ConfigClockSource + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) for HAL_TIM_PWM_Init + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) for HAL_TIMEx_MasterConfigSynchronization + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) for HAL_TIM_PWM_ConfigChannel + main.o(i.Clk_Set) refers to stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) for HAL_TIM_MspPostInit + main.o(i.Clk_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) for HAL_TIM_PWM_Start + main.o(i.Clk_Set) refers to main.o(.bss) for .bss + main.o(i.CommunicationResponse) refers to cmsis_os2.o(i.osSemaphoreAcquire) for osSemaphoreAcquire + main.o(i.CommunicationResponse) refers to main.o(i.SampleRate_Set) for SampleRate_Set + main.o(i.CommunicationResponse) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) for HAL_TIM_PWM_Start + main.o(i.CommunicationResponse) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) for HAL_TIM_PWM_Stop + main.o(i.CommunicationResponse) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) for HAL_ADC_Stop_DMA + main.o(i.CommunicationResponse) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) for HAL_ADC_Start_DMA + main.o(i.CommunicationResponse) refers to main.o(i.ChannelSelect) for ChannelSelect + main.o(i.CommunicationResponse) refers to main.o(i.Clk_Set) for Clk_Set + main.o(i.CommunicationResponse) refers to cmsis_os2.o(i.osDelay) for osDelay + main.o(i.CommunicationResponse) refers to main.o(i.SlopeSet) for SlopeSet + main.o(i.CommunicationResponse) refers to main.o(i.calculateAverage) for calculateAverage + main.o(i.CommunicationResponse) refers to pow.o(i.__hardfp_pow) for __hardfp_pow + main.o(i.CommunicationResponse) refers to main.o(i.FindMaxValue) for FindMaxValue + main.o(i.CommunicationResponse) refers to main.o(.data) for .data + main.o(i.CommunicationResponse) refers to communicaion.o(.bss) for CommunicationData + main.o(i.CommunicationResponse) refers to main.o(.bss) for .bss + main.o(i.CommunicationResponse) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.CommunicationResponse) refers to main.o(i.LineCheck) for LineCheck + main.o(i.HAL_ADC_ConvCpltCallback) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Init) for HAL_DMA_Init + main.o(i.HAL_ADC_ConvCpltCallback) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.HAL_ADC_ConvCpltCallback) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start) for HAL_DMA_Start + main.o(i.HAL_ADC_ConvCpltCallback) refers to main.o(.bss) for .bss + main.o(i.HAL_ADC_ConvCpltCallback) refers to main.o(.data) for .data + main.o(i.HAL_ADC_ConvHalfCpltCallback) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Init) for HAL_DMA_Init + main.o(i.HAL_ADC_ConvHalfCpltCallback) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.HAL_ADC_ConvHalfCpltCallback) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start) for HAL_DMA_Start + main.o(i.HAL_ADC_ConvHalfCpltCallback) refers to main.o(.bss) for .bss + main.o(i.HAL_ADC_ConvHalfCpltCallback) refers to main.o(.data) for .data + main.o(i.HAL_TIM_PeriodElapsedCallback) refers to stm32h7xx_hal.o(i.HAL_IncTick) for HAL_IncTick + main.o(i.HAL_UARTEx_RxEventCallback) refers to communicaion.o(i.Command_Write) for Command_Write + main.o(i.HAL_UARTEx_RxEventCallback) refers to cmsis_os2.o(i.osSemaphoreRelease) for osSemaphoreRelease + main.o(i.HAL_UARTEx_RxEventCallback) refers to main.o(.bss) for .bss + main.o(i.HAL_UARTEx_RxEventCallback) refers to main.o(.data) for .data + main.o(i.LOWPower) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.LOWPower) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply) for HAL_PWREx_ConfigSupply + main.o(i.LOWPower) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) for HAL_RCC_OscConfig + main.o(i.LOWPower) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.LOWPower) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) for HAL_RCC_ClockConfig + main.o(i.LOWPower) refers to main.o(i.MX_USART1_UART_Init) for MX_USART1_UART_Init + main.o(i.LineCheck) refers to main.o(i.SampleRate_Set) for SampleRate_Set + main.o(i.LineCheck) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) for HAL_TIM_PWM_Start + main.o(i.LineCheck) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.LineCheck) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) for HAL_ADC_Stop_DMA + main.o(i.LineCheck) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) for HAL_ADC_Start_DMA + main.o(i.LineCheck) refers to main.o(i.ChannelSelect) for ChannelSelect + main.o(i.LineCheck) refers to cmsis_os2.o(i.osDelay) for osDelay + main.o(i.LineCheck) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) for HAL_TIM_PWM_Stop + main.o(i.LineCheck) refers to main.o(i.calculateAverage) for calculateAverage + main.o(i.LineCheck) refers to communicaion.o(.bss) for CommunicationData + main.o(i.LineCheck) refers to main.o(.bss) for .bss + main.o(i.LineCheck) refers to main.o(.data) for .data + main.o(i.MX_ADC3_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.MX_ADC3_Init) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Init) for HAL_ADC_Init + main.o(i.MX_ADC3_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_ADC3_Init) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) for HAL_ADC_ConfigChannel + main.o(i.MX_ADC3_Init) refers to main.o(.bss) for .bss + main.o(i.MX_BDMA_Init) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + main.o(i.MX_BDMA_Init) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) for HAL_NVIC_EnableIRQ + main.o(i.MX_DMA_Init) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Init) for HAL_DMA_Init + main.o(i.MX_DMA_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_DMA_Init) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + main.o(i.MX_DMA_Init) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) for HAL_NVIC_EnableIRQ + main.o(i.MX_DMA_Init) refers to main.o(.bss) for .bss + main.o(i.MX_GPIO_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.MX_GPIO_Init) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.MX_GPIO_Init) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + main.o(i.MX_TIM1_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + main.o(i.MX_TIM1_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) for HAL_TIM_ConfigClockSource + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) for HAL_TIM_PWM_Init + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) for HAL_TIMEx_MasterConfigSynchronization + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) for HAL_TIM_PWM_ConfigChannel + main.o(i.MX_TIM1_Init) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakDeadTime) for HAL_TIMEx_ConfigBreakDeadTime + main.o(i.MX_TIM1_Init) refers to main.o(.bss) for .bss + main.o(i.MX_TIM2_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + main.o(i.MX_TIM2_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) for HAL_TIM_ConfigClockSource + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) for HAL_TIM_PWM_Init + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) for HAL_TIMEx_MasterConfigSynchronization + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) for HAL_TIM_PWM_ConfigChannel + main.o(i.MX_TIM2_Init) refers to stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) for HAL_TIM_MspPostInit + main.o(i.MX_TIM2_Init) refers to main.o(.bss) for .bss + main.o(i.MX_TIM4_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.MX_TIM4_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + main.o(i.MX_TIM4_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_TIM4_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) for HAL_TIM_ConfigClockSource + main.o(i.MX_TIM4_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) for HAL_TIM_PWM_Init + main.o(i.MX_TIM4_Init) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) for HAL_TIMEx_MasterConfigSynchronization + main.o(i.MX_TIM4_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) for HAL_TIM_PWM_ConfigChannel + main.o(i.MX_TIM4_Init) refers to main.o(.bss) for .bss + main.o(i.MX_USART1_UART_Init) refers to stm32h7xx_hal_uart.o(i.HAL_UART_Init) for HAL_UART_Init + main.o(i.MX_USART1_UART_Init) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.MX_USART1_UART_Init) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold) for HAL_UARTEx_SetTxFifoThreshold + main.o(i.MX_USART1_UART_Init) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold) for HAL_UARTEx_SetRxFifoThreshold + main.o(i.MX_USART1_UART_Init) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableFifoMode) for HAL_UARTEx_DisableFifoMode + main.o(i.MX_USART1_UART_Init) refers to main.o(.bss) for .bss + main.o(i.SampleRate_Set) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.SampleRate_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + main.o(i.SampleRate_Set) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.SampleRate_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) for HAL_TIM_ConfigClockSource + main.o(i.SampleRate_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) for HAL_TIM_PWM_Init + main.o(i.SampleRate_Set) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) for HAL_TIMEx_MasterConfigSynchronization + main.o(i.SampleRate_Set) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) for HAL_TIM_PWM_ConfigChannel + main.o(i.SampleRate_Set) refers to main.o(.bss) for .bss + main.o(i.SlopeSet) refers to cmsis_os2.o(i.osDelay) for osDelay + main.o(i.SlopeSet) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.StartDefaultTask) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.StartDefaultTask) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) for HAL_TIM_PWM_Stop + main.o(i.StartDefaultTask) refers to main.o(i.SlopeSet) for SlopeSet + main.o(i.StartDefaultTask) refers to main.o(i.Clk_Set) for Clk_Set + main.o(i.StartDefaultTask) refers to cmsis_os2.o(i.osDelay) for osDelay + main.o(i.StartDefaultTask) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_Start) for HAL_ADCEx_Calibration_Start + main.o(i.StartDefaultTask) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) for HAL_ADC_Start_DMA + main.o(i.StartDefaultTask) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) for HAL_UARTEx_ReceiveToIdle_DMA + main.o(i.StartDefaultTask) refers to cmsis_os2.o(i.osSemaphoreNew) for osSemaphoreNew + main.o(i.StartDefaultTask) refers to cmsis_os2.o(i.osThreadNew) for osThreadNew + main.o(i.StartDefaultTask) refers to communicaion.o(i.Command_Deal) for Command_Deal + main.o(i.StartDefaultTask) refers to cmsis_os2.o(i.osSemaphoreRelease) for osSemaphoreRelease + main.o(i.StartDefaultTask) refers to communicaion.o(.bss) for CommunicationData + main.o(i.StartDefaultTask) refers to main.o(.bss) for .bss + main.o(i.StartDefaultTask) refers to main.o(.data) for .data + main.o(i.StartDefaultTask) refers to main.o(.constdata) for .constdata + main.o(i.StartDefaultTask) refers to main.o(i.CommunicationResponse) for CommunicationResponse + main.o(i.SystemClock_Config) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + main.o(i.SystemClock_Config) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply) for HAL_PWREx_ConfigSupply + main.o(i.SystemClock_Config) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) for HAL_RCC_OscConfig + main.o(i.SystemClock_Config) refers to main.o(i.Error_Handler) for Error_Handler + main.o(i.SystemClock_Config) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) for HAL_RCC_ClockConfig + main.o(i.main) refers to stm32h7xx_hal.o(i.HAL_Init) for HAL_Init + main.o(i.main) refers to main.o(i.SystemClock_Config) for SystemClock_Config + main.o(i.main) refers to main.o(i.MX_GPIO_Init) for MX_GPIO_Init + main.o(i.main) refers to main.o(i.MX_BDMA_Init) for MX_BDMA_Init + main.o(i.main) refers to main.o(i.MX_DMA_Init) for MX_DMA_Init + main.o(i.main) refers to main.o(i.MX_ADC3_Init) for MX_ADC3_Init + main.o(i.main) refers to main.o(i.MX_USART1_UART_Init) for MX_USART1_UART_Init + main.o(i.main) refers to main.o(i.MX_TIM2_Init) for MX_TIM2_Init + main.o(i.main) refers to main.o(i.MX_TIM1_Init) for MX_TIM1_Init + main.o(i.main) refers to main.o(i.MX_TIM4_Init) for MX_TIM4_Init + main.o(i.main) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) for HAL_GPIO_WritePin + main.o(i.main) refers to cmsis_os2.o(i.osKernelInitialize) for osKernelInitialize + main.o(i.main) refers to cmsis_os2.o(i.osThreadNew) for osThreadNew + main.o(i.main) refers to cmsis_os2.o(i.osKernelStart) for osKernelStart + main.o(i.main) refers to main.o(.constdata) for .constdata + main.o(i.main) refers to main.o(i.StartDefaultTask) for StartDefaultTask + main.o(i.main) refers to main.o(.data) for .data + main.o(.constdata) refers to main.o(.conststring) for .conststring + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_core.o(i.USBD_Init) for USBD_Init + usb_device.o(i.MX_USB_DEVICE_Init) refers to main.o(i.Error_Handler) for Error_Handler + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_core.o(i.USBD_RegisterClass) for USBD_RegisterClass + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_cdc.o(i.USBD_CDC_RegisterInterface) for USBD_CDC_RegisterInterface + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_core.o(i.USBD_Start) for USBD_Start + usb_device.o(i.MX_USB_DEVICE_Init) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableUSBVoltageDetector) for HAL_PWREx_EnableUSBVoltageDetector + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_desc.o(.data) for FS_Desc + usb_device.o(i.MX_USB_DEVICE_Init) refers to usb_device.o(.bss) for .bss + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_cdc.o(.data) for USBD_CDC + usb_device.o(i.MX_USB_DEVICE_Init) refers to usbd_cdc_if.o(.data) for USBD_Interface_fops_FS + usbd_conf.o(i.HAL_PCD_ConnectCallback) refers to usbd_core.o(i.USBD_LL_DevConnected) for USBD_LL_DevConnected + usbd_conf.o(i.HAL_PCD_DataInStageCallback) refers to usbd_core.o(i.USBD_LL_DataInStage) for USBD_LL_DataInStage + usbd_conf.o(i.HAL_PCD_DataOutStageCallback) refers to usbd_core.o(i.USBD_LL_DataOutStage) for USBD_LL_DataOutStage + usbd_conf.o(i.HAL_PCD_DisconnectCallback) refers to usbd_core.o(i.USBD_LL_DevDisconnected) for USBD_LL_DevDisconnected + usbd_conf.o(i.HAL_PCD_ISOINIncompleteCallback) refers to usbd_core.o(i.USBD_LL_IsoINIncomplete) for USBD_LL_IsoINIncomplete + usbd_conf.o(i.HAL_PCD_ISOOUTIncompleteCallback) refers to usbd_core.o(i.USBD_LL_IsoOUTIncomplete) for USBD_LL_IsoOUTIncomplete + usbd_conf.o(i.HAL_PCD_MspDeInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_DeInit) for HAL_GPIO_DeInit + usbd_conf.o(i.HAL_PCD_MspDeInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_DisableIRQ) for HAL_NVIC_DisableIRQ + usbd_conf.o(i.HAL_PCD_MspInit) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + usbd_conf.o(i.HAL_PCD_MspInit) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) for HAL_RCCEx_PeriphCLKConfig + usbd_conf.o(i.HAL_PCD_MspInit) refers to main.o(i.Error_Handler) for Error_Handler + usbd_conf.o(i.HAL_PCD_MspInit) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableUSBVoltageDetector) for HAL_PWREx_EnableUSBVoltageDetector + usbd_conf.o(i.HAL_PCD_MspInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + usbd_conf.o(i.HAL_PCD_MspInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + usbd_conf.o(i.HAL_PCD_MspInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) for HAL_NVIC_EnableIRQ + usbd_conf.o(i.HAL_PCD_ResetCallback) refers to main.o(i.Error_Handler) for Error_Handler + usbd_conf.o(i.HAL_PCD_ResetCallback) refers to usbd_core.o(i.USBD_LL_SetSpeed) for USBD_LL_SetSpeed + usbd_conf.o(i.HAL_PCD_ResetCallback) refers to usbd_core.o(i.USBD_LL_Reset) for USBD_LL_Reset + usbd_conf.o(i.HAL_PCD_ResumeCallback) refers to usbd_core.o(i.USBD_LL_Resume) for USBD_LL_Resume + usbd_conf.o(i.HAL_PCD_SOFCallback) refers to usbd_core.o(i.USBD_LL_SOF) for USBD_LL_SOF + usbd_conf.o(i.HAL_PCD_SetupStageCallback) refers to usbd_core.o(i.USBD_LL_SetupStage) for USBD_LL_SetupStage + usbd_conf.o(i.HAL_PCD_SuspendCallback) refers to usbd_core.o(i.USBD_LL_Suspend) for USBD_LL_Suspend + usbd_conf.o(i.USBD_LL_ClearStallEP) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_ClrStall) for HAL_PCD_EP_ClrStall + usbd_conf.o(i.USBD_LL_ClearStallEP) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_CloseEP) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Close) for HAL_PCD_EP_Close + usbd_conf.o(i.USBD_LL_CloseEP) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_DeInit) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_DeInit) for HAL_PCD_DeInit + usbd_conf.o(i.USBD_LL_DeInit) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_Delay) refers to stm32h7xx_hal.o(i.HAL_Delay) for HAL_Delay + usbd_conf.o(i.USBD_LL_FlushEP) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Flush) for HAL_PCD_EP_Flush + usbd_conf.o(i.USBD_LL_FlushEP) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_GetRxDataSize) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_GetRxCount) for HAL_PCD_EP_GetRxCount + usbd_conf.o(i.USBD_LL_Init) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) for HAL_PCD_Init + usbd_conf.o(i.USBD_LL_Init) refers to main.o(i.Error_Handler) for Error_Handler + usbd_conf.o(i.USBD_LL_Init) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_SetRxFiFo) for HAL_PCDEx_SetRxFiFo + usbd_conf.o(i.USBD_LL_Init) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_SetTxFiFo) for HAL_PCDEx_SetTxFiFo + usbd_conf.o(i.USBD_LL_Init) refers to usbd_conf.o(.bss) for .bss + usbd_conf.o(i.USBD_LL_OpenEP) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Open) for HAL_PCD_EP_Open + usbd_conf.o(i.USBD_LL_OpenEP) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_PrepareReceive) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Receive) for HAL_PCD_EP_Receive + usbd_conf.o(i.USBD_LL_PrepareReceive) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_SetUSBAddress) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_SetAddress) for HAL_PCD_SetAddress + usbd_conf.o(i.USBD_LL_SetUSBAddress) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_StallEP) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_SetStall) for HAL_PCD_EP_SetStall + usbd_conf.o(i.USBD_LL_StallEP) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_Start) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_Start) for HAL_PCD_Start + usbd_conf.o(i.USBD_LL_Start) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_Stop) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_Stop) for HAL_PCD_Stop + usbd_conf.o(i.USBD_LL_Stop) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_LL_Transmit) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Transmit) for HAL_PCD_EP_Transmit + usbd_conf.o(i.USBD_LL_Transmit) refers to usbd_conf.o(i.USBD_Get_USB_Status) for USBD_Get_USB_Status + usbd_conf.o(i.USBD_static_malloc) refers to usbd_conf.o(.bss) for .bss + usbd_desc.o(i.Get_SerialNum) refers to usbd_desc.o(i.IntToUnicode) for IntToUnicode + usbd_desc.o(i.Get_SerialNum) refers to usbd_desc.o(.data) for .data + usbd_desc.o(i.USBD_FS_ConfigStrDescriptor) refers to usbd_ctlreq.o(i.USBD_GetString) for USBD_GetString + usbd_desc.o(i.USBD_FS_ConfigStrDescriptor) refers to usbd_desc.o(.bss) for .bss + usbd_desc.o(i.USBD_FS_DeviceDescriptor) refers to usbd_desc.o(.data) for .data + usbd_desc.o(i.USBD_FS_InterfaceStrDescriptor) refers to usbd_ctlreq.o(i.USBD_GetString) for USBD_GetString + usbd_desc.o(i.USBD_FS_InterfaceStrDescriptor) refers to usbd_desc.o(.bss) for .bss + usbd_desc.o(i.USBD_FS_LangIDStrDescriptor) refers to usbd_desc.o(.data) for .data + usbd_desc.o(i.USBD_FS_ManufacturerStrDescriptor) refers to usbd_ctlreq.o(i.USBD_GetString) for USBD_GetString + usbd_desc.o(i.USBD_FS_ManufacturerStrDescriptor) refers to usbd_desc.o(.bss) for .bss + usbd_desc.o(i.USBD_FS_ProductStrDescriptor) refers to usbd_ctlreq.o(i.USBD_GetString) for USBD_GetString + usbd_desc.o(i.USBD_FS_ProductStrDescriptor) refers to usbd_desc.o(.bss) for .bss + usbd_desc.o(i.USBD_FS_SerialStrDescriptor) refers to usbd_desc.o(i.Get_SerialNum) for Get_SerialNum + usbd_desc.o(i.USBD_FS_SerialStrDescriptor) refers to usbd_desc.o(.data) for .data + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_DeviceDescriptor) for USBD_FS_DeviceDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_LangIDStrDescriptor) for USBD_FS_LangIDStrDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_ManufacturerStrDescriptor) for USBD_FS_ManufacturerStrDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_ProductStrDescriptor) for USBD_FS_ProductStrDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_SerialStrDescriptor) for USBD_FS_SerialStrDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_ConfigStrDescriptor) for USBD_FS_ConfigStrDescriptor + usbd_desc.o(.data) refers to usbd_desc.o(i.USBD_FS_InterfaceStrDescriptor) for USBD_FS_InterfaceStrDescriptor + usbd_cdc_if.o(i.CDC_Init_FS) refers to usbd_cdc.o(i.USBD_CDC_SetTxBuffer) for USBD_CDC_SetTxBuffer + usbd_cdc_if.o(i.CDC_Init_FS) refers to usbd_cdc.o(i.USBD_CDC_SetRxBuffer) for USBD_CDC_SetRxBuffer + usbd_cdc_if.o(i.CDC_Init_FS) refers to usbd_cdc_if.o(.bss) for .bss + usbd_cdc_if.o(i.CDC_Init_FS) refers to usb_device.o(.bss) for hUsbDeviceFS + usbd_cdc_if.o(i.CDC_Receive_FS) refers to usbd_cdc.o(i.USBD_CDC_SetRxBuffer) for USBD_CDC_SetRxBuffer + usbd_cdc_if.o(i.CDC_Receive_FS) refers to usbd_cdc.o(i.USBD_CDC_ReceivePacket) for USBD_CDC_ReceivePacket + usbd_cdc_if.o(i.CDC_Receive_FS) refers to usb_device.o(.bss) for hUsbDeviceFS + usbd_cdc_if.o(i.CDC_Transmit_FS) refers to usbd_cdc.o(i.USBD_CDC_SetTxBuffer) for USBD_CDC_SetTxBuffer + usbd_cdc_if.o(i.CDC_Transmit_FS) refers to usbd_cdc.o(i.USBD_CDC_TransmitPacket) for USBD_CDC_TransmitPacket + usbd_cdc_if.o(i.CDC_Transmit_FS) refers to usb_device.o(.bss) for hUsbDeviceFS + usbd_cdc_if.o(.data) refers to usbd_cdc_if.o(i.CDC_Init_FS) for CDC_Init_FS + usbd_cdc_if.o(.data) refers to usbd_cdc_if.o(i.CDC_DeInit_FS) for CDC_DeInit_FS + usbd_cdc_if.o(.data) refers to usbd_cdc_if.o(i.CDC_Control_FS) for CDC_Control_FS + usbd_cdc_if.o(.data) refers to usbd_cdc_if.o(i.CDC_Receive_FS) for CDC_Receive_FS + usbd_cdc_if.o(.data) refers to usbd_cdc_if.o(i.CDC_TransmitCplt_FS) for CDC_TransmitCplt_FS + stm32h7xx_it.o(i.BDMA_Channel0_IRQHandler) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_IRQHandler) for HAL_DMA_IRQHandler + stm32h7xx_it.o(i.BDMA_Channel0_IRQHandler) refers to main.o(.bss) for hdma_adc3 + stm32h7xx_it.o(i.DMA1_Stream5_IRQHandler) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_IRQHandler) for HAL_DMA_IRQHandler + stm32h7xx_it.o(i.DMA1_Stream5_IRQHandler) refers to main.o(.bss) for hdma_usart1_rx + stm32h7xx_it.o(i.DMAMUX2_OVR_IRQHandler) refers to stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MUX_IRQHandler) for HAL_DMAEx_MUX_IRQHandler + stm32h7xx_it.o(i.DMAMUX2_OVR_IRQHandler) refers to main.o(.bss) for hdma_adc3 + stm32h7xx_it.o(i.OTG_FS_IRQHandler) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) for HAL_PCD_IRQHandler + stm32h7xx_it.o(i.OTG_FS_IRQHandler) refers to usbd_conf.o(.bss) for hpcd_USB_OTG_FS + stm32h7xx_it.o(i.TIM7_IRQHandler) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) for HAL_TIM_IRQHandler + stm32h7xx_it.o(i.TIM7_IRQHandler) refers to stm32h7xx_hal_timebase_tim.o(.bss) for htim7 + stm32h7xx_it.o(i.USART1_IRQHandler) refers to stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) for HAL_UART_IRQHandler + stm32h7xx_it.o(i.USART1_IRQHandler) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) for HAL_UARTEx_ReceiveToIdle_DMA + stm32h7xx_it.o(i.USART1_IRQHandler) refers to main.o(.bss) for huart1 + stm32h7xx_hal_msp.o(i.HAL_ADC_MspDeInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_DeInit) for HAL_GPIO_DeInit + stm32h7xx_hal_msp.o(i.HAL_ADC_MspDeInit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit) for HAL_DMA_DeInit + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) for HAL_RCCEx_PeriphCLKConfig + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to main.o(i.Error_Handler) for Error_Handler + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to stm32h7xx_hal.o(i.HAL_SYSCFG_AnalogSwitchConfig) for HAL_SYSCFG_AnalogSwitchConfig + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Init) for HAL_DMA_Init + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_ConfigMuxSync) for HAL_DMAEx_ConfigMuxSync + stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) refers to main.o(.bss) for hdma_adc3 + stm32h7xx_hal_msp.o(i.HAL_MspInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + stm32h7xx_hal_msp.o(i.HAL_UART_MspDeInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_DeInit) for HAL_GPIO_DeInit + stm32h7xx_hal_msp.o(i.HAL_UART_MspDeInit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit) for HAL_DMA_DeInit + stm32h7xx_hal_msp.o(i.HAL_UART_MspDeInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_DisableIRQ) for HAL_NVIC_DisableIRQ + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) for HAL_RCCEx_PeriphCLKConfig + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to main.o(i.Error_Handler) for Error_Handler + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Init) for HAL_DMA_Init + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) for HAL_NVIC_EnableIRQ + stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) refers to main.o(.bss) for hdma_usart1_rx + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) for HAL_NVIC_EnableIRQ + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetClockConfig) for HAL_RCC_GetClockConfig + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) for HAL_RCC_GetPCLK1Freq + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) for HAL_TIM_Base_Init + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_IT) for HAL_TIM_Base_Start_IT + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal.o(.data) for uwTickPrio + stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) refers to stm32h7xx_hal_timebase_tim.o(.bss) for .bss + stm32h7xx_hal_timebase_tim.o(i.HAL_ResumeTick) refers to stm32h7xx_hal_timebase_tim.o(.bss) for .bss + stm32h7xx_hal_timebase_tim.o(i.HAL_SuspendTick) refers to stm32h7xx_hal_timebase_tim.o(.bss) for .bss + system_stm32h7xx.o(i.SystemCoreClockUpdate) refers to system_stm32h7xx.o(.constdata) for .constdata + system_stm32h7xx.o(i.SystemCoreClockUpdate) refers to system_stm32h7xx.o(.data) for .data + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_DeInit) refers to stm32h7xx_hal_msp.o(i.HAL_TIM_Base_MspDeInit) for HAL_TIM_Base_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) refers to stm32h7xx_hal_msp.o(i.HAL_TIM_Base_MspInit) for HAL_TIM_Base_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedCplt) for TIM_DMAPeriodElapsedCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedHalfCplt) for TIM_DMAPeriodElapsedHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) refers to stm32h7xx_hal_tim.o(i.TIM_ETR_SetConfig) for TIM_ETR_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) refers to stm32h7xx_hal_tim.o(i.TIM_TI1_ConfigInputStage) for TIM_TI1_ConfigInputStage + stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) refers to stm32h7xx_hal_tim.o(i.TIM_ITRx_SetConfig) for TIM_ITRx_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) refers to stm32h7xx_hal_tim.o(i.TIM_TI2_ConfigInputStage) for TIM_TI2_ConfigInputStage + stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigOCrefClear) refers to stm32h7xx_hal_tim.o(i.TIM_ETR_SetConfig) for TIM_ETR_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt) for TIM_DMACaptureCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt) for TIM_DMACaptureHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedCplt) for TIM_DMAPeriodElapsedCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedHalfCplt) for TIM_DMAPeriodElapsedHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationCplt) for TIMEx_DMACommutationCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationHalfCplt) for TIMEx_DMACommutationHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMATriggerCplt) for TIM_DMATriggerCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMATriggerHalfCplt) for TIM_DMATriggerHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseCplt) for TIM_DMADelayPulseCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) for TIM_DMADelayPulseHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedCplt) for TIM_DMAPeriodElapsedCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedHalfCplt) for TIM_DMAPeriodElapsedHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationCplt) for TIMEx_DMACommutationCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationHalfCplt) for TIMEx_DMACommutationHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMATriggerCplt) for TIM_DMATriggerCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) refers to stm32h7xx_hal_tim.o(i.TIM_DMATriggerHalfCplt) for TIM_DMATriggerHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_ReadStart) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart) for HAL_TIM_DMABurst_MultiReadStart + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_ReadStop) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_WriteStart) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart) for HAL_TIM_DMABurst_MultiWriteStart + stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_WriteStop) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_DeInit) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_MspDeInit) for HAL_TIM_Encoder_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_MspInit) for HAL_TIM_Encoder_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt) for TIM_DMACaptureCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt) for TIM_DMACaptureHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI1_SetConfig) for TIM_TI1_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI2_SetConfig) for TIM_TI2_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI3_SetConfig) for TIM_TI3_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI4_SetConfig) for TIM_TI4_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_DeInit) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IC_MspDeInit) for HAL_TIM_IC_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IC_MspInit) for HAL_TIM_IC_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt) for TIM_DMACaptureCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt) for TIM_DMACaptureHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback) for HAL_TIM_IC_CaptureCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback) for HAL_TIM_OC_DelayElapsedCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) for HAL_TIM_PWM_PulseFinishedCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to main.o(i.HAL_TIM_PeriodElapsedCallback) for HAL_TIM_PeriodElapsedCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback) for HAL_TIMEx_BreakCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_Break2Callback) for HAL_TIMEx_Break2Callback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerCallback) for HAL_TIM_TriggerCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback) for HAL_TIMEx_CommutCallback + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig) for TIM_OC1_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) for TIM_OC2_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC3_SetConfig) for TIM_OC3_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC4_SetConfig) for TIM_OC4_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC5_SetConfig) for TIM_OC5_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC6_SetConfig) for TIM_OC6_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_DeInit) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_OC_MspDeInit) for HAL_TIM_OC_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_OC_MspInit) for HAL_TIM_OC_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseCplt) for TIM_DMADelayPulseCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) for TIM_DMADelayPulseHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig) for TIM_OC1_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) for TIM_OC2_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI1_SetConfig) for TIM_TI1_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_TI2_SetConfig) for TIM_TI2_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_DeInit) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_MspDeInit) for HAL_TIM_OnePulse_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_MspInit) for HAL_TIM_OnePulse_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig) for TIM_OC1_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) for TIM_OC2_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC3_SetConfig) for TIM_OC3_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC4_SetConfig) for TIM_OC4_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC5_SetConfig) for TIM_OC5_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) refers to stm32h7xx_hal_tim.o(i.TIM_OC6_SetConfig) for TIM_OC6_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_DeInit) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_MspDeInit) for HAL_TIM_PWM_MspDeInit + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_MspInit) for HAL_TIM_PWM_MspInit + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseCplt) for TIM_DMADelayPulseCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) for TIM_DMADelayPulseHalfCplt + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim.o(i.HAL_TIM_SlaveConfigSynchro) refers to stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig) for TIM_SlaveTimer_SetConfig + stm32h7xx_hal_tim.o(i.HAL_TIM_SlaveConfigSynchro_IT) refers to stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig) for TIM_SlaveTimer_SetConfig + stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback) for HAL_TIM_IC_CaptureCallback + stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureHalfCpltCallback) for HAL_TIM_IC_CaptureHalfCpltCallback + stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) for HAL_TIM_PWM_PulseFinishedCallback + stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedHalfCpltCallback) for HAL_TIM_PWM_PulseFinishedHalfCpltCallback + stm32h7xx_hal_tim.o(i.TIM_DMAError) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ErrorCallback) for HAL_TIM_ErrorCallback + stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedCplt) refers to main.o(i.HAL_TIM_PeriodElapsedCallback) for HAL_TIM_PeriodElapsedCallback + stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedHalfCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PeriodElapsedHalfCpltCallback) for HAL_TIM_PeriodElapsedHalfCpltCallback + stm32h7xx_hal_tim.o(i.TIM_DMATriggerCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerCallback) for HAL_TIM_TriggerCallback + stm32h7xx_hal_tim.o(i.TIM_DMATriggerHalfCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerHalfCpltCallback) for HAL_TIM_TriggerHalfCpltCallback + stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig) refers to stm32h7xx_hal_tim.o(i.TIM_ETR_SetConfig) for TIM_ETR_SetConfig + stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig) refers to stm32h7xx_hal_tim.o(i.TIM_TI1_ConfigInputStage) for TIM_TI1_ConfigInputStage + stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig) refers to stm32h7xx_hal_tim.o(i.TIM_TI2_ConfigInputStage) for TIM_TI2_ConfigInputStage + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationCplt) for TIMEx_DMACommutationCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationHalfCplt) for TIMEx_DMACommutationHalfCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_DeInit) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_MspDeInit) for HAL_TIMEx_HallSensor_MspDeInit + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Init) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_MspInit) for HAL_TIMEx_HallSensor_MspInit + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Init) refers to stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) for TIM_Base_SetConfig + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Init) refers to stm32h7xx_hal_tim.o(i.TIM_TI1_SetConfig) for TIM_TI1_SetConfig + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Init) refers to stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) for TIM_OC2_SetConfig + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt) for TIM_DMACaptureCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt) for TIM_DMACaptureHalfCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMAError) for TIM_DMAError + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_DMADelayPulseNCplt) for TIM_DMADelayPulseNCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) for TIM_DMADelayPulseHalfCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_DMAErrorCCxN) for TIM_DMAErrorCCxN + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop_IT) refers to stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) for TIM_CCxChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_DMADelayPulseNCplt) for TIM_DMADelayPulseNCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA) refers to stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt) for TIM_DMADelayPulseHalfCplt + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_DMAErrorCCxN) for TIM_DMAErrorCCxN + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop_DMA) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop_IT) refers to stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd) for TIM_CCxNChannelCmd + stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationCplt) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback) for HAL_TIMEx_CommutCallback + stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationHalfCplt) refers to stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutHalfCpltCallback) for HAL_TIMEx_CommutHalfCpltCallback + stm32h7xx_hal_tim_ex.o(i.TIM_DMADelayPulseNCplt) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) for HAL_TIM_PWM_PulseFinishedCallback + stm32h7xx_hal_tim_ex.o(i.TIM_DMAErrorCCxN) refers to stm32h7xx_hal_tim.o(i.HAL_TIM_ErrorCallback) for HAL_TIM_ErrorCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_ActivateRemoteWakeup) refers to stm32h7xx_ll_usb.o(i.USB_ActivateRemoteWakeup) for USB_ActivateRemoteWakeup + stm32h7xx_hal_pcd.o(i.HAL_PCD_DeActivateRemoteWakeup) refers to stm32h7xx_ll_usb.o(i.USB_DeActivateRemoteWakeup) for USB_DeActivateRemoteWakeup + stm32h7xx_hal_pcd.o(i.HAL_PCD_DeInit) refers to stm32h7xx_ll_usb.o(i.USB_StopDevice) for USB_StopDevice + stm32h7xx_hal_pcd.o(i.HAL_PCD_DeInit) refers to usbd_conf.o(i.HAL_PCD_MspDeInit) for HAL_PCD_MspDeInit + stm32h7xx_hal_pcd.o(i.HAL_PCD_DevConnect) refers to stm32h7xx_ll_usb.o(i.USB_DevConnect) for USB_DevConnect + stm32h7xx_hal_pcd.o(i.HAL_PCD_DevDisconnect) refers to stm32h7xx_ll_usb.o(i.USB_DevDisconnect) for USB_DevDisconnect + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Abort) refers to stm32h7xx_ll_usb.o(i.USB_EPStopXfer) for USB_EPStopXfer + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Close) refers to stm32h7xx_ll_usb.o(i.USB_DeactivateEndpoint) for USB_DeactivateEndpoint + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_ClrStall) refers to stm32h7xx_ll_usb.o(i.USB_EPClearStall) for USB_EPClearStall + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Flush) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Flush) refers to stm32h7xx_ll_usb.o(i.USB_FlushRxFifo) for USB_FlushRxFifo + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Open) refers to stm32h7xx_ll_usb.o(i.USB_ActivateEndpoint) for USB_ActivateEndpoint + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Receive) refers to stm32h7xx_ll_usb.o(i.USB_EPStartXfer) for USB_EPStartXfer + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_SetStall) refers to stm32h7xx_ll_usb.o(i.USB_EPSetStall) for USB_EPSetStall + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_SetStall) refers to stm32h7xx_ll_usb.o(i.USB_EP0_OutStart) for USB_EP0_OutStart + stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Transmit) refers to stm32h7xx_ll_usb.o(i.USB_EPStartXfer) for USB_EPStartXfer + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_GetMode) for USB_GetMode + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadInterrupts) for USB_ReadInterrupts + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadPacket) for USB_ReadPacket + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadDevAllOutEpInterrupt) for USB_ReadDevAllOutEpInterrupt + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadDevOutEPInterrupt) for USB_ReadDevOutEPInterrupt + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_pcd.o(i.PCD_EP_OutXfrComplete_int) for PCD_EP_OutXfrComplete_int + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_pcd.o(i.PCD_EP_OutSetupPacket_int) for PCD_EP_OutSetupPacket_int + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_ISOOUTIncompleteCallback) for HAL_PCD_ISOOUTIncompleteCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadDevAllInEpInterrupt) for USB_ReadDevAllInEpInterrupt + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ReadDevInEPInterrupt) for USB_ReadDevInEPInterrupt + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_EP0_OutStart) for USB_EP0_OutStart + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_DataInStageCallback) for HAL_PCD_DataInStageCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_ISOINIncompleteCallback) for HAL_PCD_ISOINIncompleteCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_pcd.o(i.PCD_WriteEmptyTxFifo) for PCD_WriteEmptyTxFifo + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_ResumeCallback) for HAL_PCD_ResumeCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_SuspendCallback) for HAL_PCD_SuspendCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_LPM_Callback) for HAL_PCDEx_LPM_Callback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_ActivateSetup) for USB_ActivateSetup + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_GetDevSpeed) for USB_GetDevSpeed + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_ll_usb.o(i.USB_SetTurnaroundTime) for USB_SetTurnaroundTime + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_ResetCallback) for HAL_PCD_ResetCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_SOFCallback) for HAL_PCD_SOFCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Abort) for HAL_PCD_EP_Abort + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_ConnectCallback) for HAL_PCD_ConnectCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) refers to usbd_conf.o(i.HAL_PCD_DisconnectCallback) for HAL_PCD_DisconnectCallback + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to usbd_conf.o(i.HAL_PCD_MspInit) for HAL_PCD_MspInit + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_ll_usb.o(i.USB_DisableGlobalInt) for USB_DisableGlobalInt + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_ll_usb.o(i.USB_CoreInit) for USB_CoreInit + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_ll_usb.o(i.USB_SetCurrentMode) for USB_SetCurrentMode + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_ll_usb.o(i.USB_DevInit) for USB_DevInit + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_ActivateLPM) for HAL_PCDEx_ActivateLPM + stm32h7xx_hal_pcd.o(i.HAL_PCD_Init) refers to stm32h7xx_ll_usb.o(i.USB_DevDisconnect) for USB_DevDisconnect + stm32h7xx_hal_pcd.o(i.HAL_PCD_SetAddress) refers to stm32h7xx_ll_usb.o(i.USB_SetDevAddress) for USB_SetDevAddress + stm32h7xx_hal_pcd.o(i.HAL_PCD_Start) refers to stm32h7xx_ll_usb.o(i.USB_EnableGlobalInt) for USB_EnableGlobalInt + stm32h7xx_hal_pcd.o(i.HAL_PCD_Start) refers to stm32h7xx_ll_usb.o(i.USB_DevConnect) for USB_DevConnect + stm32h7xx_hal_pcd.o(i.HAL_PCD_Stop) refers to stm32h7xx_ll_usb.o(i.USB_DisableGlobalInt) for USB_DisableGlobalInt + stm32h7xx_hal_pcd.o(i.HAL_PCD_Stop) refers to stm32h7xx_ll_usb.o(i.USB_DevDisconnect) for USB_DevDisconnect + stm32h7xx_hal_pcd.o(i.HAL_PCD_Stop) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_hal_pcd.o(i.PCD_EP_OutSetupPacket_int) refers to usbd_conf.o(i.HAL_PCD_SetupStageCallback) for HAL_PCD_SetupStageCallback + stm32h7xx_hal_pcd.o(i.PCD_EP_OutSetupPacket_int) refers to stm32h7xx_ll_usb.o(i.USB_EP0_OutStart) for USB_EP0_OutStart + stm32h7xx_hal_pcd.o(i.PCD_EP_OutXfrComplete_int) refers to usbd_conf.o(i.HAL_PCD_DataOutStageCallback) for HAL_PCD_DataOutStageCallback + stm32h7xx_hal_pcd.o(i.PCD_EP_OutXfrComplete_int) refers to stm32h7xx_ll_usb.o(i.USB_EP0_OutStart) for USB_EP0_OutStart + stm32h7xx_hal_pcd.o(i.PCD_WriteEmptyTxFifo) refers to stm32h7xx_ll_usb.o(i.USB_WritePacket) for USB_WritePacket + stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_VBUSDetect) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_VBUSDetect) refers to stm32h7xx_hal.o(i.HAL_Delay) for HAL_Delay + stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_VBUSDetect) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_Callback) for HAL_PCDEx_BCD_Callback + stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_VBUSDetect) refers to stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_DeActivateBCD) for HAL_PCDEx_DeActivateBCD + stm32h7xx_ll_usb.o(i.USB_CoreInit) refers to stm32h7xx_ll_usb.o(i.USB_CoreReset) for USB_CoreReset + stm32h7xx_ll_usb.o(i.USB_DevInit) refers to stm32h7xx_ll_usb.o(i.USB_SetDevSpeed) for USB_SetDevSpeed + stm32h7xx_ll_usb.o(i.USB_DevInit) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_ll_usb.o(i.USB_DevInit) refers to stm32h7xx_ll_usb.o(i.USB_FlushRxFifo) for USB_FlushRxFifo + stm32h7xx_ll_usb.o(i.USB_EPStartXfer) refers to stm32h7xx_ll_usb.o(i.USB_WritePacket) for USB_WritePacket + stm32h7xx_ll_usb.o(i.USB_HC_Init) refers to stm32h7xx_ll_usb.o(i.USB_GetHostSpeed) for USB_GetHostSpeed + stm32h7xx_ll_usb.o(i.USB_HC_StartXfer) refers to stm32h7xx_ll_usb.o(i.USB_DoPing) for USB_DoPing + stm32h7xx_ll_usb.o(i.USB_HC_StartXfer) refers to stm32h7xx_ll_usb.o(i.USB_WritePacket) for USB_WritePacket + stm32h7xx_ll_usb.o(i.USB_HostInit) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_ll_usb.o(i.USB_HostInit) refers to stm32h7xx_ll_usb.o(i.USB_FlushRxFifo) for USB_FlushRxFifo + stm32h7xx_ll_usb.o(i.USB_ResetPort) refers to stm32h7xx_hal.o(i.HAL_Delay) for HAL_Delay + stm32h7xx_ll_usb.o(i.USB_SetCurrentMode) refers to stm32h7xx_hal.o(i.HAL_Delay) for HAL_Delay + stm32h7xx_ll_usb.o(i.USB_SetCurrentMode) refers to stm32h7xx_ll_usb.o(i.USB_GetMode) for USB_GetMode + stm32h7xx_ll_usb.o(i.USB_StopDevice) refers to stm32h7xx_ll_usb.o(i.USB_FlushRxFifo) for USB_FlushRxFifo + stm32h7xx_ll_usb.o(i.USB_StopDevice) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_ll_usb.o(i.USB_StopHost) refers to stm32h7xx_ll_usb.o(i.USB_DisableGlobalInt) for USB_DisableGlobalInt + stm32h7xx_ll_usb.o(i.USB_StopHost) refers to stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) for USB_FlushTxFifo + stm32h7xx_ll_usb.o(i.USB_StopHost) refers to stm32h7xx_ll_usb.o(i.USB_FlushRxFifo) for USB_FlushRxFifo + stm32h7xx_ll_usb.o(i.USB_StopHost) refers to stm32h7xx_ll_usb.o(i.USB_EnableGlobalInt) for USB_EnableGlobalInt + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) for HAL_RCC_GetSysClockFreq + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) for HAL_InitTick + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to system_stm32h7xx.o(.data) for SystemD2Clock + stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) refers to stm32h7xx_hal.o(.data) for uwTickPrio + stm32h7xx_hal_rcc.o(i.HAL_RCC_DeInit) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc.o(i.HAL_RCC_DeInit) refers to stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) for HAL_InitTick + stm32h7xx_hal_rcc.o(i.HAL_RCC_DeInit) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_rcc.o(i.HAL_RCC_DeInit) refers to stm32h7xx_hal.o(.data) for uwTickPrio + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) for HAL_RCC_GetSysClockFreq + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) refers to system_stm32h7xx.o(.data) for SystemD2Clock + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetOscConfig) refers to stm32h7xx_hal.o(i.HAL_GetREVID) for HAL_GetREVID + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc.o(i.HAL_RCC_MCOConfig) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) for HAL_GPIO_Init + stm32h7xx_hal_rcc.o(i.HAL_RCC_NMI_IRQHandler) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_CSSCallback) for HAL_RCC_CSSCallback + stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) refers to stm32h7xx_hal.o(i.HAL_GetREVID) for HAL_GetREVID + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSConfig) refers to stm32h7xx_hal.o(i.HAL_GetREVID) for HAL_GetREVID + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSWaitSynchronization) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_IRQHandler) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_SyncOkCallback) for HAL_RCCEx_CRS_SyncOkCallback + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_IRQHandler) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_SyncWarnCallback) for HAL_RCCEx_CRS_SyncWarnCallback + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_IRQHandler) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_ExpectedSyncCallback) for HAL_RCCEx_CRS_ExpectedSyncCallback + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_IRQHandler) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_ErrorCallback) for HAL_RCCEx_CRS_ErrorCallback + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1PCLK1Freq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1PCLK1Freq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1SysClockFreq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) for HAL_RCC_GetSysClockFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1SysClockFreq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1SysClockFreq) refers to system_stm32h7xx.o(.data) for SystemD2Clock + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL1ClockFreq) for HAL_RCCEx_GetPLL1ClockFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq) for HAL_RCCEx_GetPLL2ClockFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq) for HAL_RCCEx_GetPLL3ClockFreq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) for HAL_RCC_GetPCLK1Freq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) for HAL_RCCEx_GetD3PCLK1Freq + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_LSECSS_IRQHandler) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_LSECSS_Callback) for HAL_RCCEx_LSECSS_Callback + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) refers to stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config) for RCCEx_PLL2_Config + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) refers to stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config) for RCCEx_PLL3_Config + stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_flash.o(i.FLASH_CRC_WaitForLastOperation) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_flash.o(i.FLASH_CRC_WaitForLastOperation) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.FLASH_OB_WaitForLastOperation) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_flash.o(i.FLASH_OB_WaitForLastOperation) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.HAL_FLASH_GetError) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.HAL_FLASH_IRQHandler) refers to stm32h7xx_hal_flash.o(i.HAL_FLASH_EndOfOperationCallback) for HAL_FLASH_EndOfOperationCallback + stm32h7xx_hal_flash.o(i.HAL_FLASH_IRQHandler) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_Erase_Sector) for FLASH_Erase_Sector + stm32h7xx_hal_flash.o(i.HAL_FLASH_IRQHandler) refers to stm32h7xx_hal_flash.o(i.HAL_FLASH_OperationErrorCallback) for HAL_FLASH_OperationErrorCallback + stm32h7xx_hal_flash.o(i.HAL_FLASH_IRQHandler) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.HAL_FLASH_OB_Launch) refers to stm32h7xx_hal_flash.o(i.FLASH_CRC_WaitForLastOperation) for FLASH_CRC_WaitForLastOperation + stm32h7xx_hal_flash.o(i.HAL_FLASH_OB_Launch) refers to stm32h7xx_hal_flash.o(i.FLASH_OB_WaitForLastOperation) for FLASH_OB_WaitForLastOperation + stm32h7xx_hal_flash.o(i.HAL_FLASH_Program) refers to stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) for FLASH_WaitForLastOperation + stm32h7xx_hal_flash.o(i.HAL_FLASH_Program) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash.o(i.HAL_FLASH_Program_IT) refers to stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) for FLASH_WaitForLastOperation + stm32h7xx_hal_flash.o(i.HAL_FLASH_Program_IT) refers to stm32h7xx_hal_flash.o(.bss) for .bss + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_ComputeCRC) refers to stm32h7xx_hal_flash.o(i.FLASH_OB_WaitForLastOperation) for FLASH_OB_WaitForLastOperation + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_ComputeCRC) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_CRC_AddSector) for FLASH_CRC_AddSector + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_ComputeCRC) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_CRC_SelectAddress) for FLASH_CRC_SelectAddress + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_ComputeCRC) refers to stm32h7xx_hal_flash.o(i.FLASH_CRC_WaitForLastOperation) for FLASH_CRC_WaitForLastOperation + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase) refers to stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) for FLASH_WaitForLastOperation + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_MassErase) for FLASH_MassErase + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_Erase_Sector) for FLASH_Erase_Sector + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase) refers to stm32h7xx_hal_flash.o(.bss) for pFlash + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase_IT) refers to stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) for FLASH_WaitForLastOperation + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase_IT) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_Erase_Sector) for FLASH_Erase_Sector + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase_IT) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_MassErase) for FLASH_MassErase + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase_IT) refers to stm32h7xx_hal_flash.o(.bss) for pFlash + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetRDP) for FLASH_OB_GetRDP + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetUser) for FLASH_OB_GetUser + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetBOR) for FLASH_OB_GetBOR + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetWRP) for FLASH_OB_GetWRP + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetPCROP) for FLASH_OB_GetPCROP + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetSecureArea) for FLASH_OB_GetSecureArea + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetBootAdd) for FLASH_OB_GetBootAdd + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation) for FLASH_WaitForLastOperation + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_DisableWRP) for FLASH_OB_DisableWRP + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_RDPConfig) for FLASH_OB_RDPConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_UserConfig) for FLASH_OB_UserConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_PCROPConfig) for FLASH_OB_PCROPConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_BOR_LevelConfig) for FLASH_OB_BOR_LevelConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_BootAddConfig) for FLASH_OB_BootAddConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_SecureAreaConfig) for FLASH_OB_SecureAreaConfig + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash_ex.o(i.FLASH_OB_EnableWRP) for FLASH_OB_EnableWRP + stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram) refers to stm32h7xx_hal_flash.o(.bss) for pFlash + stm32h7xx_hal_gpio.o(i.HAL_GPIO_EXTI_IRQHandler) refers to stm32h7xx_hal_gpio.o(i.HAL_GPIO_EXTI_Callback) for HAL_GPIO_EXTI_Callback + stm32h7xx_hal_hsem.o(i.HAL_HSEM_IRQHandler) refers to stm32h7xx_hal_hsem.o(i.HAL_HSEM_FreeCallback) for HAL_HSEM_FreeCallback + stm32h7xx_hal_dma.o(i.DMA_CalcBaseAndBitshift) refers to stm32h7xx_hal_dma.o(.constdata) for .constdata + stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit) refers to stm32h7xx_hal_dma.o(i.DMA_CalcBaseAndBitshift) for DMA_CalcBaseAndBitshift + stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit) refers to stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXChannelBaseAndMask) for DMA_CalcDMAMUXChannelBaseAndMask + stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit) refers to stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXRequestGenBaseAndMask) for DMA_CalcDMAMUXRequestGenBaseAndMask + stm32h7xx_hal_dma.o(i.HAL_DMA_IRQHandler) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_dma.o(i.HAL_DMA_Init) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_dma.o(i.HAL_DMA_Init) refers to stm32h7xx_hal_dma.o(i.DMA_CheckFifoParam) for DMA_CheckFifoParam + stm32h7xx_hal_dma.o(i.HAL_DMA_Init) refers to stm32h7xx_hal_dma.o(i.DMA_CalcBaseAndBitshift) for DMA_CalcBaseAndBitshift + stm32h7xx_hal_dma.o(i.HAL_DMA_Init) refers to stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXChannelBaseAndMask) for DMA_CalcDMAMUXChannelBaseAndMask + stm32h7xx_hal_dma.o(i.HAL_DMA_Init) refers to stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXRequestGenBaseAndMask) for DMA_CalcDMAMUXRequestGenBaseAndMask + stm32h7xx_hal_dma.o(i.HAL_DMA_PollForTransfer) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_dma.o(i.HAL_DMA_PollForTransfer) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_dma.o(i.HAL_DMA_Start) refers to stm32h7xx_hal_dma.o(i.DMA_SetConfig) for DMA_SetConfig + stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) refers to stm32h7xx_hal_dma.o(i.DMA_SetConfig) for DMA_SetConfig + stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MultiBufferStart) refers to stm32h7xx_hal_dma_ex.o(i.DMA_MultiBufferSetConfig) for DMA_MultiBufferSetConfig + stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MultiBufferStart_IT) refers to stm32h7xx_hal_dma_ex.o(i.DMA_MultiBufferSetConfig) for DMA_MultiBufferSetConfig + stm32h7xx_hal_mdma.o(i.HAL_MDMA_Abort) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_mdma.o(i.HAL_MDMA_IRQHandler) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_mdma.o(i.HAL_MDMA_Init) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_mdma.o(i.HAL_MDMA_Init) refers to stm32h7xx_hal_mdma.o(i.MDMA_Init) for MDMA_Init + stm32h7xx_hal_mdma.o(i.HAL_MDMA_PollForTransfer) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_mdma.o(i.HAL_MDMA_PollForTransfer) refers to stm32h7xx_hal_mdma.o(i.HAL_MDMA_Abort) for HAL_MDMA_Abort + stm32h7xx_hal_mdma.o(i.HAL_MDMA_Start) refers to stm32h7xx_hal_mdma.o(i.MDMA_SetConfig) for MDMA_SetConfig + stm32h7xx_hal_mdma.o(i.HAL_MDMA_Start_IT) refers to stm32h7xx_hal_mdma.o(i.MDMA_SetConfig) for MDMA_SetConfig + stm32h7xx_hal_pwr.o(i.HAL_PWR_PVD_IRQHandler) refers to stm32h7xx_hal_pwr.o(i.HAL_PWR_PVDCallback) for HAL_PWR_PVDCallback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ControlVoltageScaling) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableBkUpReg) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableUSBReg) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableBkUpReg) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableUSBReg) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_PVD_AVD_IRQHandler) refers to stm32h7xx_hal_pwr.o(i.HAL_PWR_PVDCallback) for HAL_PWR_PVDCallback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_PVD_AVD_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_AVDCallback) for HAL_PWREx_AVDCallback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP1_Callback) for HAL_PWREx_WKUP1_Callback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP2_Callback) for HAL_PWREx_WKUP2_Callback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP3_Callback) for HAL_PWREx_WKUP3_Callback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP4_Callback) for HAL_PWREx_WKUP4_Callback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP5_Callback) for HAL_PWREx_WKUP5_Callback + stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler) refers to stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP6_Callback) for HAL_PWREx_WKUP6_Callback + stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) refers to stm32h7xx_hal_cortex.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Config) refers to stm32h7xx_hal_cortex.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_IRQHandler) refers to stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Callback) for HAL_SYSTICK_Callback + stm32h7xx_hal.o(i.HAL_DeInit) refers to stm32h7xx_hal.o(i.HAL_MspDeInit) for HAL_MspDeInit + stm32h7xx_hal.o(i.HAL_Delay) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal.o(i.HAL_Delay) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_GetTick) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_GetTickFreq) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_GetTickPrio) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_IncTick) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_Init) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping) for HAL_NVIC_SetPriorityGrouping + stm32h7xx_hal.o(i.HAL_Init) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) for HAL_RCC_GetSysClockFreq + stm32h7xx_hal.o(i.HAL_Init) refers to stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) for HAL_InitTick + stm32h7xx_hal.o(i.HAL_Init) refers to stm32h7xx_hal_msp.o(i.HAL_MspInit) for HAL_MspInit + stm32h7xx_hal.o(i.HAL_Init) refers to system_stm32h7xx.o(.constdata) for D1CorePrescTable + stm32h7xx_hal.o(i.HAL_Init) refers to system_stm32h7xx.o(.data) for SystemD2Clock + stm32h7xx_hal.o(i.HAL_InitTick) refers to stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Config) for HAL_SYSTICK_Config + stm32h7xx_hal.o(i.HAL_InitTick) refers to stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) for HAL_NVIC_SetPriority + stm32h7xx_hal.o(i.HAL_InitTick) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal.o(i.HAL_InitTick) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal.o(i.HAL_SYSCFG_EnableVREFBUF) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal.o(i.HAL_SetTickFreq) refers to stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) for HAL_InitTick + stm32h7xx_hal.o(i.HAL_SetTickFreq) refers to stm32h7xx_hal.o(.data) for .data + stm32h7xx_hal_i2c.o(i.HAL_I2C_DeInit) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MspDeInit) for HAL_I2C_MspDeInit + stm32h7xx_hal_i2c.o(i.HAL_I2C_DisableListen_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_ER_IRQHandler) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.HAL_I2C_EnableListen_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_EnableListen_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Init) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MspInit) for HAL_I2C_MspInit + stm32h7xx_hal_i2c.o(i.HAL_I2C_IsDeviceReady) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_IsDeviceReady) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Abort_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Abort_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Abort_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout) for I2C_WaitOnRXNEFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) for I2C_Master_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) for I2C_DMAMasterReceiveCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ConvertOtherXferOptions) for I2C_ConvertOtherXferOptions + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) for I2C_Master_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) for I2C_DMAMasterReceiveCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ConvertOtherXferOptions) for I2C_ConvertOtherXferOptions + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ConvertOtherXferOptions) for I2C_ConvertOtherXferOptions + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) for I2C_Master_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) for I2C_DMAMasterTransmitCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ConvertOtherXferOptions) for I2C_ConvertOtherXferOptions + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) for I2C_WaitOnTXISFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) for I2C_Master_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) for I2C_DMAMasterTransmitCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) for I2C_Master_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read) refers to stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryRead) for I2C_RequestMemoryRead + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) for I2C_Mem_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) for I2C_DMAMasterReceiveCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) for I2C_Mem_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryWrite) for I2C_RequestMemoryWrite + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) for I2C_WaitOnTXISFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) for I2C_Mem_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) for I2C_DMAMasterTransmitCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) for I2C_Mem_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout) for I2C_WaitOnRXNEFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) for I2C_Slave_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMASlaveReceiveCplt) for I2C_DMASlaveReceiveCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) for I2C_DMAAbort + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) for I2C_Slave_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMASlaveReceiveCplt) for I2C_DMASlaveReceiveCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) for I2C_DMAAbort + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) for I2C_DMAAbort + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) for I2C_Slave_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMASlaveTransmitCplt) for I2C_DMASlaveTransmitCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) for I2C_DMAAbort + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) for I2C_WaitOnTXISFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) for I2C_WaitOnSTOPFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) for I2C_Slave_ISR_DMA + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMASlaveTransmitCplt) for I2C_DMASlaveTransmitCplt + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAError) for I2C_DMAError + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) refers to stm32h7xx_hal_i2c.o(i.I2C_TreatErrorCallback) for I2C_TreatErrorCallback + stm32h7xx_hal_i2c.o(i.I2C_DMAError) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetError) for HAL_DMA_GetError + stm32h7xx_hal_i2c.o(i.I2C_DMAError) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_DMASlaveReceiveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) for I2C_ITSlaveSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_DMASlaveTransmitCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) for I2C_ITSlaveSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) refers to stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) for I2C_Master_ISR_DMA + stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) for I2C_Slave_ISR_DMA + stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) refers to stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) for I2C_Mem_ISR_DMA + stm32h7xx_hal_i2c.o(i.I2C_ITAddrCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITAddrCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_AddrCallback) for HAL_I2C_AddrCallback + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_i2c.o(i.I2C_TreatErrorCallback) for I2C_TreatErrorCallback + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetState) for HAL_DMA_GetState + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_i2c.o(i.I2C_DMAAbort) for I2C_DMAAbort + stm32h7xx_hal_i2c.o(i.I2C_ITError) refers to stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) for I2C_Slave_ISR_IT + stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_ListenCpltCallback) for HAL_I2C_ListenCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterRxCpltCallback) for HAL_I2C_MasterRxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterTxCpltCallback) for HAL_I2C_MasterTxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MemTxCpltCallback) for HAL_I2C_MemTxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MemRxCpltCallback) for HAL_I2C_MemRxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterRxCpltCallback) for HAL_I2C_MasterRxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterTxCpltCallback) for HAL_I2C_MasterTxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt) for I2C_ITListenCplt + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) for I2C_ITSlaveSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_ListenCpltCallback) for HAL_I2C_ListenCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveTxCpltCallback) for HAL_I2C_SlaveTxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveRxCpltCallback) for HAL_I2C_SlaveRxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveRxCpltCallback) for HAL_I2C_SlaveRxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveTxCpltCallback) for HAL_I2C_SlaveTxCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt) for I2C_ITMasterSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) for I2C_ITMasterCplt + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt) for I2C_ITMasterSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) for I2C_ITMasterCplt + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) for I2C_ITMasterCplt + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ) for I2C_Disable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ) for I2C_Enable_IRQ + stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt) for I2C_ITMasterCplt + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryRead) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryRead) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) for I2C_WaitOnTXISFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryRead) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryWrite) refers to stm32h7xx_hal_i2c.o(i.I2C_TransferConfig) for I2C_TransferConfig + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryWrite) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) for I2C_WaitOnTXISFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryWrite) refers to stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) for I2C_WaitOnFlagUntilTimeout + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) for I2C_ITSlaveCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt) for I2C_ITListenCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) for I2C_ITSlaveSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA) refers to stm32h7xx_hal_i2c.o(i.I2C_ITAddrCplt) for I2C_ITAddrCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt) for I2C_ITSlaveCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITError) for I2C_ITError + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt) for I2C_ITListenCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR) for I2C_Flush_TXDR + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt) for I2C_ITSlaveSeqCplt + stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT) refers to stm32h7xx_hal_i2c.o(i.I2C_ITAddrCplt) for I2C_ITAddrCplt + stm32h7xx_hal_i2c.o(i.I2C_TreatErrorCallback) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_ErrorCallback) for HAL_I2C_ErrorCallback + stm32h7xx_hal_i2c.o(i.I2C_TreatErrorCallback) refers to stm32h7xx_hal_i2c.o(i.HAL_I2C_AbortCpltCallback) for HAL_I2C_AbortCpltCallback + stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) refers to stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) for I2C_IsErrorOccurred + stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout) refers to stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) for I2C_IsErrorOccurred + stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) refers to stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) for I2C_IsErrorOccurred + stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) refers to stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred) for I2C_IsErrorOccurred + stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) for HAL_RCC_GetHCLKFreq + stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) for HAL_RCCEx_GetPeriphCLKFreq + stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode) refers to stm32h7xx_hal.o(i.HAL_GetREVID) for HAL_GetREVID + stm32h7xx_hal_adc.o(i.ADC_ConversionStop) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.ADC_ConversionStop) refers to stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc.o(i.ADC_ConversionStop) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_ErrorCallback) for HAL_ADC_ErrorCallback + stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsTriggerSourceSWStart) for LL_ADC_REG_IsTriggerSourceSWStart + stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) refers to main.o(i.HAL_ADC_ConvCpltCallback) for HAL_ADC_ConvCpltCallback + stm32h7xx_hal_adc.o(i.ADC_DMAError) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_ErrorCallback) for HAL_ADC_ErrorCallback + stm32h7xx_hal_adc.o(i.ADC_DMAHalfConvCplt) refers to main.o(i.HAL_ADC_ConvHalfCpltCallback) for HAL_ADC_ConvHalfCpltCallback + stm32h7xx_hal_adc.o(i.ADC_Disable) refers to stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc.o(i.ADC_Disable) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.ADC_Enable) refers to stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc.o(i.ADC_Enable) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.HAL_ADC_AnalogWDGConfig) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_AnalogWDGConfig) refers to stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_AnalogWDGConfig) refers to stm32h7xx_hal_adc.o(i.LL_ADC_SetAnalogWDMonitChannels) for LL_ADC_SetAnalogWDMonitChannels + stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) refers to stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) refers to stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_adc.o(i.HAL_ADC_DeInit) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc.o(i.HAL_ADC_DeInit) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc.o(i.HAL_ADC_DeInit) refers to stm32h7xx_hal_msp.o(i.HAL_ADC_MspDeInit) for HAL_ADC_MspDeInit + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EndOfSamplingCallback) for HAL_ADCEx_EndOfSamplingCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsTriggerSourceSWStart) for LL_ADC_REG_IsTriggerSourceSWStart + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to main.o(i.HAL_ADC_ConvCpltCallback) for HAL_ADC_ConvCpltCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConvCpltCallback) for HAL_ADCEx_InjectedConvCpltCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_LevelOutOfWindowCallback) for HAL_ADC_LevelOutOfWindowCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LevelOutOfWindow2Callback) for HAL_ADCEx_LevelOutOfWindow2Callback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LevelOutOfWindow3Callback) for HAL_ADCEx_LevelOutOfWindow3Callback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc.o(i.HAL_ADC_ErrorCallback) for HAL_ADC_ErrorCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedQueueOverflowCallback) for HAL_ADCEx_InjectedQueueOverflowCallback + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) for HAL_ADC_MspInit + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal.o(i.HAL_GetREVID) for HAL_GetREVID + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode) for ADC_ConfigureBoostMode + stm32h7xx_hal_adc.o(i.HAL_ADC_Init) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_adc.o(i.HAL_ADC_PollForConversion) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.HAL_ADC_PollForConversion) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsTriggerSourceSWStart) for LL_ADC_REG_IsTriggerSourceSWStart + stm32h7xx_hal_adc.o(i.HAL_ADC_PollForEvent) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc.o(i.HAL_ADC_Start) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_Start) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) for ADC_DMAConvCplt + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAHalfConvCplt) for ADC_DMAHalfConvCplt + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAError) for ADC_DMAError + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_IT) refers to stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc.o(i.HAL_ADC_Start_IT) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_Start) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_DisableInjectedQueue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_DisableInjectedQueue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_DisableVoltageRegulator) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EnableInjectedQueue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EnableInjectedQueue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EnterADCDeepPowerDownMode) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_SetOffset) for LL_ADC_SetOffset + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_GetOffsetChannel) for LL_ADC_GetOffsetChannel + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedPollForConversion) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart_IT) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart_IT) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop_IT) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_FactorLoad) refers to stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) for HAL_ADCEx_LinearCalibration_SetValue + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_GetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_GetValue) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_GetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled) for LL_ADC_IsEnabled + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_SetCalibrationLinearFactor) for LL_ADC_SetCalibrationLinearFactor + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue) refers to system_stm32h7xx.o(.data) for SystemCoreClock + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeConfigChannel) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Enable) for ADC_Enable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) for ADC_DMAConvCplt + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAHalfConvCplt) for ADC_DMAHalfConvCplt + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_DMAError) for ADC_DMAError + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing) for LL_ADC_REG_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_DMA) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_DMA) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_ConversionStop) for ADC_ConversionStop + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_IT) refers to stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing) for LL_ADC_INJ_IsConversionOngoing + stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_IT) refers to stm32h7xx_hal_adc.o(i.ADC_Disable) for ADC_Disable + stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_Init) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) for HAL_UART_MspInit + stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_Init) refers to stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) for UART_AdvFeatureConfig + stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_Init) refers to stm32h7xx_hal_uart.o(i.UART_SetConfig) for UART_SetConfig + stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_Init) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_LIN_Init) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) for HAL_UART_MspInit + stm32h7xx_hal_uart.o(i.HAL_LIN_Init) refers to stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) for UART_AdvFeatureConfig + stm32h7xx_hal_uart.o(i.HAL_LIN_Init) refers to stm32h7xx_hal_uart.o(i.UART_SetConfig) for UART_SetConfig + stm32h7xx_hal_uart.o(i.HAL_LIN_Init) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_DisableMuteMode) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_EnableMuteMode) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_Init) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) for HAL_UART_MspInit + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_Init) refers to stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) for UART_AdvFeatureConfig + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_Init) refers to stm32h7xx_hal_uart.o(i.UART_SetConfig) for UART_SetConfig + stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_Init) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_UART_Abort) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_uart.o(i.HAL_UART_Abort) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetError) for HAL_DMA_GetError + stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetError) for HAL_DMA_GetError + stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive_IT) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive_IT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceiveCpltCallback) for HAL_UART_AbortReceiveCpltCallback + stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive_IT) refers to stm32h7xx_hal_uart.o(i.UART_DMARxOnlyAbortCallback) for UART_DMARxOnlyAbortCallback + stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetError) for HAL_DMA_GetError + stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit_IT) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit_IT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmitCpltCallback) for HAL_UART_AbortTransmitCpltCallback + stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit_IT) refers to stm32h7xx_hal_uart.o(i.UART_DMATxOnlyAbortCallback) for UART_DMATxOnlyAbortCallback + stm32h7xx_hal_uart.o(i.HAL_UART_Abort_IT) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_uart.o(i.HAL_UART_Abort_IT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortCpltCallback) for HAL_UART_AbortCpltCallback + stm32h7xx_hal_uart.o(i.HAL_UART_Abort_IT) refers to stm32h7xx_hal_uart.o(i.UART_DMATxAbortCallback) for UART_DMATxAbortCallback + stm32h7xx_hal_uart.o(i.HAL_UART_Abort_IT) refers to stm32h7xx_hal_uart.o(i.UART_DMARxAbortCallback) for UART_DMARxAbortCallback + stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_GetError) for HAL_DMA_GetError + stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop) refers to stm32h7xx_hal_uart.o(i.UART_EndTxTransfer) for UART_EndTxTransfer + stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop) refers to stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) for UART_EndRxTransfer + stm32h7xx_hal_uart.o(i.HAL_UART_DeInit) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspDeInit) for HAL_UART_MspDeInit + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) for UART_EndRxTransfer + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) for HAL_DMA_Abort_IT + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) for HAL_UART_ErrorCallback + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) for HAL_DMA_Abort + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_WakeupCallback) for HAL_UARTEx_WakeupCallback + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart.o(i.UART_EndTransmit_IT) for UART_EndTransmit_IT + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_TxFifoEmptyCallback) for HAL_UARTEx_TxFifoEmptyCallback + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_RxFifoFullCallback) for HAL_UARTEx_RxFifoFullCallback + stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) refers to stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError) for UART_DMAAbortOnError + stm32h7xx_hal_uart.o(i.HAL_UART_Init) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) for HAL_UART_MspInit + stm32h7xx_hal_uart.o(i.HAL_UART_Init) refers to stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) for UART_AdvFeatureConfig + stm32h7xx_hal_uart.o(i.HAL_UART_Init) refers to stm32h7xx_hal_uart.o(i.UART_SetConfig) for UART_SetConfig + stm32h7xx_hal_uart.o(i.HAL_UART_Init) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart.o(i.HAL_UART_Receive) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart.o(i.HAL_UART_Receive) refers to stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) for UART_WaitOnFlagUntilTimeout + stm32h7xx_hal_uart.o(i.HAL_UART_Receive_DMA) refers to stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) for UART_Start_Receive_DMA + stm32h7xx_hal_uart.o(i.HAL_UART_Receive_IT) refers to stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) for UART_Start_Receive_IT + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit) refers to stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) for UART_WaitOnFlagUntilTimeout + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMATransmitCplt) for UART_DMATransmitCplt + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMATxHalfCplt) for UART_DMATxHalfCplt + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMAError) for UART_DMAError + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_IT) refers to stm32h7xx_hal_uart.o(i.UART_TxISR_8BIT) for UART_TxISR_8BIT + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_IT) refers to stm32h7xx_hal_uart.o(i.UART_TxISR_8BIT_FIFOEN) for UART_TxISR_8BIT_FIFOEN + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_IT) refers to stm32h7xx_hal_uart.o(i.UART_TxISR_16BIT_FIFOEN) for UART_TxISR_16BIT_FIFOEN + stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_IT) refers to stm32h7xx_hal_uart.o(i.UART_TxISR_16BIT) for UART_TxISR_16BIT + stm32h7xx_hal_uart.o(i.UART_CheckIdleState) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart.o(i.UART_CheckIdleState) refers to stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) for UART_WaitOnFlagUntilTimeout + stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError) refers to stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) for HAL_UART_ErrorCallback + stm32h7xx_hal_uart.o(i.UART_DMAError) refers to stm32h7xx_hal_uart.o(i.UART_EndTxTransfer) for UART_EndTxTransfer + stm32h7xx_hal_uart.o(i.UART_DMAError) refers to stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) for UART_EndRxTransfer + stm32h7xx_hal_uart.o(i.UART_DMAError) refers to stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) for HAL_UART_ErrorCallback + stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) for HAL_UART_RxCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_DMARxAbortCallback) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortCpltCallback) for HAL_UART_AbortCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback) for HAL_UART_RxHalfCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_DMARxOnlyAbortCallback) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceiveCpltCallback) for HAL_UART_AbortReceiveCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMATransmitCplt) refers to stm32h7xx_hal_uart.o(i.HAL_UART_TxCpltCallback) for HAL_UART_TxCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMATxAbortCallback) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortCpltCallback) for HAL_UART_AbortCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMATxHalfCplt) refers to stm32h7xx_hal_uart.o(i.HAL_UART_TxHalfCpltCallback) for HAL_UART_TxHalfCpltCallback + stm32h7xx_hal_uart.o(i.UART_DMATxOnlyAbortCallback) refers to stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmitCpltCallback) for HAL_UART_AbortTransmitCpltCallback + stm32h7xx_hal_uart.o(i.UART_EndTransmit_IT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_TxCpltCallback) for HAL_UART_TxCpltCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) for HAL_UART_RxCpltCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) for HAL_UART_ErrorCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) for HAL_UART_RxCpltCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT) for UART_RxISR_16BIT + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) for HAL_UART_RxCpltCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) for HAL_UART_ErrorCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) for HAL_UART_RxCpltCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN) refers to main.o(i.HAL_UARTEx_RxEventCallback) for HAL_UARTEx_RxEventCallback + stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT) for UART_RxISR_8BIT + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) for HAL_RCCEx_GetD3PCLK1Freq + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq) for HAL_RCCEx_GetPLL2ClockFreq + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq) for HAL_RCCEx_GetPLL3ClockFreq + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to lludivv7m.o(.text) for __aeabi_uldivmod + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) for HAL_RCC_GetPCLK1Freq + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq) for HAL_RCC_GetPCLK2Freq + stm32h7xx_hal_uart.o(i.UART_SetConfig) refers to stm32h7xx_hal_uart.o(.constdata) for .constdata + stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) refers to stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) for HAL_DMA_Start_IT + stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) for UART_DMAReceiveCplt + stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) for UART_DMARxHalfCplt + stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) refers to stm32h7xx_hal_uart.o(i.UART_DMAError) for UART_DMAError + stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN) for UART_RxISR_8BIT_FIFOEN + stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN) for UART_RxISR_16BIT_FIFOEN + stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT) for UART_RxISR_8BIT + stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) refers to stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT) for UART_RxISR_16BIT + stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) refers to stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) for UART_EndRxTransfer + stm32h7xx_hal_uart_ex.o(i.HAL_MultiProcessorEx_AddressLength_Set) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart_ex.o(i.HAL_RS485Ex_Init) refers to stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) for HAL_UART_MspInit + stm32h7xx_hal_uart_ex.o(i.HAL_RS485Ex_Init) refers to stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) for UART_AdvFeatureConfig + stm32h7xx_hal_uart_ex.o(i.HAL_RS485Ex_Init) refers to stm32h7xx_hal_uart.o(i.UART_SetConfig) for UART_SetConfig + stm32h7xx_hal_uart_ex.o(i.HAL_RS485Ex_Init) refers to stm32h7xx_hal_uart.o(i.UART_CheckIdleState) for UART_CheckIdleState + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_EnableFifoMode) refers to stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) for UARTEx_SetNbDataToProcess + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) refers to stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) for UART_Start_Receive_DMA + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_IT) refers to stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT) for UART_Start_Receive_IT + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold) refers to stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) for UARTEx_SetNbDataToProcess + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold) refers to stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) for UARTEx_SetNbDataToProcess + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_StopModeWakeUpSourceConfig) refers to stm32h7xx_hal_uart_ex.o(i.UARTEx_Wakeup_AddressConfig) for UARTEx_Wakeup_AddressConfig + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_StopModeWakeUpSourceConfig) refers to stm32h7xx_hal.o(i.HAL_GetTick) for HAL_GetTick + stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_StopModeWakeUpSourceConfig) refers to stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) for UART_WaitOnFlagUntilTimeout + stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) refers to stm32h7xx_hal_uart_ex.o(.constdata) for .constdata + event_groups.o(i.vEventGroupClearBitsCallback) refers to event_groups.o(i.xEventGroupClearBits) for xEventGroupClearBits + event_groups.o(i.vEventGroupDelete) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + event_groups.o(i.vEventGroupDelete) refers to tasks.o(i.vTaskRemoveFromUnorderedEventList) for vTaskRemoveFromUnorderedEventList + event_groups.o(i.vEventGroupDelete) refers to heap_4.o(i.vPortFree) for vPortFree + event_groups.o(i.vEventGroupDelete) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + event_groups.o(i.vEventGroupSetBitsCallback) refers to event_groups.o(i.xEventGroupSetBits) for xEventGroupSetBits + event_groups.o(i.xEventGroupClearBits) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + event_groups.o(i.xEventGroupClearBits) refers to port.o(i.vPortExitCritical) for vPortExitCritical + event_groups.o(i.xEventGroupClearBitsFromISR) refers to timers.o(i.xTimerPendFunctionCallFromISR) for xTimerPendFunctionCallFromISR + event_groups.o(i.xEventGroupClearBitsFromISR) refers to event_groups.o(i.vEventGroupClearBitsCallback) for vEventGroupClearBitsCallback + event_groups.o(i.xEventGroupCreate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + event_groups.o(i.xEventGroupCreate) refers to list.o(i.vListInitialise) for vListInitialise + event_groups.o(i.xEventGroupCreateStatic) refers to list.o(i.vListInitialise) for vListInitialise + event_groups.o(i.xEventGroupSetBits) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + event_groups.o(i.xEventGroupSetBits) refers to tasks.o(i.vTaskRemoveFromUnorderedEventList) for vTaskRemoveFromUnorderedEventList + event_groups.o(i.xEventGroupSetBits) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + event_groups.o(i.xEventGroupSetBitsFromISR) refers to timers.o(i.xTimerPendFunctionCallFromISR) for xTimerPendFunctionCallFromISR + event_groups.o(i.xEventGroupSetBitsFromISR) refers to event_groups.o(i.vEventGroupSetBitsCallback) for vEventGroupSetBitsCallback + event_groups.o(i.xEventGroupSync) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + event_groups.o(i.xEventGroupSync) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + event_groups.o(i.xEventGroupSync) refers to event_groups.o(i.xEventGroupSetBits) for xEventGroupSetBits + event_groups.o(i.xEventGroupSync) refers to tasks.o(i.vTaskPlaceOnUnorderedEventList) for vTaskPlaceOnUnorderedEventList + event_groups.o(i.xEventGroupSync) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + event_groups.o(i.xEventGroupSync) refers to tasks.o(i.uxTaskResetEventItemValue) for uxTaskResetEventItemValue + event_groups.o(i.xEventGroupSync) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + event_groups.o(i.xEventGroupSync) refers to port.o(i.vPortExitCritical) for vPortExitCritical + event_groups.o(i.xEventGroupWaitBits) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + event_groups.o(i.xEventGroupWaitBits) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + event_groups.o(i.xEventGroupWaitBits) refers to event_groups.o(i.prvTestWaitCondition) for prvTestWaitCondition + event_groups.o(i.xEventGroupWaitBits) refers to tasks.o(i.vTaskPlaceOnUnorderedEventList) for vTaskPlaceOnUnorderedEventList + event_groups.o(i.xEventGroupWaitBits) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + event_groups.o(i.xEventGroupWaitBits) refers to tasks.o(i.uxTaskResetEventItemValue) for uxTaskResetEventItemValue + event_groups.o(i.xEventGroupWaitBits) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + event_groups.o(i.xEventGroupWaitBits) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.pcQueueGetName) refers to queue.o(.bss) for .bss + queue.o(i.prvCopyDataFromQueue) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + queue.o(i.prvCopyDataToQueue) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + queue.o(i.prvCopyDataToQueue) refers to tasks.o(i.xTaskPriorityDisinherit) for xTaskPriorityDisinherit + queue.o(i.prvInitialiseMutex) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + queue.o(i.prvInitialiseNewQueue) refers to queue.o(i.xQueueGenericReset) for xQueueGenericReset + queue.o(i.prvIsQueueEmpty) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.prvIsQueueEmpty) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.prvIsQueueFull) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.prvIsQueueFull) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.prvUnlockQueue) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.prvUnlockQueue) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.prvUnlockQueue) refers to tasks.o(i.vTaskMissedYield) for vTaskMissedYield + queue.o(i.prvUnlockQueue) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.uxQueueMessagesWaiting) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.uxQueueMessagesWaiting) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.uxQueueSpacesAvailable) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.uxQueueSpacesAvailable) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.vQueueAddToRegistry) refers to queue.o(.bss) for .bss + queue.o(i.vQueueDelete) refers to queue.o(i.vQueueUnregisterQueue) for vQueueUnregisterQueue + queue.o(i.vQueueDelete) refers to heap_4.o(i.vPortFree) for vPortFree + queue.o(i.vQueueUnregisterQueue) refers to queue.o(.bss) for .bss + queue.o(i.vQueueWaitForMessageRestricted) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.vQueueWaitForMessageRestricted) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.vQueueWaitForMessageRestricted) refers to tasks.o(i.vTaskPlaceOnEventListRestricted) for vTaskPlaceOnEventListRestricted + queue.o(i.vQueueWaitForMessageRestricted) refers to queue.o(i.prvUnlockQueue) for prvUnlockQueue + queue.o(i.xQueueCreateCountingSemaphore) refers to queue.o(i.xQueueGenericCreate) for xQueueGenericCreate + queue.o(i.xQueueCreateCountingSemaphoreStatic) refers to queue.o(i.xQueueGenericCreateStatic) for xQueueGenericCreateStatic + queue.o(i.xQueueCreateMutex) refers to queue.o(i.xQueueGenericCreate) for xQueueGenericCreate + queue.o(i.xQueueCreateMutex) refers to queue.o(i.prvInitialiseMutex) for prvInitialiseMutex + queue.o(i.xQueueCreateMutexStatic) refers to queue.o(i.xQueueGenericCreateStatic) for xQueueGenericCreateStatic + queue.o(i.xQueueCreateMutexStatic) refers to queue.o(i.prvInitialiseMutex) for prvInitialiseMutex + queue.o(i.xQueueGenericCreate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + queue.o(i.xQueueGenericCreate) refers to queue.o(i.prvInitialiseNewQueue) for prvInitialiseNewQueue + queue.o(i.xQueueGenericCreateStatic) refers to queue.o(i.prvInitialiseNewQueue) for prvInitialiseNewQueue + queue.o(i.xQueueGenericReset) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueueGenericReset) refers to list.o(i.vListInitialise) for vListInitialise + queue.o(i.xQueueGenericReset) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueueGenericReset) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueGenericSend) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + queue.o(i.xQueueGenericSend) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueueGenericSend) refers to queue.o(i.prvCopyDataToQueue) for prvCopyDataToQueue + queue.o(i.xQueueGenericSend) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueGenericSend) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueueGenericSend) refers to tasks.o(i.vTaskInternalSetTimeOutState) for vTaskInternalSetTimeOutState + queue.o(i.xQueueGenericSend) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + queue.o(i.xQueueGenericSend) refers to tasks.o(i.xTaskCheckForTimeOut) for xTaskCheckForTimeOut + queue.o(i.xQueueGenericSend) refers to queue.o(i.prvUnlockQueue) for prvUnlockQueue + queue.o(i.xQueueGenericSend) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + queue.o(i.xQueueGenericSend) refers to queue.o(i.prvIsQueueFull) for prvIsQueueFull + queue.o(i.xQueueGenericSend) refers to tasks.o(i.vTaskPlaceOnEventList) for vTaskPlaceOnEventList + queue.o(i.xQueueGenericSendFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + queue.o(i.xQueueGenericSendFromISR) refers to queue.o(i.prvCopyDataToQueue) for prvCopyDataToQueue + queue.o(i.xQueueGenericSendFromISR) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueGetMutexHolder) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueueGetMutexHolder) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueueGiveFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + queue.o(i.xQueueGiveFromISR) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueGiveMutexRecursive) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + queue.o(i.xQueueGiveMutexRecursive) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + queue.o(i.xQueuePeek) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + queue.o(i.xQueuePeek) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueuePeek) refers to queue.o(i.prvCopyDataFromQueue) for prvCopyDataFromQueue + queue.o(i.xQueuePeek) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueuePeek) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueuePeek) refers to tasks.o(i.vTaskInternalSetTimeOutState) for vTaskInternalSetTimeOutState + queue.o(i.xQueuePeek) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + queue.o(i.xQueuePeek) refers to tasks.o(i.xTaskCheckForTimeOut) for xTaskCheckForTimeOut + queue.o(i.xQueuePeek) refers to queue.o(i.prvUnlockQueue) for prvUnlockQueue + queue.o(i.xQueuePeek) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + queue.o(i.xQueuePeek) refers to queue.o(i.prvIsQueueEmpty) for prvIsQueueEmpty + queue.o(i.xQueuePeek) refers to tasks.o(i.vTaskPlaceOnEventList) for vTaskPlaceOnEventList + queue.o(i.xQueuePeekFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + queue.o(i.xQueuePeekFromISR) refers to queue.o(i.prvCopyDataFromQueue) for prvCopyDataFromQueue + queue.o(i.xQueueReceive) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + queue.o(i.xQueueReceive) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueueReceive) refers to queue.o(i.prvCopyDataFromQueue) for prvCopyDataFromQueue + queue.o(i.xQueueReceive) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueReceive) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueueReceive) refers to tasks.o(i.vTaskInternalSetTimeOutState) for vTaskInternalSetTimeOutState + queue.o(i.xQueueReceive) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + queue.o(i.xQueueReceive) refers to tasks.o(i.xTaskCheckForTimeOut) for xTaskCheckForTimeOut + queue.o(i.xQueueReceive) refers to queue.o(i.prvUnlockQueue) for prvUnlockQueue + queue.o(i.xQueueReceive) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + queue.o(i.xQueueReceive) refers to queue.o(i.prvIsQueueEmpty) for prvIsQueueEmpty + queue.o(i.xQueueReceive) refers to tasks.o(i.vTaskPlaceOnEventList) for vTaskPlaceOnEventList + queue.o(i.xQueueReceiveFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + queue.o(i.xQueueReceiveFromISR) refers to queue.o(i.prvCopyDataFromQueue) for prvCopyDataFromQueue + queue.o(i.xQueueReceiveFromISR) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + queue.o(i.xQueueSemaphoreTake) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.pvTaskIncrementMutexHeldCount) for pvTaskIncrementMutexHeldCount + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.xTaskRemoveFromEventList) for xTaskRemoveFromEventList + queue.o(i.xQueueSemaphoreTake) refers to port.o(i.vPortExitCritical) for vPortExitCritical + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.vTaskInternalSetTimeOutState) for vTaskInternalSetTimeOutState + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.xTaskCheckForTimeOut) for xTaskCheckForTimeOut + queue.o(i.xQueueSemaphoreTake) refers to queue.o(i.prvUnlockQueue) for prvUnlockQueue + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + queue.o(i.xQueueSemaphoreTake) refers to queue.o(i.prvIsQueueEmpty) for prvIsQueueEmpty + queue.o(i.xQueueSemaphoreTake) refers to queue.o(i.prvGetDisinheritPriorityAfterTimeout) for prvGetDisinheritPriorityAfterTimeout + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.vTaskPriorityDisinheritAfterTimeout) for vTaskPriorityDisinheritAfterTimeout + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.xTaskPriorityInherit) for xTaskPriorityInherit + queue.o(i.xQueueSemaphoreTake) refers to tasks.o(i.vTaskPlaceOnEventList) for vTaskPlaceOnEventList + queue.o(i.xQueueTakeMutexRecursive) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + queue.o(i.xQueueTakeMutexRecursive) refers to queue.o(i.xQueueSemaphoreTake) for xQueueSemaphoreTake + stream_buffer.o(i.prvInitialiseNewStreamBuffer) refers to memset.o(.text) for memset + stream_buffer.o(i.prvInitialiseNewStreamBuffer) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + stream_buffer.o(i.prvReadBytesFromBuffer) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + stream_buffer.o(i.prvReadMessageFromBuffer) refers to stream_buffer.o(i.prvReadBytesFromBuffer) for prvReadBytesFromBuffer + stream_buffer.o(i.prvWriteBytesToBuffer) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + stream_buffer.o(i.prvWriteMessageToBuffer) refers to stream_buffer.o(i.prvWriteBytesToBuffer) for prvWriteBytesToBuffer + stream_buffer.o(i.vStreamBufferDelete) refers to heap_4.o(i.vPortFree) for vPortFree + stream_buffer.o(i.vStreamBufferDelete) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + stream_buffer.o(i.xStreamBufferBytesAvailable) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferGenericCreate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + stream_buffer.o(i.xStreamBufferGenericCreate) refers to stream_buffer.o(i.prvInitialiseNewStreamBuffer) for prvInitialiseNewStreamBuffer + stream_buffer.o(i.xStreamBufferGenericCreateStatic) refers to stream_buffer.o(i.prvInitialiseNewStreamBuffer) for prvInitialiseNewStreamBuffer + stream_buffer.o(i.xStreamBufferIsFull) refers to stream_buffer.o(i.xStreamBufferSpacesAvailable) for xStreamBufferSpacesAvailable + stream_buffer.o(i.xStreamBufferNextMessageLengthBytes) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferNextMessageLengthBytes) refers to stream_buffer.o(i.prvReadBytesFromBuffer) for prvReadBytesFromBuffer + stream_buffer.o(i.xStreamBufferReceive) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + stream_buffer.o(i.xStreamBufferReceive) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.xTaskNotifyStateClear) for xTaskNotifyStateClear + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + stream_buffer.o(i.xStreamBufferReceive) refers to port.o(i.vPortExitCritical) for vPortExitCritical + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.xTaskNotifyWait) for xTaskNotifyWait + stream_buffer.o(i.xStreamBufferReceive) refers to stream_buffer.o(i.prvReadMessageFromBuffer) for prvReadMessageFromBuffer + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.xTaskGenericNotify) for xTaskGenericNotify + stream_buffer.o(i.xStreamBufferReceive) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + stream_buffer.o(i.xStreamBufferReceiveCompletedFromISR) refers to tasks.o(i.xTaskGenericNotifyFromISR) for xTaskGenericNotifyFromISR + stream_buffer.o(i.xStreamBufferReceiveFromISR) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferReceiveFromISR) refers to stream_buffer.o(i.prvReadMessageFromBuffer) for prvReadMessageFromBuffer + stream_buffer.o(i.xStreamBufferReceiveFromISR) refers to tasks.o(i.xTaskGenericNotifyFromISR) for xTaskGenericNotifyFromISR + stream_buffer.o(i.xStreamBufferReset) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + stream_buffer.o(i.xStreamBufferReset) refers to stream_buffer.o(i.prvInitialiseNewStreamBuffer) for prvInitialiseNewStreamBuffer + stream_buffer.o(i.xStreamBufferReset) refers to port.o(i.vPortExitCritical) for vPortExitCritical + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.vTaskSetTimeOutState) for vTaskSetTimeOutState + stream_buffer.o(i.xStreamBufferSend) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + stream_buffer.o(i.xStreamBufferSend) refers to stream_buffer.o(i.xStreamBufferSpacesAvailable) for xStreamBufferSpacesAvailable + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskNotifyStateClear) for xTaskNotifyStateClear + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + stream_buffer.o(i.xStreamBufferSend) refers to port.o(i.vPortExitCritical) for vPortExitCritical + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskNotifyWait) for xTaskNotifyWait + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskCheckForTimeOut) for xTaskCheckForTimeOut + stream_buffer.o(i.xStreamBufferSend) refers to stream_buffer.o(i.prvWriteMessageToBuffer) for prvWriteMessageToBuffer + stream_buffer.o(i.xStreamBufferSend) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskGenericNotify) for xTaskGenericNotify + stream_buffer.o(i.xStreamBufferSend) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + stream_buffer.o(i.xStreamBufferSendCompletedFromISR) refers to tasks.o(i.xTaskGenericNotifyFromISR) for xTaskGenericNotifyFromISR + stream_buffer.o(i.xStreamBufferSendFromISR) refers to stream_buffer.o(i.xStreamBufferSpacesAvailable) for xStreamBufferSpacesAvailable + stream_buffer.o(i.xStreamBufferSendFromISR) refers to stream_buffer.o(i.prvWriteMessageToBuffer) for prvWriteMessageToBuffer + stream_buffer.o(i.xStreamBufferSendFromISR) refers to stream_buffer.o(i.prvBytesInBuffer) for prvBytesInBuffer + stream_buffer.o(i.xStreamBufferSendFromISR) refers to tasks.o(i.xTaskGenericNotifyFromISR) for xTaskGenericNotifyFromISR + tasks.o(i.eTaskGetState) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.eTaskGetState) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.eTaskGetState) refers to tasks.o(.data) for .data + tasks.o(i.eTaskGetState) refers to tasks.o(.bss) for .bss + tasks.o(i.pcTaskGetName) refers to tasks.o(.data) for .data + tasks.o(i.prvAddCurrentTaskToDelayedList) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.prvAddCurrentTaskToDelayedList) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.prvAddCurrentTaskToDelayedList) refers to list.o(i.vListInsert) for vListInsert + tasks.o(i.prvAddCurrentTaskToDelayedList) refers to tasks.o(.data) for .data + tasks.o(i.prvAddCurrentTaskToDelayedList) refers to tasks.o(.bss) for .bss + tasks.o(i.prvAddNewTaskToReadyList) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.prvAddNewTaskToReadyList) refers to tasks.o(i.prvInitialiseTaskLists) for prvInitialiseTaskLists + tasks.o(i.prvAddNewTaskToReadyList) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.prvAddNewTaskToReadyList) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.prvAddNewTaskToReadyList) refers to tasks.o(.data) for .data + tasks.o(i.prvAddNewTaskToReadyList) refers to tasks.o(.bss) for .bss + tasks.o(i.prvCheckTasksWaitingTermination) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.prvCheckTasksWaitingTermination) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.prvCheckTasksWaitingTermination) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.prvCheckTasksWaitingTermination) refers to tasks.o(i.prvDeleteTCB) for prvDeleteTCB + tasks.o(i.prvCheckTasksWaitingTermination) refers to tasks.o(.data) for .data + tasks.o(i.prvCheckTasksWaitingTermination) refers to tasks.o(.bss) for .bss + tasks.o(i.prvDeleteTCB) refers to heap_4.o(i.vPortFree) for vPortFree + tasks.o(i.prvIdleTask) refers to tasks.o(i.prvCheckTasksWaitingTermination) for prvCheckTasksWaitingTermination + tasks.o(i.prvIdleTask) refers to tasks.o(.bss) for .bss + tasks.o(i.prvInitialiseNewTask) refers to aeabi_memset.o(.text) for __aeabi_memset + tasks.o(i.prvInitialiseNewTask) refers to list.o(i.vListInitialiseItem) for vListInitialiseItem + tasks.o(i.prvInitialiseNewTask) refers to port.o(i.pxPortInitialiseStack) for pxPortInitialiseStack + tasks.o(i.prvInitialiseTaskLists) refers to list.o(i.vListInitialise) for vListInitialise + tasks.o(i.prvInitialiseTaskLists) refers to tasks.o(.bss) for .bss + tasks.o(i.prvInitialiseTaskLists) refers to tasks.o(.data) for .data + tasks.o(i.prvListTasksWithinSingleList) refers to tasks.o(i.vTaskGetInfo) for vTaskGetInfo + tasks.o(i.prvResetNextTaskUnblockTime) refers to tasks.o(.data) for .data + tasks.o(i.prvTaskIsTaskSuspended) refers to tasks.o(.bss) for .bss + tasks.o(i.pvTaskIncrementMutexHeldCount) refers to tasks.o(.data) for .data + tasks.o(i.ulTaskNotifyTake) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.ulTaskNotifyTake) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.ulTaskNotifyTake) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.ulTaskNotifyTake) refers to tasks.o(.data) for .data + tasks.o(i.ulTaskNotifyValueClear) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.ulTaskNotifyValueClear) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.ulTaskNotifyValueClear) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskGetNumberOfTasks) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskGetStackHighWaterMark) refers to tasks.o(i.prvTaskCheckFreeStackSpace) for prvTaskCheckFreeStackSpace + tasks.o(i.uxTaskGetStackHighWaterMark) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskGetSystemState) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + tasks.o(i.uxTaskGetSystemState) refers to tasks.o(i.prvListTasksWithinSingleList) for prvListTasksWithinSingleList + tasks.o(i.uxTaskGetSystemState) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + tasks.o(i.uxTaskGetSystemState) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskGetSystemState) refers to tasks.o(.bss) for .bss + tasks.o(i.uxTaskPriorityGet) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.uxTaskPriorityGet) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.uxTaskPriorityGet) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskPriorityGetFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + tasks.o(i.uxTaskPriorityGetFromISR) refers to tasks.o(.data) for .data + tasks.o(i.uxTaskResetEventItemValue) refers to tasks.o(.data) for .data + tasks.o(i.vTaskDelay) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + tasks.o(i.vTaskDelay) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.vTaskDelay) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + tasks.o(i.vTaskDelay) refers to tasks.o(.data) for .data + tasks.o(i.vTaskDelayUntil) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + tasks.o(i.vTaskDelayUntil) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.vTaskDelayUntil) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + tasks.o(i.vTaskDelayUntil) refers to tasks.o(.data) for .data + tasks.o(i.vTaskDelete) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.vTaskDelete) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskDelete) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskDelete) refers to tasks.o(i.prvDeleteTCB) for prvDeleteTCB + tasks.o(i.vTaskDelete) refers to tasks.o(i.prvResetNextTaskUnblockTime) for prvResetNextTaskUnblockTime + tasks.o(i.vTaskDelete) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.vTaskDelete) refers to tasks.o(.data) for .data + tasks.o(i.vTaskDelete) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskEndScheduler) refers to port.o(i.vPortEndScheduler) for vPortEndScheduler + tasks.o(i.vTaskEndScheduler) refers to tasks.o(.data) for .data + tasks.o(i.vTaskGetInfo) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + tasks.o(i.vTaskGetInfo) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + tasks.o(i.vTaskGetInfo) refers to tasks.o(i.eTaskGetState) for eTaskGetState + tasks.o(i.vTaskGetInfo) refers to tasks.o(i.prvTaskCheckFreeStackSpace) for prvTaskCheckFreeStackSpace + tasks.o(i.vTaskGetInfo) refers to tasks.o(.data) for .data + tasks.o(i.vTaskInternalSetTimeOutState) refers to tasks.o(.data) for .data + tasks.o(i.vTaskMissedYield) refers to tasks.o(.data) for .data + tasks.o(i.vTaskNotifyGiveFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + tasks.o(i.vTaskNotifyGiveFromISR) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskNotifyGiveFromISR) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskNotifyGiveFromISR) refers to tasks.o(.data) for .data + tasks.o(i.vTaskNotifyGiveFromISR) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskPlaceOnEventList) refers to list.o(i.vListInsert) for vListInsert + tasks.o(i.vTaskPlaceOnEventList) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.vTaskPlaceOnEventList) refers to tasks.o(.data) for .data + tasks.o(i.vTaskPlaceOnEventListRestricted) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskPlaceOnEventListRestricted) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.vTaskPlaceOnEventListRestricted) refers to tasks.o(.data) for .data + tasks.o(i.vTaskPlaceOnUnorderedEventList) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskPlaceOnUnorderedEventList) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.vTaskPlaceOnUnorderedEventList) refers to tasks.o(.data) for .data + tasks.o(i.vTaskPriorityDisinheritAfterTimeout) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskPriorityDisinheritAfterTimeout) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskPriorityDisinheritAfterTimeout) refers to tasks.o(.data) for .data + tasks.o(i.vTaskPriorityDisinheritAfterTimeout) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskPrioritySet) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.vTaskPrioritySet) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskPrioritySet) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskPrioritySet) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.vTaskPrioritySet) refers to tasks.o(.data) for .data + tasks.o(i.vTaskPrioritySet) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskRemoveFromUnorderedEventList) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskRemoveFromUnorderedEventList) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskRemoveFromUnorderedEventList) refers to tasks.o(.data) for .data + tasks.o(i.vTaskRemoveFromUnorderedEventList) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskResume) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.vTaskResume) refers to tasks.o(i.prvTaskIsTaskSuspended) for prvTaskIsTaskSuspended + tasks.o(i.vTaskResume) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskResume) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskResume) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.vTaskResume) refers to tasks.o(.data) for .data + tasks.o(i.vTaskResume) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskSetTimeOutState) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.vTaskSetTimeOutState) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.vTaskSetTimeOutState) refers to tasks.o(.data) for .data + tasks.o(i.vTaskStartScheduler) refers to cmsis_os2.o(i.vApplicationGetIdleTaskMemory) for vApplicationGetIdleTaskMemory + tasks.o(i.vTaskStartScheduler) refers to tasks.o(i.xTaskCreateStatic) for xTaskCreateStatic + tasks.o(i.vTaskStartScheduler) refers to timers.o(i.xTimerCreateTimerTask) for xTimerCreateTimerTask + tasks.o(i.vTaskStartScheduler) refers to port.o(i.xPortStartScheduler) for xPortStartScheduler + tasks.o(i.vTaskStartScheduler) refers to tasks.o(i.prvIdleTask) for prvIdleTask + tasks.o(i.vTaskStartScheduler) refers to tasks.o(.data) for .data + tasks.o(i.vTaskSuspend) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.vTaskSuspend) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.vTaskSuspend) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.vTaskSuspend) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.vTaskSuspend) refers to tasks.o(i.prvResetNextTaskUnblockTime) for prvResetNextTaskUnblockTime + tasks.o(i.vTaskSuspend) refers to tasks.o(i.vTaskSwitchContext) for vTaskSwitchContext + tasks.o(i.vTaskSuspend) refers to tasks.o(.data) for .data + tasks.o(i.vTaskSuspend) refers to tasks.o(.bss) for .bss + tasks.o(i.vTaskSuspendAll) refers to tasks.o(.data) for .data + tasks.o(i.vTaskSwitchContext) refers to tasks.o(.data) for .data + tasks.o(i.vTaskSwitchContext) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskCatchUpTicks) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + tasks.o(i.xTaskCatchUpTicks) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + tasks.o(i.xTaskCatchUpTicks) refers to tasks.o(.data) for .data + tasks.o(i.xTaskCheckForTimeOut) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.xTaskCheckForTimeOut) refers to tasks.o(i.vTaskInternalSetTimeOutState) for vTaskInternalSetTimeOutState + tasks.o(i.xTaskCheckForTimeOut) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.xTaskCheckForTimeOut) refers to tasks.o(.data) for .data + tasks.o(i.xTaskCreate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + tasks.o(i.xTaskCreate) refers to heap_4.o(i.vPortFree) for vPortFree + tasks.o(i.xTaskCreate) refers to tasks.o(i.prvInitialiseNewTask) for prvInitialiseNewTask + tasks.o(i.xTaskCreate) refers to tasks.o(i.prvAddNewTaskToReadyList) for prvAddNewTaskToReadyList + tasks.o(i.xTaskCreateStatic) refers to tasks.o(i.prvInitialiseNewTask) for prvInitialiseNewTask + tasks.o(i.xTaskCreateStatic) refers to tasks.o(i.prvAddNewTaskToReadyList) for prvAddNewTaskToReadyList + tasks.o(i.xTaskGenericNotify) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.xTaskGenericNotify) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskGenericNotify) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskGenericNotify) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.xTaskGenericNotify) refers to tasks.o(.data) for .data + tasks.o(i.xTaskGenericNotify) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskGenericNotifyFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + tasks.o(i.xTaskGenericNotifyFromISR) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskGenericNotifyFromISR) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskGenericNotifyFromISR) refers to tasks.o(.data) for .data + tasks.o(i.xTaskGenericNotifyFromISR) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskGetCurrentTaskHandle) refers to tasks.o(.data) for .data + tasks.o(i.xTaskGetSchedulerState) refers to tasks.o(.data) for .data + tasks.o(i.xTaskGetTickCount) refers to tasks.o(.data) for .data + tasks.o(i.xTaskGetTickCountFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + tasks.o(i.xTaskGetTickCountFromISR) refers to tasks.o(.data) for .data + tasks.o(i.xTaskIncrementTick) refers to tasks.o(i.prvResetNextTaskUnblockTime) for prvResetNextTaskUnblockTime + tasks.o(i.xTaskIncrementTick) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskIncrementTick) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskIncrementTick) refers to tasks.o(.data) for .data + tasks.o(i.xTaskIncrementTick) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskNotifyStateClear) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.xTaskNotifyStateClear) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.xTaskNotifyStateClear) refers to tasks.o(.data) for .data + tasks.o(i.xTaskNotifyWait) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.xTaskNotifyWait) refers to tasks.o(i.prvAddCurrentTaskToDelayedList) for prvAddCurrentTaskToDelayedList + tasks.o(i.xTaskNotifyWait) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.xTaskNotifyWait) refers to tasks.o(.data) for .data + tasks.o(i.xTaskPriorityDisinherit) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskPriorityDisinherit) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskPriorityDisinherit) refers to tasks.o(.data) for .data + tasks.o(i.xTaskPriorityDisinherit) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskPriorityInherit) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskPriorityInherit) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskPriorityInherit) refers to tasks.o(.data) for .data + tasks.o(i.xTaskPriorityInherit) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskRemoveFromEventList) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskRemoveFromEventList) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskRemoveFromEventList) refers to tasks.o(.data) for .data + tasks.o(i.xTaskRemoveFromEventList) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskResumeAll) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + tasks.o(i.xTaskResumeAll) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskResumeAll) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskResumeAll) refers to tasks.o(i.prvResetNextTaskUnblockTime) for prvResetNextTaskUnblockTime + tasks.o(i.xTaskResumeAll) refers to tasks.o(i.xTaskIncrementTick) for xTaskIncrementTick + tasks.o(i.xTaskResumeAll) refers to port.o(i.vPortExitCritical) for vPortExitCritical + tasks.o(i.xTaskResumeAll) refers to tasks.o(.data) for .data + tasks.o(i.xTaskResumeAll) refers to tasks.o(.bss) for .bss + tasks.o(i.xTaskResumeFromISR) refers to port.o(i.vPortValidateInterruptPriority) for vPortValidateInterruptPriority + tasks.o(i.xTaskResumeFromISR) refers to tasks.o(i.prvTaskIsTaskSuspended) for prvTaskIsTaskSuspended + tasks.o(i.xTaskResumeFromISR) refers to list.o(i.vListInsertEnd) for vListInsertEnd + tasks.o(i.xTaskResumeFromISR) refers to list.o(i.uxListRemove) for uxListRemove + tasks.o(i.xTaskResumeFromISR) refers to tasks.o(.data) for .data + tasks.o(i.xTaskResumeFromISR) refers to tasks.o(.bss) for .bss + timers.o(i.prvCheckForValidListAndQueue) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.prvCheckForValidListAndQueue) refers to list.o(i.vListInitialise) for vListInitialise + timers.o(i.prvCheckForValidListAndQueue) refers to queue.o(i.xQueueGenericCreateStatic) for xQueueGenericCreateStatic + timers.o(i.prvCheckForValidListAndQueue) refers to queue.o(i.vQueueAddToRegistry) for vQueueAddToRegistry + timers.o(i.prvCheckForValidListAndQueue) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.prvCheckForValidListAndQueue) refers to timers.o(.data) for .data + timers.o(i.prvCheckForValidListAndQueue) refers to timers.o(.bss) for .bss + timers.o(i.prvGetNextExpireTime) refers to timers.o(.data) for .data + timers.o(i.prvInitialiseNewTimer) refers to timers.o(i.prvCheckForValidListAndQueue) for prvCheckForValidListAndQueue + timers.o(i.prvInitialiseNewTimer) refers to list.o(i.vListInitialiseItem) for vListInitialiseItem + timers.o(i.prvInsertTimerInActiveList) refers to list.o(i.vListInsert) for vListInsert + timers.o(i.prvInsertTimerInActiveList) refers to timers.o(.data) for .data + timers.o(i.prvProcessExpiredTimer) refers to list.o(i.uxListRemove) for uxListRemove + timers.o(i.prvProcessExpiredTimer) refers to timers.o(i.prvInsertTimerInActiveList) for prvInsertTimerInActiveList + timers.o(i.prvProcessExpiredTimer) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + timers.o(i.prvProcessExpiredTimer) refers to timers.o(.data) for .data + timers.o(i.prvProcessReceivedCommands) refers to list.o(i.uxListRemove) for uxListRemove + timers.o(i.prvProcessReceivedCommands) refers to timers.o(i.prvSampleTimeNow) for prvSampleTimeNow + timers.o(i.prvProcessReceivedCommands) refers to timers.o(i.prvInsertTimerInActiveList) for prvInsertTimerInActiveList + timers.o(i.prvProcessReceivedCommands) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + timers.o(i.prvProcessReceivedCommands) refers to heap_4.o(i.vPortFree) for vPortFree + timers.o(i.prvProcessReceivedCommands) refers to queue.o(i.xQueueReceive) for xQueueReceive + timers.o(i.prvProcessReceivedCommands) refers to timers.o(.data) for .data + timers.o(i.prvProcessTimerOrBlockTask) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + timers.o(i.prvProcessTimerOrBlockTask) refers to timers.o(i.prvSampleTimeNow) for prvSampleTimeNow + timers.o(i.prvProcessTimerOrBlockTask) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + timers.o(i.prvProcessTimerOrBlockTask) refers to timers.o(i.prvProcessExpiredTimer) for prvProcessExpiredTimer + timers.o(i.prvProcessTimerOrBlockTask) refers to queue.o(i.vQueueWaitForMessageRestricted) for vQueueWaitForMessageRestricted + timers.o(i.prvProcessTimerOrBlockTask) refers to timers.o(.data) for .data + timers.o(i.prvSampleTimeNow) refers to tasks.o(i.xTaskGetTickCount) for xTaskGetTickCount + timers.o(i.prvSampleTimeNow) refers to timers.o(i.prvSwitchTimerLists) for prvSwitchTimerLists + timers.o(i.prvSampleTimeNow) refers to timers.o(.data) for .data + timers.o(i.prvSwitchTimerLists) refers to list.o(i.uxListRemove) for uxListRemove + timers.o(i.prvSwitchTimerLists) refers to list.o(i.vListInsert) for vListInsert + timers.o(i.prvSwitchTimerLists) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + timers.o(i.prvSwitchTimerLists) refers to timers.o(.data) for .data + timers.o(i.prvTimerTask) refers to timers.o(i.prvGetNextExpireTime) for prvGetNextExpireTime + timers.o(i.prvTimerTask) refers to timers.o(i.prvProcessTimerOrBlockTask) for prvProcessTimerOrBlockTask + timers.o(i.prvTimerTask) refers to timers.o(i.prvProcessReceivedCommands) for prvProcessReceivedCommands + timers.o(i.pvTimerGetTimerID) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.pvTimerGetTimerID) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.uxTimerGetReloadMode) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.uxTimerGetReloadMode) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.vTimerSetReloadMode) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.vTimerSetReloadMode) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.vTimerSetTimerID) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.vTimerSetTimerID) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.xTimerCreate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + timers.o(i.xTimerCreate) refers to timers.o(i.prvInitialiseNewTimer) for prvInitialiseNewTimer + timers.o(i.xTimerCreateStatic) refers to timers.o(i.prvInitialiseNewTimer) for prvInitialiseNewTimer + timers.o(i.xTimerCreateTimerTask) refers to timers.o(i.prvCheckForValidListAndQueue) for prvCheckForValidListAndQueue + timers.o(i.xTimerCreateTimerTask) refers to cmsis_os2.o(i.vApplicationGetTimerTaskMemory) for vApplicationGetTimerTaskMemory + timers.o(i.xTimerCreateTimerTask) refers to tasks.o(i.xTaskCreateStatic) for xTaskCreateStatic + timers.o(i.xTimerCreateTimerTask) refers to timers.o(.data) for .data + timers.o(i.xTimerCreateTimerTask) refers to timers.o(i.prvTimerTask) for prvTimerTask + timers.o(i.xTimerGenericCommand) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + timers.o(i.xTimerGenericCommand) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + timers.o(i.xTimerGenericCommand) refers to queue.o(i.xQueueGenericSendFromISR) for xQueueGenericSendFromISR + timers.o(i.xTimerGenericCommand) refers to timers.o(.data) for .data + timers.o(i.xTimerGetTimerDaemonTaskHandle) refers to timers.o(.data) for .data + timers.o(i.xTimerIsTimerActive) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + timers.o(i.xTimerIsTimerActive) refers to port.o(i.vPortExitCritical) for vPortExitCritical + timers.o(i.xTimerPendFunctionCall) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + timers.o(i.xTimerPendFunctionCall) refers to timers.o(.data) for .data + timers.o(i.xTimerPendFunctionCallFromISR) refers to queue.o(i.xQueueGenericSendFromISR) for xQueueGenericSendFromISR + timers.o(i.xTimerPendFunctionCallFromISR) refers to timers.o(.data) for .data + cmsis_os2.o(i.SysTick_Handler) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + cmsis_os2.o(i.SysTick_Handler) refers to port.o(i.xPortSysTickHandler) for xPortSysTickHandler + cmsis_os2.o(i.TimerCallback) refers to timers.o(i.pvTimerGetTimerID) for pvTimerGetTimerID + cmsis_os2.o(i.osDelay) refers to tasks.o(i.vTaskDelay) for vTaskDelay + cmsis_os2.o(i.osDelayUntil) refers to tasks.o(i.xTaskGetTickCount) for xTaskGetTickCount + cmsis_os2.o(i.osDelayUntil) refers to tasks.o(i.vTaskDelayUntil) for vTaskDelayUntil + cmsis_os2.o(i.osEventFlagsClear) refers to event_groups.o(i.xEventGroupGetBitsFromISR) for xEventGroupGetBitsFromISR + cmsis_os2.o(i.osEventFlagsClear) refers to event_groups.o(i.xEventGroupClearBitsFromISR) for xEventGroupClearBitsFromISR + cmsis_os2.o(i.osEventFlagsClear) refers to event_groups.o(i.xEventGroupClearBits) for xEventGroupClearBits + cmsis_os2.o(i.osEventFlagsDelete) refers to event_groups.o(i.vEventGroupDelete) for vEventGroupDelete + cmsis_os2.o(i.osEventFlagsGet) refers to event_groups.o(i.xEventGroupGetBitsFromISR) for xEventGroupGetBitsFromISR + cmsis_os2.o(i.osEventFlagsGet) refers to event_groups.o(i.xEventGroupClearBits) for xEventGroupClearBits + cmsis_os2.o(i.osEventFlagsNew) refers to event_groups.o(i.xEventGroupCreateStatic) for xEventGroupCreateStatic + cmsis_os2.o(i.osEventFlagsNew) refers to event_groups.o(i.xEventGroupCreate) for xEventGroupCreate + cmsis_os2.o(i.osEventFlagsSet) refers to event_groups.o(i.xEventGroupSetBitsFromISR) for xEventGroupSetBitsFromISR + cmsis_os2.o(i.osEventFlagsSet) refers to event_groups.o(i.xEventGroupSetBits) for xEventGroupSetBits + cmsis_os2.o(i.osEventFlagsWait) refers to event_groups.o(i.xEventGroupWaitBits) for xEventGroupWaitBits + cmsis_os2.o(i.osKernelGetInfo) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + cmsis_os2.o(i.osKernelGetState) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + cmsis_os2.o(i.osKernelGetState) refers to cmsis_os2.o(.data) for .data + cmsis_os2.o(i.osKernelGetSysTimerCount) refers to tasks.o(i.xTaskGetTickCount) for xTaskGetTickCount + cmsis_os2.o(i.osKernelGetSysTimerCount) refers to cmsis_os2.o(i.OS_Tick_GetCount) for OS_Tick_GetCount + cmsis_os2.o(i.osKernelGetSysTimerCount) refers to cmsis_os2.o(i.OS_Tick_GetOverflow) for OS_Tick_GetOverflow + cmsis_os2.o(i.osKernelGetSysTimerCount) refers to cmsis_os2.o(i.OS_Tick_GetInterval) for OS_Tick_GetInterval + cmsis_os2.o(i.osKernelGetSysTimerFreq) refers to system_stm32h7xx.o(.data) for SystemCoreClock + cmsis_os2.o(i.osKernelGetTickCount) refers to tasks.o(i.xTaskGetTickCountFromISR) for xTaskGetTickCountFromISR + cmsis_os2.o(i.osKernelGetTickCount) refers to tasks.o(i.xTaskGetTickCount) for xTaskGetTickCount + cmsis_os2.o(i.osKernelInitialize) refers to cmsis_os2.o(.data) for .data + cmsis_os2.o(i.osKernelLock) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + cmsis_os2.o(i.osKernelLock) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + cmsis_os2.o(i.osKernelRestoreLock) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + cmsis_os2.o(i.osKernelRestoreLock) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + cmsis_os2.o(i.osKernelRestoreLock) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + cmsis_os2.o(i.osKernelStart) refers to tasks.o(i.vTaskStartScheduler) for vTaskStartScheduler + cmsis_os2.o(i.osKernelStart) refers to cmsis_os2.o(.data) for .data + cmsis_os2.o(i.osKernelUnlock) refers to tasks.o(i.xTaskGetSchedulerState) for xTaskGetSchedulerState + cmsis_os2.o(i.osKernelUnlock) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + cmsis_os2.o(i.osMemoryPoolAlloc) refers to queue.o(i.xQueueReceiveFromISR) for xQueueReceiveFromISR + cmsis_os2.o(i.osMemoryPoolAlloc) refers to cmsis_os2.o(i.AllocBlock) for AllocBlock + cmsis_os2.o(i.osMemoryPoolAlloc) refers to cmsis_os2.o(i.CreateBlock) for CreateBlock + cmsis_os2.o(i.osMemoryPoolAlloc) refers to queue.o(i.xQueueSemaphoreTake) for xQueueSemaphoreTake + cmsis_os2.o(i.osMemoryPoolAlloc) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + cmsis_os2.o(i.osMemoryPoolAlloc) refers to port.o(i.vPortExitCritical) for vPortExitCritical + cmsis_os2.o(i.osMemoryPoolDelete) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + cmsis_os2.o(i.osMemoryPoolDelete) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osMemoryPoolDelete) refers to heap_4.o(i.vPortFree) for vPortFree + cmsis_os2.o(i.osMemoryPoolDelete) refers to port.o(i.vPortExitCritical) for vPortExitCritical + cmsis_os2.o(i.osMemoryPoolFree) refers to queue.o(i.uxQueueMessagesWaitingFromISR) for uxQueueMessagesWaitingFromISR + cmsis_os2.o(i.osMemoryPoolFree) refers to cmsis_os2.o(i.FreeBlock) for FreeBlock + cmsis_os2.o(i.osMemoryPoolFree) refers to queue.o(i.xQueueGiveFromISR) for xQueueGiveFromISR + cmsis_os2.o(i.osMemoryPoolFree) refers to queue.o(i.uxQueueMessagesWaiting) for uxQueueMessagesWaiting + cmsis_os2.o(i.osMemoryPoolFree) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + cmsis_os2.o(i.osMemoryPoolFree) refers to port.o(i.vPortExitCritical) for vPortExitCritical + cmsis_os2.o(i.osMemoryPoolFree) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osMemoryPoolGetCount) refers to queue.o(i.uxQueueMessagesWaitingFromISR) for uxQueueMessagesWaitingFromISR + cmsis_os2.o(i.osMemoryPoolGetCount) refers to queue.o(i.uxQueueMessagesWaiting) for uxQueueMessagesWaiting + cmsis_os2.o(i.osMemoryPoolGetSpace) refers to queue.o(i.uxQueueMessagesWaitingFromISR) for uxQueueMessagesWaitingFromISR + cmsis_os2.o(i.osMemoryPoolGetSpace) refers to queue.o(i.uxQueueMessagesWaiting) for uxQueueMessagesWaiting + cmsis_os2.o(i.osMemoryPoolNew) refers to queue.o(i.xQueueCreateCountingSemaphoreStatic) for xQueueCreateCountingSemaphoreStatic + cmsis_os2.o(i.osMemoryPoolNew) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + cmsis_os2.o(i.osMemoryPoolNew) refers to heap_4.o(i.vPortFree) for vPortFree + cmsis_os2.o(i.osMessageQueueDelete) refers to queue.o(i.vQueueUnregisterQueue) for vQueueUnregisterQueue + cmsis_os2.o(i.osMessageQueueDelete) refers to queue.o(i.vQueueDelete) for vQueueDelete + cmsis_os2.o(i.osMessageQueueGet) refers to queue.o(i.xQueueReceiveFromISR) for xQueueReceiveFromISR + cmsis_os2.o(i.osMessageQueueGet) refers to queue.o(i.xQueueReceive) for xQueueReceive + cmsis_os2.o(i.osMessageQueueGetCount) refers to queue.o(i.uxQueueMessagesWaitingFromISR) for uxQueueMessagesWaitingFromISR + cmsis_os2.o(i.osMessageQueueGetCount) refers to queue.o(i.uxQueueMessagesWaiting) for uxQueueMessagesWaiting + cmsis_os2.o(i.osMessageQueueGetSpace) refers to queue.o(i.uxQueueSpacesAvailable) for uxQueueSpacesAvailable + cmsis_os2.o(i.osMessageQueueNew) refers to queue.o(i.xQueueGenericCreateStatic) for xQueueGenericCreateStatic + cmsis_os2.o(i.osMessageQueueNew) refers to queue.o(i.xQueueGenericCreate) for xQueueGenericCreate + cmsis_os2.o(i.osMessageQueueNew) refers to queue.o(i.vQueueAddToRegistry) for vQueueAddToRegistry + cmsis_os2.o(i.osMessageQueuePut) refers to queue.o(i.xQueueGenericSendFromISR) for xQueueGenericSendFromISR + cmsis_os2.o(i.osMessageQueuePut) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osMessageQueueReset) refers to queue.o(i.xQueueGenericReset) for xQueueGenericReset + cmsis_os2.o(i.osMutexAcquire) refers to queue.o(i.xQueueTakeMutexRecursive) for xQueueTakeMutexRecursive + cmsis_os2.o(i.osMutexAcquire) refers to queue.o(i.xQueueSemaphoreTake) for xQueueSemaphoreTake + cmsis_os2.o(i.osMutexDelete) refers to queue.o(i.vQueueUnregisterQueue) for vQueueUnregisterQueue + cmsis_os2.o(i.osMutexDelete) refers to queue.o(i.vQueueDelete) for vQueueDelete + cmsis_os2.o(i.osMutexGetOwner) refers to queue.o(i.xQueueGetMutexHolder) for xQueueGetMutexHolder + cmsis_os2.o(i.osMutexNew) refers to queue.o(i.xQueueCreateMutexStatic) for xQueueCreateMutexStatic + cmsis_os2.o(i.osMutexNew) refers to queue.o(i.xQueueCreateMutex) for xQueueCreateMutex + cmsis_os2.o(i.osMutexNew) refers to queue.o(i.vQueueAddToRegistry) for vQueueAddToRegistry + cmsis_os2.o(i.osMutexRelease) refers to queue.o(i.xQueueGiveMutexRecursive) for xQueueGiveMutexRecursive + cmsis_os2.o(i.osMutexRelease) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osSemaphoreAcquire) refers to queue.o(i.xQueueReceiveFromISR) for xQueueReceiveFromISR + cmsis_os2.o(i.osSemaphoreAcquire) refers to queue.o(i.xQueueSemaphoreTake) for xQueueSemaphoreTake + cmsis_os2.o(i.osSemaphoreDelete) refers to queue.o(i.vQueueUnregisterQueue) for vQueueUnregisterQueue + cmsis_os2.o(i.osSemaphoreDelete) refers to queue.o(i.vQueueDelete) for vQueueDelete + cmsis_os2.o(i.osSemaphoreGetCount) refers to queue.o(i.uxQueueMessagesWaitingFromISR) for uxQueueMessagesWaitingFromISR + cmsis_os2.o(i.osSemaphoreGetCount) refers to queue.o(i.uxQueueMessagesWaiting) for uxQueueMessagesWaiting + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.xQueueCreateCountingSemaphore) for xQueueCreateCountingSemaphore + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.xQueueGenericCreate) for xQueueGenericCreate + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.vQueueDelete) for vQueueDelete + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.xQueueGenericCreateStatic) for xQueueGenericCreateStatic + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.xQueueCreateCountingSemaphoreStatic) for xQueueCreateCountingSemaphoreStatic + cmsis_os2.o(i.osSemaphoreNew) refers to queue.o(i.vQueueAddToRegistry) for vQueueAddToRegistry + cmsis_os2.o(i.osSemaphoreRelease) refers to queue.o(i.xQueueGiveFromISR) for xQueueGiveFromISR + cmsis_os2.o(i.osSemaphoreRelease) refers to queue.o(i.xQueueGenericSend) for xQueueGenericSend + cmsis_os2.o(i.osThreadEnumerate) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + cmsis_os2.o(i.osThreadEnumerate) refers to tasks.o(i.uxTaskGetNumberOfTasks) for uxTaskGetNumberOfTasks + cmsis_os2.o(i.osThreadEnumerate) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + cmsis_os2.o(i.osThreadEnumerate) refers to tasks.o(i.uxTaskGetSystemState) for uxTaskGetSystemState + cmsis_os2.o(i.osThreadEnumerate) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + cmsis_os2.o(i.osThreadEnumerate) refers to heap_4.o(i.vPortFree) for vPortFree + cmsis_os2.o(i.osThreadExit) refers to tasks.o(i.vTaskDelete) for vTaskDelete + cmsis_os2.o(i.osThreadFlagsClear) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + cmsis_os2.o(i.osThreadFlagsClear) refers to tasks.o(i.xTaskGenericNotify) for xTaskGenericNotify + cmsis_os2.o(i.osThreadFlagsGet) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + cmsis_os2.o(i.osThreadFlagsGet) refers to tasks.o(i.xTaskGenericNotify) for xTaskGenericNotify + cmsis_os2.o(i.osThreadFlagsSet) refers to tasks.o(i.xTaskGenericNotifyFromISR) for xTaskGenericNotifyFromISR + cmsis_os2.o(i.osThreadFlagsSet) refers to tasks.o(i.xTaskGenericNotify) for xTaskGenericNotify + cmsis_os2.o(i.osThreadFlagsWait) refers to tasks.o(i.xTaskGetTickCount) for xTaskGetTickCount + cmsis_os2.o(i.osThreadFlagsWait) refers to tasks.o(i.xTaskNotifyWait) for xTaskNotifyWait + cmsis_os2.o(i.osThreadGetCount) refers to tasks.o(i.uxTaskGetNumberOfTasks) for uxTaskGetNumberOfTasks + cmsis_os2.o(i.osThreadGetId) refers to tasks.o(i.xTaskGetCurrentTaskHandle) for xTaskGetCurrentTaskHandle + cmsis_os2.o(i.osThreadGetName) refers to tasks.o(i.pcTaskGetName) for pcTaskGetName + cmsis_os2.o(i.osThreadGetPriority) refers to tasks.o(i.uxTaskPriorityGet) for uxTaskPriorityGet + cmsis_os2.o(i.osThreadGetStackSpace) refers to tasks.o(i.uxTaskGetStackHighWaterMark) for uxTaskGetStackHighWaterMark + cmsis_os2.o(i.osThreadGetState) refers to tasks.o(i.eTaskGetState) for eTaskGetState + cmsis_os2.o(i.osThreadNew) refers to tasks.o(i.xTaskCreateStatic) for xTaskCreateStatic + cmsis_os2.o(i.osThreadNew) refers to tasks.o(i.xTaskCreate) for xTaskCreate + cmsis_os2.o(i.osThreadResume) refers to tasks.o(i.vTaskResume) for vTaskResume + cmsis_os2.o(i.osThreadSetPriority) refers to tasks.o(i.vTaskPrioritySet) for vTaskPrioritySet + cmsis_os2.o(i.osThreadSuspend) refers to tasks.o(i.vTaskSuspend) for vTaskSuspend + cmsis_os2.o(i.osThreadTerminate) refers to tasks.o(i.eTaskGetState) for eTaskGetState + cmsis_os2.o(i.osThreadTerminate) refers to tasks.o(i.vTaskDelete) for vTaskDelete + cmsis_os2.o(i.osTimerDelete) refers to timers.o(i.pvTimerGetTimerID) for pvTimerGetTimerID + cmsis_os2.o(i.osTimerDelete) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + cmsis_os2.o(i.osTimerDelete) refers to heap_4.o(i.vPortFree) for vPortFree + cmsis_os2.o(i.osTimerGetName) refers to timers.o(i.pcTimerGetName) for pcTimerGetName + cmsis_os2.o(i.osTimerIsRunning) refers to timers.o(i.xTimerIsTimerActive) for xTimerIsTimerActive + cmsis_os2.o(i.osTimerNew) refers to heap_4.o(i.pvPortMalloc) for pvPortMalloc + cmsis_os2.o(i.osTimerNew) refers to timers.o(i.xTimerCreateStatic) for xTimerCreateStatic + cmsis_os2.o(i.osTimerNew) refers to timers.o(i.xTimerCreate) for xTimerCreate + cmsis_os2.o(i.osTimerNew) refers to heap_4.o(i.vPortFree) for vPortFree + cmsis_os2.o(i.osTimerNew) refers to cmsis_os2.o(i.TimerCallback) for TimerCallback + cmsis_os2.o(i.osTimerStart) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + cmsis_os2.o(i.osTimerStop) refers to timers.o(i.xTimerIsTimerActive) for xTimerIsTimerActive + cmsis_os2.o(i.osTimerStop) refers to timers.o(i.xTimerGenericCommand) for xTimerGenericCommand + cmsis_os2.o(i.vApplicationGetIdleTaskMemory) refers to cmsis_os2.o(.bss) for .bss + cmsis_os2.o(i.vApplicationGetTimerTaskMemory) refers to cmsis_os2.o(.bss) for .bss + heap_4.o(i.prvHeapInit) refers to heap_4.o(.bss) for .bss + heap_4.o(i.prvHeapInit) refers to heap_4.o(.data) for .data + heap_4.o(i.prvInsertBlockIntoFreeList) refers to heap_4.o(.data) for .data + heap_4.o(i.pvPortMalloc) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + heap_4.o(i.pvPortMalloc) refers to heap_4.o(i.prvHeapInit) for prvHeapInit + heap_4.o(i.pvPortMalloc) refers to heap_4.o(i.prvInsertBlockIntoFreeList) for prvInsertBlockIntoFreeList + heap_4.o(i.pvPortMalloc) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + heap_4.o(i.pvPortMalloc) refers to heap_4.o(.data) for .data + heap_4.o(i.vPortFree) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + heap_4.o(i.vPortFree) refers to heap_4.o(i.prvInsertBlockIntoFreeList) for prvInsertBlockIntoFreeList + heap_4.o(i.vPortFree) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + heap_4.o(i.vPortFree) refers to heap_4.o(.data) for .data + heap_4.o(i.vPortGetHeapStats) refers to tasks.o(i.vTaskSuspendAll) for vTaskSuspendAll + heap_4.o(i.vPortGetHeapStats) refers to tasks.o(i.xTaskResumeAll) for xTaskResumeAll + heap_4.o(i.vPortGetHeapStats) refers to port.o(i.vPortEnterCritical) for vPortEnterCritical + heap_4.o(i.vPortGetHeapStats) refers to port.o(i.vPortExitCritical) for vPortExitCritical + heap_4.o(i.vPortGetHeapStats) refers to heap_4.o(.data) for .data + heap_4.o(i.xPortGetFreeHeapSize) refers to heap_4.o(.data) for .data + heap_4.o(i.xPortGetMinimumEverFreeHeapSize) refers to heap_4.o(.data) for .data + port.o(.emb_text) refers to tasks.o(i.vTaskSwitchContext) for vTaskSwitchContext + port.o(.emb_text) refers to tasks.o(.data) for pxCurrentTCB + port.o(i.prvTaskExitError) refers to port.o(.data) for .data + port.o(i.pxPortInitialiseStack) refers to port.o(i.prvTaskExitError) for prvTaskExitError + port.o(i.vPortEndScheduler) refers to port.o(.data) for .data + port.o(i.vPortEnterCritical) refers to port.o(.data) for .data + port.o(i.vPortExitCritical) refers to port.o(.data) for .data + port.o(i.vPortSetupTimerInterrupt) refers to system_stm32h7xx.o(.data) for SystemCoreClock + port.o(i.vPortValidateInterruptPriority) refers to port.o(.emb_text) for vPortGetIPSR + port.o(i.vPortValidateInterruptPriority) refers to port.o(.data) for .data + port.o(i.xPortStartScheduler) refers to port.o(i.vPortSetupTimerInterrupt) for vPortSetupTimerInterrupt + port.o(i.xPortStartScheduler) refers to port.o(.emb_text) for __asm___6_port_c_39a90d8d__prvEnableVFP + port.o(i.xPortStartScheduler) refers to port.o(.data) for .data + port.o(i.xPortSysTickHandler) refers to tasks.o(i.xTaskIncrementTick) for xTaskIncrementTick + usbd_core.o(i.USBD_DeInit) refers to usbd_conf.o(i.USBD_LL_Stop) for USBD_LL_Stop + usbd_core.o(i.USBD_DeInit) refers to usbd_conf.o(i.USBD_LL_DeInit) for USBD_LL_DeInit + usbd_core.o(i.USBD_GetEpDesc) refers to usbd_core.o(i.USBD_GetNextDesc) for USBD_GetNextDesc + usbd_core.o(i.USBD_Init) refers to usbd_conf.o(i.USBD_LL_Init) for USBD_LL_Init + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_core.o(i.USBD_CoreFindEP) for USBD_CoreFindEP + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_ioreq.o(i.USBD_CtlContinueSendData) for USBD_CtlContinueSendData + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_conf.o(i.USBD_LL_StallEP) for USBD_LL_StallEP + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_ioreq.o(i.USBD_CtlReceiveStatus) for USBD_CtlReceiveStatus + usbd_core.o(i.USBD_LL_DataInStage) refers to usbd_core.o(i.USBD_RunTestMode) for USBD_RunTestMode + usbd_core.o(i.USBD_LL_DataOutStage) refers to usbd_core.o(i.USBD_CoreFindEP) for USBD_CoreFindEP + usbd_core.o(i.USBD_LL_DataOutStage) refers to usbd_ioreq.o(i.USBD_CtlContinueRx) for USBD_CtlContinueRx + usbd_core.o(i.USBD_LL_DataOutStage) refers to usbd_core.o(i.USBD_CoreFindIF) for USBD_CoreFindIF + usbd_core.o(i.USBD_LL_DataOutStage) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_core.o(i.USBD_LL_Reset) refers to usbd_conf.o(i.USBD_LL_OpenEP) for USBD_LL_OpenEP + usbd_core.o(i.USBD_LL_SetupStage) refers to usbd_ctlreq.o(i.USBD_ParseSetupRequest) for USBD_ParseSetupRequest + usbd_core.o(i.USBD_LL_SetupStage) refers to usbd_conf.o(i.USBD_LL_StallEP) for USBD_LL_StallEP + usbd_core.o(i.USBD_LL_SetupStage) refers to usbd_ctlreq.o(i.USBD_StdDevReq) for USBD_StdDevReq + usbd_core.o(i.USBD_LL_SetupStage) refers to usbd_ctlreq.o(i.USBD_StdItfReq) for USBD_StdItfReq + usbd_core.o(i.USBD_LL_SetupStage) refers to usbd_ctlreq.o(i.USBD_StdEPReq) for USBD_StdEPReq + usbd_core.o(i.USBD_Start) refers to usbd_conf.o(i.USBD_LL_Start) for USBD_LL_Start + usbd_core.o(i.USBD_Stop) refers to usbd_conf.o(i.USBD_LL_Stop) for USBD_LL_Stop + usbd_ctlreq.o(i.USBD_ClrFeature) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_ClrFeature) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_CtlError) refers to usbd_conf.o(i.USBD_LL_StallEP) for USBD_LL_StallEP + usbd_ctlreq.o(i.USBD_GetConfig) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_GetConfig) refers to usbd_ioreq.o(i.USBD_CtlSendData) for USBD_CtlSendData + usbd_ctlreq.o(i.USBD_GetDescriptor) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_GetDescriptor) refers to usbd_ioreq.o(i.USBD_CtlSendData) for USBD_CtlSendData + usbd_ctlreq.o(i.USBD_GetDescriptor) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_GetStatus) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_GetStatus) refers to usbd_ioreq.o(i.USBD_CtlSendData) for USBD_CtlSendData + usbd_ctlreq.o(i.USBD_GetString) refers to usbd_ctlreq.o(i.USBD_GetLen) for USBD_GetLen + usbd_ctlreq.o(i.USBD_ParseSetupRequest) refers to usbd_ctlreq.o(i.SWAPBYTE) for SWAPBYTE + usbd_ctlreq.o(i.USBD_SetAddress) refers to usbd_conf.o(i.USBD_LL_SetUSBAddress) for USBD_LL_SetUSBAddress + usbd_ctlreq.o(i.USBD_SetAddress) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_SetAddress) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_SetConfig) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_SetConfig) refers to usbd_core.o(i.USBD_ClrClassConfig) for USBD_ClrClassConfig + usbd_ctlreq.o(i.USBD_SetConfig) refers to usbd_core.o(i.USBD_SetClassConfig) for USBD_SetClassConfig + usbd_ctlreq.o(i.USBD_SetConfig) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_SetConfig) refers to usbd_ctlreq.o(.data) for .data + usbd_ctlreq.o(i.USBD_SetFeature) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_SetFeature) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_GetDescriptor) for USBD_GetDescriptor + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_SetAddress) for USBD_SetAddress + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_SetConfig) for USBD_SetConfig + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_GetConfig) for USBD_GetConfig + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_GetStatus) for USBD_GetStatus + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_SetFeature) for USBD_SetFeature + usbd_ctlreq.o(i.USBD_StdDevReq) refers to usbd_ctlreq.o(i.USBD_ClrFeature) for USBD_ClrFeature + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_core.o(i.USBD_CoreFindEP) for USBD_CoreFindEP + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_conf.o(i.USBD_LL_StallEP) for USBD_LL_StallEP + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_conf.o(i.USBD_LL_ClearStallEP) for USBD_LL_ClearStallEP + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_ioreq.o(i.USBD_CtlSendData) for USBD_CtlSendData + usbd_ctlreq.o(i.USBD_StdEPReq) refers to usbd_conf.o(i.USBD_LL_IsStallEP) for USBD_LL_IsStallEP + usbd_ctlreq.o(i.USBD_StdItfReq) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_ctlreq.o(i.USBD_StdItfReq) refers to usbd_core.o(i.USBD_CoreFindIF) for USBD_CoreFindIF + usbd_ctlreq.o(i.USBD_StdItfReq) refers to usbd_ioreq.o(i.USBD_CtlSendStatus) for USBD_CtlSendStatus + usbd_ioreq.o(i.USBD_CtlContinueRx) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_ioreq.o(i.USBD_CtlContinueSendData) refers to usbd_conf.o(i.USBD_LL_Transmit) for USBD_LL_Transmit + usbd_ioreq.o(i.USBD_CtlPrepareRx) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_ioreq.o(i.USBD_CtlReceiveStatus) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_ioreq.o(i.USBD_CtlSendData) refers to usbd_conf.o(i.USBD_LL_Transmit) for USBD_LL_Transmit + usbd_ioreq.o(i.USBD_CtlSendStatus) refers to usbd_conf.o(i.USBD_LL_Transmit) for USBD_LL_Transmit + usbd_ioreq.o(i.USBD_GetRxCount) refers to usbd_conf.o(i.USBD_LL_GetRxDataSize) for USBD_LL_GetRxDataSize + usbd_cdc.o(i.USBD_CDC_DataIn) refers to usbd_conf.o(i.USBD_LL_Transmit) for USBD_LL_Transmit + usbd_cdc.o(i.USBD_CDC_DataOut) refers to usbd_conf.o(i.USBD_LL_GetRxDataSize) for USBD_LL_GetRxDataSize + usbd_cdc.o(i.USBD_CDC_DeInit) refers to usbd_conf.o(i.USBD_LL_CloseEP) for USBD_LL_CloseEP + usbd_cdc.o(i.USBD_CDC_DeInit) refers to usbd_conf.o(i.USBD_static_free) for USBD_static_free + usbd_cdc.o(i.USBD_CDC_DeInit) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_GetDeviceQualifierDescriptor) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_GetFSCfgDesc) refers to usbd_core.o(i.USBD_GetEpDesc) for USBD_GetEpDesc + usbd_cdc.o(i.USBD_CDC_GetFSCfgDesc) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_GetHSCfgDesc) refers to usbd_core.o(i.USBD_GetEpDesc) for USBD_GetEpDesc + usbd_cdc.o(i.USBD_CDC_GetHSCfgDesc) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_GetOtherSpeedCfgDesc) refers to usbd_core.o(i.USBD_GetEpDesc) for USBD_GetEpDesc + usbd_cdc.o(i.USBD_CDC_GetOtherSpeedCfgDesc) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_Init) refers to usbd_conf.o(i.USBD_static_malloc) for USBD_static_malloc + usbd_cdc.o(i.USBD_CDC_Init) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + usbd_cdc.o(i.USBD_CDC_Init) refers to usbd_conf.o(i.USBD_LL_OpenEP) for USBD_LL_OpenEP + usbd_cdc.o(i.USBD_CDC_Init) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_cdc.o(i.USBD_CDC_Init) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_ReceivePacket) refers to usbd_conf.o(i.USBD_LL_PrepareReceive) for USBD_LL_PrepareReceive + usbd_cdc.o(i.USBD_CDC_ReceivePacket) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(i.USBD_CDC_Setup) refers to usbd_ctlreq.o(i.USBD_CtlError) for USBD_CtlError + usbd_cdc.o(i.USBD_CDC_Setup) refers to usbd_ioreq.o(i.USBD_CtlSendData) for USBD_CtlSendData + usbd_cdc.o(i.USBD_CDC_Setup) refers to usbd_ioreq.o(i.USBD_CtlPrepareRx) for USBD_CtlPrepareRx + usbd_cdc.o(i.USBD_CDC_TransmitPacket) refers to usbd_conf.o(i.USBD_LL_Transmit) for USBD_LL_Transmit + usbd_cdc.o(i.USBD_CDC_TransmitPacket) refers to usbd_cdc.o(.data) for .data + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_Init) for USBD_CDC_Init + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_DeInit) for USBD_CDC_DeInit + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_Setup) for USBD_CDC_Setup + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_EP0_RxReady) for USBD_CDC_EP0_RxReady + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_DataIn) for USBD_CDC_DataIn + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_DataOut) for USBD_CDC_DataOut + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_GetHSCfgDesc) for USBD_CDC_GetHSCfgDesc + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_GetFSCfgDesc) for USBD_CDC_GetFSCfgDesc + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_GetOtherSpeedCfgDesc) for USBD_CDC_GetOtherSpeedCfgDesc + usbd_cdc.o(.data) refers to usbd_cdc.o(i.USBD_CDC_GetDeviceQualifierDescriptor) for USBD_CDC_GetDeviceQualifierDescriptor + rt_memcpy_v6.o(.text) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 + memset.o(.text) refers to rt_memclr.o(.text) for _memset + aeabi_memset.o(.text) refers to rt_memclr.o(.text) for _memset + rt_memclr.o(.text) refers to rt_memclr_w.o(.text) for _memset_w + __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry + pow.o(i.__hardfp_pow) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow.o(i.__hardfp_pow) refers to dunder.o(i.__mathlib_dbl_infnan2) for __mathlib_dbl_infnan2 + pow.o(i.__hardfp_pow) refers to _rserrno.o(.text) for __set_errno + pow.o(i.__hardfp_pow) refers to dunder.o(i.__mathlib_dbl_divzero) for __mathlib_dbl_divzero + pow.o(i.__hardfp_pow) refers to dunder.o(i.__mathlib_dbl_overflow) for __mathlib_dbl_overflow + pow.o(i.__hardfp_pow) refers to sqrt.o(i.sqrt) for sqrt + pow.o(i.__hardfp_pow) refers to fabs.o(i.fabs) for fabs + pow.o(i.__hardfp_pow) refers to dunder.o(i.__mathlib_dbl_invalid) for __mathlib_dbl_invalid + pow.o(i.__hardfp_pow) refers to dunder.o(i.__mathlib_dbl_underflow) for __mathlib_dbl_underflow + pow.o(i.__hardfp_pow) refers to qnan.o(.constdata) for __mathlib_zero + pow.o(i.__hardfp_pow) refers to poly.o(i.__kernel_poly) for __kernel_poly + pow.o(i.__hardfp_pow) refers to scalbn.o(x$fpl$scalbn) for __ARM_scalbn + pow.o(i.__hardfp_pow) refers to fpclassify.o(i.__ARM_fpclassify) for __ARM_fpclassify + pow.o(i.__hardfp_pow) refers to pow.o(.constdata) for .constdata + pow.o(i.__softfp_pow) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow.o(i.__softfp_pow) refers to pow.o(i.__hardfp_pow) for __hardfp_pow + pow.o(i.pow) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow.o(i.pow) refers to pow.o(i.__hardfp_pow) for __hardfp_pow + pow.o(.constdata) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow_x.o(i.____hardfp_pow$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow_x.o(i.____hardfp_pow$lsc) refers to dunder.o(i.__mathlib_dbl_infnan2) for __mathlib_dbl_infnan2 + pow_x.o(i.____hardfp_pow$lsc) refers to _rserrno.o(.text) for __set_errno + pow_x.o(i.____hardfp_pow$lsc) refers to sqrt.o(i.sqrt) for sqrt + pow_x.o(i.____hardfp_pow$lsc) refers to fabs.o(i.fabs) for fabs + pow_x.o(i.____hardfp_pow$lsc) refers to qnan.o(.constdata) for __mathlib_zero + pow_x.o(i.____hardfp_pow$lsc) refers to poly.o(i.__kernel_poly) for __kernel_poly + pow_x.o(i.____hardfp_pow$lsc) refers to scalbn.o(x$fpl$scalbn) for __ARM_scalbn + pow_x.o(i.____hardfp_pow$lsc) refers to pow_x.o(.constdata) for .constdata + pow_x.o(i.____softfp_pow$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow_x.o(i.____softfp_pow$lsc) refers to pow_x.o(i.____hardfp_pow$lsc) for ____hardfp_pow$lsc + pow_x.o(i.__pow$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + pow_x.o(i.__pow$lsc) refers to pow_x.o(i.____hardfp_pow$lsc) for ____hardfp_pow$lsc + pow_x.o(.constdata) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh + aeabi_ldiv0_sigfpe.o(.text) refers to rt_div0.o(.text) for __rt_div0 + _rserrno.o(.text) refers to rt_errno_addr_intlibspace.o(.text) for __aeabi_errno_addr + scalbn.o(x$fpl$scalbn) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + scalbn.o(x$fpl$scalbn) refers to dcheck1.o(x$fpl$dcheck1) for __fpl_dcheck_NaN1 + fabs.o(i.__hardfp_fabs) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + fabs.o(i.__softfp_fabs) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + fabs.o(i.fabs) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + fpclassify.o(i.__ARM_fpclassify) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + poly.o(i.__kernel_poly) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + qnan.o(.constdata) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt.o(i.__hardfp_sqrt) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt.o(i.__hardfp_sqrt) refers to _rserrno.o(.text) for __set_errno + sqrt.o(i.__softfp_sqrt) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to _rserrno.o(.text) for __set_errno + sqrt.o(i.sqrt) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt.o(i.sqrt) refers to _rserrno.o(.text) for __set_errno + sqrt_x.o(i.____hardfp_sqrt$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt_x.o(i.____hardfp_sqrt$lsc) refers to _rserrno.o(.text) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to _rserrno.o(.text) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to _rserrno.o(.text) for __set_errno + __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D + __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap + __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 + rt_div0.o(.text) refers to defsig_fpe_outer.o(.text) for __rt_SIGFPE + rt_errno_addr.o(.text) refers to rt_errno_addr.o(.bss) for __aeabi_errno_addr_data + rt_errno_addr_intlibspace.o(.text) refers to libspace.o(.bss) for __libspace_start + dcheck1.o(x$fpl$dcheck1) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + dcheck1.o(x$fpl$dcheck1) refers to retnan.o(x$fpl$retnan) for __fpl_return_NaN + libspace.o(.text) refers to libspace.o(.bss) for __libspace_start + sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace + sys_stackheap_outer.o(.text) refers to startup_stm32h750xx.o(.text) for __user_initial_stackheap + exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit + defsig_fpe_outer.o(.text) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig_fpe_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_fpe_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000001) for __rt_lib_init_fp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1 + retnan.o(x$fpl$retnan) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + retnan.o(x$fpl$retnan) refers to trapv.o(x$fpl$trapveneer) for __fpl_cmpreturn + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 + rt_raise.o(.text) refers to __raise.o(.text) for __raise + rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + libinit2.o(.ARM.Collect$$libinit$$00000001) refers to fpinit.o(x$fpl$fpinit) for _fp_init + libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + trapv.o(x$fpl$trapveneer) refers (Special) to usenofp.o(x$fpl$usenofp) for __I$use$fp + sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown + rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 + __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler + defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch + argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv + sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig.o(CL$$defsig) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard + _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM + _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_cpp_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_fini_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000009) for __rt_lib_shutdown_fp_trap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000011) for __rt_lib_shutdown_heap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000012) for __rt_lib_shutdown_return + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_signal_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000006) for __rt_lib_shutdown_stdio_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000E) for __rt_lib_shutdown_user_alloc_1 + sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display + + +============================================================================== + +Removing Unused input sections from the image. + + Removing communicaion.o(.rev16_text), (4 bytes). + Removing communicaion.o(.revsh_text), (4 bytes). + Removing communicaion.o(.rrx_text), (6 bytes). + Removing communicaion.o(.data), (4 bytes). + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing main.o(.rrx_text), (6 bytes). + Removing main.o(i.CheckMaxV), (312 bytes). + Removing main.o(i.ExitRun0Mode), (2 bytes). + Removing main.o(i.LOWPower), (224 bytes). + Removing main.o(i.fputc), (28 bytes). + Removing main.o(.bss), (16 bytes). + Removing main.o(.bss), (16 bytes). + Removing main.o(.bss), (80 bytes). + Removing main.o(.data), (1 bytes). + Removing main.o(.data), (2 bytes). + Removing main.o(.data), (2 bytes). + Removing main.o(.data), (4 bytes). + Removing freertos.o(.rev16_text), (4 bytes). + Removing freertos.o(.revsh_text), (4 bytes). + Removing freertos.o(.rrx_text), (6 bytes). + Removing usb_device.o(.rev16_text), (4 bytes). + Removing usb_device.o(.revsh_text), (4 bytes). + Removing usb_device.o(.rrx_text), (6 bytes). + Removing usb_device.o(i.MX_USB_DEVICE_Init), (84 bytes). + Removing usb_device.o(.bss), (732 bytes). + Removing usbd_conf.o(.rev16_text), (4 bytes). + Removing usbd_conf.o(.revsh_text), (4 bytes). + Removing usbd_conf.o(.rrx_text), (6 bytes). + Removing usbd_conf.o(i.HAL_PCD_MspDeInit), (56 bytes). + Removing usbd_conf.o(i.HAL_PCD_MspInit), (160 bytes). + Removing usbd_conf.o(i.USBD_LL_CloseEP), (18 bytes). + Removing usbd_conf.o(i.USBD_LL_DeInit), (18 bytes). + Removing usbd_conf.o(i.USBD_LL_Delay), (4 bytes). + Removing usbd_conf.o(i.USBD_LL_FlushEP), (18 bytes). + Removing usbd_conf.o(i.USBD_LL_GetRxDataSize), (8 bytes). + Removing usbd_conf.o(i.USBD_LL_Init), (100 bytes). + Removing usbd_conf.o(i.USBD_LL_Start), (18 bytes). + Removing usbd_conf.o(i.USBD_LL_Stop), (18 bytes). + Removing usbd_conf.o(i.USBD_static_free), (2 bytes). + Removing usbd_conf.o(i.USBD_static_malloc), (8 bytes). + Removing usbd_desc.o(.rev16_text), (4 bytes). + Removing usbd_desc.o(.revsh_text), (4 bytes). + Removing usbd_desc.o(.rrx_text), (6 bytes). + Removing usbd_desc.o(i.Get_SerialNum), (56 bytes). + Removing usbd_desc.o(i.IntToUnicode), (58 bytes). + Removing usbd_desc.o(i.USBD_FS_ConfigStrDescriptor), (48 bytes). + Removing usbd_desc.o(i.USBD_FS_DeviceDescriptor), (12 bytes). + Removing usbd_desc.o(i.USBD_FS_InterfaceStrDescriptor), (52 bytes). + Removing usbd_desc.o(i.USBD_FS_LangIDStrDescriptor), (12 bytes). + Removing usbd_desc.o(i.USBD_FS_ManufacturerStrDescriptor), (40 bytes). + Removing usbd_desc.o(i.USBD_FS_ProductStrDescriptor), (60 bytes). + Removing usbd_desc.o(i.USBD_FS_SerialStrDescriptor), (20 bytes). + Removing usbd_desc.o(.bss), (512 bytes). + Removing usbd_desc.o(.data), (32 bytes). + Removing usbd_desc.o(.data), (50 bytes). + Removing usbd_desc.o(.data), (12 bytes). + Removing usbd_cdc_if.o(.rev16_text), (4 bytes). + Removing usbd_cdc_if.o(.revsh_text), (4 bytes). + Removing usbd_cdc_if.o(.rrx_text), (6 bytes). + Removing usbd_cdc_if.o(i.CDC_Control_FS), (8 bytes). + Removing usbd_cdc_if.o(i.CDC_DeInit_FS), (4 bytes). + Removing usbd_cdc_if.o(i.CDC_Init_FS), (36 bytes). + Removing usbd_cdc_if.o(i.CDC_Receive_FS), (24 bytes). + Removing usbd_cdc_if.o(i.CDC_TransmitCplt_FS), (4 bytes). + Removing usbd_cdc_if.o(i.CDC_Transmit_FS), (44 bytes). + Removing usbd_cdc_if.o(.bss), (4096 bytes). + Removing usbd_cdc_if.o(.data), (20 bytes). + Removing stm32h7xx_it.o(.rev16_text), (4 bytes). + Removing stm32h7xx_it.o(.revsh_text), (4 bytes). + Removing stm32h7xx_it.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_msp.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_msp.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_msp.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_msp.o(i.HAL_ADC_MspDeInit), (80 bytes). + Removing stm32h7xx_hal_msp.o(i.HAL_TIM_Base_MspDeInit), (68 bytes). + Removing stm32h7xx_hal_msp.o(i.HAL_UART_MspDeInit), (64 bytes). + Removing stm32h7xx_hal_timebase_tim.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_timebase_tim.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_timebase_tim.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_timebase_tim.o(i.HAL_ResumeTick), (20 bytes). + Removing stm32h7xx_hal_timebase_tim.o(i.HAL_SuspendTick), (20 bytes). + Removing system_stm32h7xx.o(.rev16_text), (4 bytes). + Removing system_stm32h7xx.o(.revsh_text), (4 bytes). + Removing system_stm32h7xx.o(.rrx_text), (6 bytes). + Removing system_stm32h7xx.o(i.SystemCoreClockUpdate), (444 bytes). + Removing stm32h7xx_hal_tim.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_tim.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_tim.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_DeInit), (76 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start), (140 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_DMA), (220 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Stop), (38 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Stop_DMA), (58 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Stop_IT), (48 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigOCrefClear), (302 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigTI1Input), (16 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurstState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiReadStart), (452 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_MultiWriteStart), (452 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_ReadStart), (18 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_ReadStop), (134 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_WriteStart), (18 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_DMABurst_WriteStop), (134 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_DeInit), (64 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Init), (184 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start), (168 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_DMA), (496 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Start_IT), (208 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop), (190 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop_DMA), (254 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_Encoder_Stop_IT), (230 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_ErrorCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_GenerateEvent), (38 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_GetActiveChannel), (4 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_GetChannelState), (56 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_ConfigChannel), (192 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_DeInit), (76 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Init), (78 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start), (324 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_DMA), (568 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Start_IT), (392 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop), (134 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop_DMA), (228 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_IC_Stop_IT), (206 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_ConfigChannel), (110 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_DeInit), (76 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Init), (78 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start), (296 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_DMA), (588 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Start_IT), (360 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop), (176 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop_DMA), (272 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OC_Stop_IT), (248 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_ConfigChannel), (272 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_DeInit), (64 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Init), (90 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Start), (140 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Start_IT), (160 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Stop), (140 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_OnePulse_Stop_IT), (160 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_DeInit), (76 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_GetState), (6 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_DMA), (588 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start_IT), (360 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop_DMA), (272 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop_IT), (248 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PeriodElapsedCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_PeriodElapsedHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_ReadCapturedValue), (44 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_SlaveConfigSynchro), (80 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_SlaveConfigSynchro_IT), (80 bytes). + Removing stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMACaptureCplt), (110 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMACaptureHalfCplt), (62 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseCplt), (94 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMADelayPulseHalfCplt), (62 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMAError), (84 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedCplt), (24 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMAPeriodElapsedHalfCplt), (10 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMATriggerCplt), (24 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_DMATriggerHalfCplt), (10 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_SlaveTimer_SetConfig), (228 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_TI1_SetConfig), (128 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_TI2_SetConfig), (54 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_TI3_SetConfig), (50 bytes). + Removing stm32h7xx_hal_tim.o(i.TIM_TI4_SetConfig), (56 bytes). + Removing stm32h7xx_hal_tim_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_tim_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_tim_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakInput), (204 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent), (128 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent_DMA), (160 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigCommutEvent_IT), (128 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_GetChannelNState), (36 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_GroupChannel5), (56 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_DeInit), (64 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_GetState), (6 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Init), (220 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_MspInit), (2 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start), (184 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_DMA), (252 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Start_IT), (196 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop), (58 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop_DMA), (70 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_HallSensor_Stop_IT), (68 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start), (220 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_DMA), (448 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Start_IT), (284 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop), (106 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop_DMA), (180 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OCN_Stop_IT), (178 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start), (98 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Start_IT), (118 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop), (100 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_OnePulseN_Stop_IT), (120 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start), (220 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_DMA), (448 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Start_IT), (284 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop), (106 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop_DMA), (180 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_PWMN_Stop_IT), (178 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_RemapConfig), (40 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_TISelection), (104 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationCplt), (16 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.TIMEx_DMACommutationHalfCplt), (16 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.TIM_CCxNChannelCmd), (26 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.TIM_DMADelayPulseNCplt), (74 bytes). + Removing stm32h7xx_hal_tim_ex.o(i.TIM_DMAErrorCCxN), (62 bytes). + Removing stm32h7xx_hal_pcd.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_pcd.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_pcd.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ActivateRemoteWakeup), (6 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ConnectCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DataInStageCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DataOutStageCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DeActivateRemoteWakeup), (6 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DeInit), (44 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DevConnect), (60 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DevDisconnect), (60 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_DisconnectCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Close), (72 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Flush), (52 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_GetRxCount), (18 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_GetState), (6 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ISOINIncompleteCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ISOOUTIncompleteCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_Init), (216 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_MspInit), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ResetCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_ResumeCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_SOFCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_SetTestMode), (40 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_SetupStageCallback), (2 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_Start), (66 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_Stop), (74 bytes). + Removing stm32h7xx_hal_pcd.o(i.HAL_PCD_SuspendCallback), (2 bytes). + Removing stm32h7xx_hal_pcd_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_pcd_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_pcd_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_ActivateBCD), (44 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_ActivateLPM), (40 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_Callback), (2 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_BCD_VBUSDetect), (176 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_DeActivateBCD), (36 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_DeActivateLPM), (32 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_SetRxFiFo), (8 bytes). + Removing stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_SetTxFiFo), (66 bytes). + Removing stm32h7xx_ll_usb.o(.rev16_text), (4 bytes). + Removing stm32h7xx_ll_usb.o(.revsh_text), (4 bytes). + Removing stm32h7xx_ll_usb.o(.rrx_text), (6 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_ActivateDedicatedEndpoint), (144 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_ActivateRemoteWakeup), (24 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_ClearInterrupts), (8 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_CoreInit), (156 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_CoreReset), (68 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DeActivateRemoteWakeup), (16 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DeactivateDedicatedEndpoint), (150 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DeactivateEndpoint), (200 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DevConnect), (28 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DevDisconnect), (28 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DevInit), (364 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DisableGlobalInt), (12 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DoPing), (32 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_DriveVbus), (58 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_EnableGlobalInt), (12 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_FlushRxFifo), (64 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_GetCurrentFrame), (8 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_GetHostSpeed), (16 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_HC_Halt), (246 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_HC_Init), (288 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_HC_ReadInterrupt), (8 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_HC_StartXfer), (642 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_HostInit), (196 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_InitFSLSPClkSel), (60 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_ReadChInterrupts), (16 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_ResetPort), (52 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_SetCurrentMode), (96 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_SetDevSpeed), (14 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_StopDevice), (66 bytes). + Removing stm32h7xx_ll_usb.o(i.USB_StopHost), (146 bytes). + Removing stm32h7xx_hal_rcc.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_rcc.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_rcc.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_CSSCallback), (2 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_DeInit), (480 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_DisableCSS), (16 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_EnableCSS), (16 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_GetOscConfig), (324 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_MCOConfig), (144 bytes). + Removing stm32h7xx_hal_rcc.o(i.HAL_RCC_NMI_IRQHandler), (32 bytes). + Removing stm32h7xx_hal_rcc_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_rcc_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_rcc_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSConfig), (108 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSGetSynchronizationInfo), (44 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSSoftwareSynchronizationGenerate), (16 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRSWaitSynchronization), (136 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_ErrorCallback), (2 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_ExpectedSyncCallback), (2 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_IRQHandler), (120 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_SyncOkCallback), (2 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_CRS_SyncWarnCallback), (2 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_DisableLSECSS), (28 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_EnableLSECSS), (16 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_EnableLSECSS_IT), (52 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1PCLK1Freq), (36 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD1SysClockFreq), (68 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKConfig), (468 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_KerWakeUpStopCLKConfig), (20 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_LSECSS_Callback), (2 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_LSECSS_IRQHandler), (32 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_WWDGxSysResetConfig), (16 bytes). + Removing stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_WakeUpStopCLKConfig), (20 bytes). + Removing stm32h7xx_hal_flash.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_flash.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_flash.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_flash.o(i.FLASH_CRC_WaitForLastOperation), (112 bytes). + Removing stm32h7xx_hal_flash.o(i.FLASH_OB_WaitForLastOperation), (80 bytes). + Removing stm32h7xx_hal_flash.o(i.FLASH_WaitForLastOperation), (120 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_EndOfOperationCallback), (2 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_GetError), (12 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_IRQHandler), (216 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_Lock), (28 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_OB_Launch), (52 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_OB_Lock), (28 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_OB_Unlock), (44 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_OperationErrorCallback), (2 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_Program), (148 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_Program_IT), (132 bytes). + Removing stm32h7xx_hal_flash.o(i.HAL_FLASH_Unlock), (44 bytes). + Removing stm32h7xx_hal_flash.o(.bss), (28 bytes). + Removing stm32h7xx_hal_flash_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_flash_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_flash_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_CRC_AddSector), (32 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_CRC_SelectAddress), (16 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_Erase_Sector), (36 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_MassErase), (36 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_BOR_LevelConfig), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_BootAddConfig), (40 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_DisableWRP), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_EnableWRP), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetBOR), (16 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetBootAdd), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetPCROP), (48 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetRDP), (32 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetSecureArea), (48 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetUser), (16 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_GetWRP), (36 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_PCROPConfig), (28 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_RDPConfig), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_SecureAreaConfig), (32 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.FLASH_OB_UserConfig), (132 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_ComputeCRC), (176 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase), (208 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Erase_IT), (148 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Lock_Bank1), (20 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBGetConfig), (98 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_OBProgram), (176 bytes). + Removing stm32h7xx_hal_flash_ex.o(i.HAL_FLASHEx_Unlock_Bank1), (44 bytes). + Removing stm32h7xx_hal_gpio.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_gpio.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_gpio.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_DeInit), (328 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_EXTI_Callback), (2 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_EXTI_IRQHandler), (24 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_LockPin), (36 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_ReadPin), (14 bytes). + Removing stm32h7xx_hal_gpio.o(i.HAL_GPIO_TogglePin), (16 bytes). + Removing stm32h7xx_hal_hsem.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_hsem.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_hsem.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_ActivateNotification), (16 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_DeactivateNotification), (16 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_FastTake), (32 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_FreeCallback), (2 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_GetClearKey), (12 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_IRQHandler), (32 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_IsSemTaken), (20 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_Release), (20 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_ReleaseAll), (16 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_SetClearKey), (16 bytes). + Removing stm32h7xx_hal_hsem.o(i.HAL_HSEM_Take), (40 bytes). + Removing stm32h7xx_hal_dma.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_dma.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_dma.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_DeInit), (504 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_GetError), (4 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_GetState), (6 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_PollForTransfer), (1160 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_RegisterCallback), (92 bytes). + Removing stm32h7xx_hal_dma.o(i.HAL_DMA_UnRegisterCallback), (108 bytes). + Removing stm32h7xx_hal_dma_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_dma_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_dma_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.DMA_MultiBufferSetConfig), (192 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_ChangeMemory), (156 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_ConfigMuxRequestGenerator), (204 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_DisableMuxRequestGenerator), (28 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_EnableMuxRequestGenerator), (28 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MultiBufferStart), (604 bytes). + Removing stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MultiBufferStart_IT), (1008 bytes). + Removing stm32h7xx_hal_mdma.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_mdma.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_mdma.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_Abort), (118 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_Abort_IT), (44 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_ConfigPostRequestMask), (94 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_DeInit), (86 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_GenerateSWRequest), (60 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_GetError), (4 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_GetState), (6 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_IRQHandler), (392 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_Init), (96 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_LinkedList_AddNode), (214 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_LinkedList_CreateNode), (258 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_LinkedList_DisableCircularMode), (76 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_LinkedList_EnableCircularMode), (76 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_LinkedList_RemoveNode), (196 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_PollForTransfer), (266 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_RegisterCallback), (88 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_Start), (108 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_Start_IT), (160 bytes). + Removing stm32h7xx_hal_mdma.o(i.HAL_MDMA_UnRegisterCallback), (108 bytes). + Removing stm32h7xx_hal_mdma.o(i.MDMA_Init), (180 bytes). + Removing stm32h7xx_hal_mdma.o(i.MDMA_SetConfig), (116 bytes). + Removing stm32h7xx_hal_pwr.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_pwr.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_pwr.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_ConfigPVD), (132 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DeInit), (2 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DisableBkUpAccess), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DisablePVD), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DisableSEVOnPend), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DisableSleepOnExit), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_DisableWakeUpPin), (20 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnableBkUpAccess), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnablePVD), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnableSEVOnPend), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnableSleepOnExit), (16 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnableWakeUpPin), (24 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnterSLEEPMode), (28 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnterSTANDBYMode), (48 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_EnterSTOPMode), (80 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_PVDCallback), (2 bytes). + Removing stm32h7xx_hal_pwr.o(i.HAL_PWR_PVD_IRQHandler), (32 bytes). + Removing stm32h7xx_hal_pwr_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_pwr_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_pwr_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_AVDCallback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ClearPendingEvent), (4 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ClearWakeupFlag), (28 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigAVD), (128 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigD3Domain), (20 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ControlStopModeVoltageScaling), (20 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ControlVoltageScaling), (232 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableAVD), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableBatteryCharging), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableBkUpReg), (56 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableFlashPowerDown), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableMonitoring), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableUSBReg), (56 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableUSBVoltageDetector), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_DisableWakeUpPin), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableAVD), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableBatteryCharging), (28 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableBkUpReg), (56 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableFlashPowerDown), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableMonitoring), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableUSBReg), (56 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableUSBVoltageDetector), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnableWakeUpPin), (124 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnterSTANDBYMode), (60 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_EnterSTOPMode), (100 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetStopModeVoltageRange), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetSupplyConfig), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetTemperatureLevel), (32 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetVBATLevel), (32 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetVoltageRange), (16 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_GetWakeupFlag), (12 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_PVD_AVD_IRQHandler), (96 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WAKEUP_PIN_IRQHandler), (128 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP1_Callback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP2_Callback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP3_Callback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP4_Callback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP5_Callback), (2 bytes). + Removing stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_WKUP6_Callback), (2 bytes). + Removing stm32h7xx_hal_cortex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_cortex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_cortex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_GetCurrentCPUID), (4 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_MPU_ConfigRegion), (84 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_MPU_Disable), (28 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_MPU_DisableRegion), (24 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_MPU_Enable), (36 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_MPU_EnableRegion), (24 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_ClearPendingIRQ), (26 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_DisableIRQ), (34 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_GetActive), (40 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_GetPendingIRQ), (40 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_GetPriority), (86 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_GetPriorityGrouping), (16 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPendingIRQ), (26 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_NVIC_SystemReset), (36 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_CLKSourceConfig), (28 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Callback), (2 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Config), (40 bytes). + Removing stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_IRQHandler), (8 bytes). + Removing stm32h7xx_hal.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_DisableDBGSleepMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_DisableDBGStandbyMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_DisableDBGStopMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_EnableDBGSleepMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_EnableDBGStandbyMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DBGMCU_EnableDBGStopMode), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_DeInit), (116 bytes). + Removing stm32h7xx_hal.o(i.HAL_Delay), (36 bytes). + Removing stm32h7xx_hal.o(i.HAL_DisableCompensationCell), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_EXTI_D1_ClearFlag), (22 bytes). + Removing stm32h7xx_hal.o(i.HAL_EXTI_D1_EventInputConfig), (80 bytes). + Removing stm32h7xx_hal.o(i.HAL_EXTI_D3_EventInputConfig), (76 bytes). + Removing stm32h7xx_hal.o(i.HAL_EXTI_EdgeConfig), (52 bytes). + Removing stm32h7xx_hal.o(i.HAL_EXTI_GenerateSWInterrupt), (24 bytes). + Removing stm32h7xx_hal.o(i.HAL_EnableCompensationCell), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetDEVID), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetFMCMemorySwappingConfig), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetHalVersion), (8 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetTickFreq), (12 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetTickPrio), (12 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetUIDw0), (12 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetUIDw1), (12 bytes). + Removing stm32h7xx_hal.o(i.HAL_GetUIDw2), (12 bytes). + Removing stm32h7xx_hal.o(i.HAL_InitTick), (76 bytes). + Removing stm32h7xx_hal.o(i.HAL_MspDeInit), (2 bytes). + Removing stm32h7xx_hal.o(i.HAL_MspInit), (2 bytes). + Removing stm32h7xx_hal.o(i.HAL_ResumeTick), (14 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_CM7BootAddConfig), (40 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_CompensationCodeConfig), (24 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_CompensationCodeSelect), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_DisableBOOST), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_DisableIOSpeedOptimize), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_DisableVREFBUF), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_ETHInterfaceSelect), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_EnableBOOST), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_EnableIOSpeedOptimize), (16 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_EnableVREFBUF), (48 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_VREFBUF_HighImpedanceConfig), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_VREFBUF_TrimmingConfig), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SYSCFG_VREFBUF_VoltageScalingConfig), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SetFMCMemorySwappingConfig), (20 bytes). + Removing stm32h7xx_hal.o(i.HAL_SetTickFreq), (36 bytes). + Removing stm32h7xx_hal.o(i.HAL_SuspendTick), (14 bytes). + Removing stm32h7xx_hal_i2c.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_i2c.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_i2c.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_AbortCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_AddrCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_DeInit), (50 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_DisableListen_IT), (52 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_ER_IRQHandler), (104 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_EV_IRQHandler), (16 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_EnableListen_IT), (40 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_ErrorCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_GetError), (4 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_GetMode), (6 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_GetState), (6 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Init), (204 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_IsDeviceReady), (340 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_ListenCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterRxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MasterTxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Abort_IT), (128 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive), (332 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_DMA), (304 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive_IT), (140 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_DMA), (332 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Receive_IT), (164 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_DMA), (420 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Seq_Transmit_IT), (236 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit), (364 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_DMA), (336 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit_IT), (180 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MemRxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MemTxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read), (384 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_DMA), (288 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Read_IT), (160 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write), (372 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_DMA), (288 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Mem_Write_IT), (160 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_MspInit), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveRxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_SlaveTxCpltCallback), (2 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive), (354 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_DMA), (224 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Receive_IT), (96 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_DMA), (396 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Receive_IT), (216 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_DMA), (396 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Seq_Transmit_IT), (216 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit), (462 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_DMA), (284 bytes). + Removing stm32h7xx_hal_i2c.o(i.HAL_I2C_Slave_Transmit_IT), (132 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ConvertOtherXferOptions), (28 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMAAbort), (22 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMAError), (352 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMAMasterReceiveCplt), (94 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMAMasterTransmitCplt), (94 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMASlaveReceiveCplt), (172 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_DMASlaveTransmitCplt), (30 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Disable_IRQ), (90 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Enable_IRQ), (132 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR), (34 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITAddrCplt), (164 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITError), (304 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITListenCplt), (100 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITMasterCplt), (260 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITMasterSeqCplt), (80 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITSlaveCplt), (736 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_ITSlaveSeqCplt), (116 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred), (260 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_DMA), (296 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Master_ISR_IT), (352 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_DMA), (392 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Mem_ISR_IT), (380 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryRead), (116 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_RequestMemoryWrite), (116 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_DMA), (576 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_Slave_ISR_IT), (292 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_TransferConfig), (48 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_TreatErrorCallback), (42 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout), (122 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout), (168 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout), (86 bytes). + Removing stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout), (90 bytes). + Removing stm32h7xx_hal_i2c_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_i2c_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_i2c_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_ConfigAnalogFilter), (90 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_ConfigDigitalFilter), (86 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_DisableFastModePlus), (40 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_DisableWakeUp), (82 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_EnableFastModePlus), (40 bytes). + Removing stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_EnableWakeUp), (82 bytes). + Removing stm32h7xx_hal_exti.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_exti.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_exti.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_ClearConfigLine), (204 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_ClearPending), (28 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_GenerateSWI), (28 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_GetConfigLine), (240 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_GetHandle), (14 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_GetPending), (32 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_IRQHandler), (44 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_RegisterCallback), (22 bytes). + Removing stm32h7xx_hal_exti.o(i.HAL_EXTI_SetConfigLine), (276 bytes). + Removing stm32h7xx_hal_adc.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_adc.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_adc.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_AnalogWDGConfig), (944 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_ConvCpltCallback), (2 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_ConvHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_DeInit), (476 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_GetError), (4 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_GetState), (4 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_GetValue), (6 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_IRQHandler), (680 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_LevelOutOfWindowCallback), (2 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_MspInit), (2 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_PollForConversion), (312 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_PollForEvent), (222 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_Start), (260 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_Start_IT), (408 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_Stop), (62 bytes). + Removing stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_IT), (72 bytes). + Removing stm32h7xx_hal_adc.o(i.LL_ADC_SetAnalogWDMonitChannels), (44 bytes). + Removing stm32h7xx_hal_adc_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_adc_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_adc_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_GetValue), (22 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_SetValue), (126 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_DisableInjectedQueue), (48 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_DisableVoltageRegulator), (36 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EnableInjectedQueue), (48 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EndOfSamplingCallback), (2 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_EnterADCDeepPowerDownMode), (40 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConfigChannel), (1580 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedConvCpltCallback), (2 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedGetValue), (46 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedPollForConversion), (280 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedQueueOverflowCallback), (2 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart), (260 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStart_IT), (320 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop), (88 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_InjectedStop_IT), (98 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LevelOutOfWindow2Callback), (2 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LevelOutOfWindow3Callback), (2 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_FactorLoad), (92 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_GetValue), (156 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_LinearCalibration_SetValue), (256 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeConfigChannel), (296 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeGetValue), (40 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStart_DMA), (308 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeStop_DMA), (256 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularMultiModeStop_DMA), (276 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop), (96 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_DMA), (144 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_RegularStop_IT), (106 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_GetOffsetChannel), (12 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_INJ_IsConversionOngoing), (8 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled), (8 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing), (8 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_SetCalibrationLinearFactor), (48 bytes). + Removing stm32h7xx_hal_adc_ex.o(i.LL_ADC_SetOffset), (24 bytes). + Removing stm32h7xx_hal_uart.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_uart.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_uart.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_EnableReceiver), (74 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_EnableTransmitter), (74 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_HalfDuplex_Init), (122 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_LIN_Init), (154 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_LIN_SendBreak), (46 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_DisableMuteMode), (52 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_EnableMuteMode), (52 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_EnterMuteMode), (12 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_MultiProcessor_Init), (146 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UARTEx_RxEventCallback), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Abort), (268 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortCpltCallback), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive), (176 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceiveCpltCallback), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortReceive_IT), (204 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit), (140 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmitCpltCallback), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_AbortTransmit_IT), (160 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Abort_IT), (300 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_DMAPause), (116 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_DMAResume), (108 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop), (158 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_DeInit), (66 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_DisableReceiverTimeout), (72 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_EnableReceiverTimeout), (72 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_GetError), (6 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_MspDeInit), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_MspInit), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Receive), (240 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Receive_DMA), (72 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Receive_IT), (72 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_ReceiverTimeout_Config), (24 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_DMA), (144 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_Transmit_IT), (152 bytes). + Removing stm32h7xx_hal_uart.o(i.HAL_UART_TxHalfCpltCallback), (2 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMARxAbortCallback), (68 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMARxOnlyAbortCallback), (40 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMATransmitCplt), (66 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMATxAbortCallback), (78 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMATxHalfCplt), (10 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_DMATxOnlyAbortCallback), (40 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT), (200 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_RxISR_16BIT_FIFOEN), (408 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT), (200 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_RxISR_8BIT_FIFOEN), (408 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_Start_Receive_IT), (292 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_TxISR_16BIT), (82 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_TxISR_16BIT_FIFOEN), (104 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_TxISR_8BIT), (78 bytes). + Removing stm32h7xx_hal_uart.o(i.UART_TxISR_8BIT_FIFOEN), (100 bytes). + Removing stm32h7xx_hal_uart_ex.o(.rev16_text), (4 bytes). + Removing stm32h7xx_hal_uart_ex.o(.revsh_text), (4 bytes). + Removing stm32h7xx_hal_uart_ex.o(.rrx_text), (6 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_MultiProcessorEx_AddressLength_Set), (50 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_RS485Ex_Init), (148 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableStopMode), (46 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_EnableFifoMode), (72 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_EnableStopMode), (46 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_GetRxEventType), (4 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle), (318 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_IT), (78 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_StopModeWakeUpSourceConfig), (130 bytes). + Removing stm32h7xx_hal_uart_ex.o(i.UARTEx_Wakeup_AddressConfig), (34 bytes). + Removing event_groups.o(i.prvTestWaitCondition), (24 bytes). + Removing event_groups.o(i.uxEventGroupGetNumber), (12 bytes). + Removing event_groups.o(i.vEventGroupClearBitsCallback), (4 bytes). + Removing event_groups.o(i.vEventGroupDelete), (74 bytes). + Removing event_groups.o(i.vEventGroupSetBitsCallback), (4 bytes). + Removing event_groups.o(i.vEventGroupSetNumber), (4 bytes). + Removing event_groups.o(i.xEventGroupClearBits), (66 bytes). + Removing event_groups.o(i.xEventGroupClearBitsFromISR), (16 bytes). + Removing event_groups.o(i.xEventGroupCreate), (28 bytes). + Removing event_groups.o(i.xEventGroupCreateStatic), (46 bytes). + Removing event_groups.o(i.xEventGroupGetBitsFromISR), (26 bytes). + Removing event_groups.o(i.xEventGroupSetBits), (160 bytes). + Removing event_groups.o(i.xEventGroupSetBitsFromISR), (16 bytes). + Removing event_groups.o(i.xEventGroupSync), (200 bytes). + Removing event_groups.o(i.xEventGroupWaitBits), (264 bytes). + Removing queue.o(i.pcQueueGetName), (40 bytes). + Removing queue.o(i.prvInitialiseMutex), (24 bytes). + Removing queue.o(i.ucQueueGetQueueType), (6 bytes). + Removing queue.o(i.uxQueueGetQueueNumber), (4 bytes). + Removing queue.o(i.uxQueueMessagesWaiting), (38 bytes). + Removing queue.o(i.uxQueueMessagesWaitingFromISR), (24 bytes). + Removing queue.o(i.uxQueueSpacesAvailable), (42 bytes). + Removing queue.o(i.vQueueSetQueueNumber), (4 bytes). + Removing queue.o(i.xQueueCreateMutex), (24 bytes). + Removing queue.o(i.xQueueCreateMutexStatic), (28 bytes). + Removing queue.o(i.xQueueGetMutexHolder), (26 bytes). + Removing queue.o(i.xQueueGetMutexHolderFromISR), (32 bytes). + Removing queue.o(i.xQueueGiveMutexRecursive), (64 bytes). + Removing queue.o(i.xQueueIsQueueEmptyFromISR), (32 bytes). + Removing queue.o(i.xQueueIsQueueFullFromISR), (36 bytes). + Removing queue.o(i.xQueuePeek), (316 bytes). + Removing queue.o(i.xQueuePeekFromISR), (124 bytes). + Removing queue.o(i.xQueueTakeMutexRecursive), (66 bytes). + Removing stream_buffer.o(i.prvBytesInBuffer), (18 bytes). + Removing stream_buffer.o(i.prvInitialiseNewStreamBuffer), (68 bytes). + Removing stream_buffer.o(i.prvReadBytesFromBuffer), (142 bytes). + Removing stream_buffer.o(i.prvReadMessageFromBuffer), (66 bytes). + Removing stream_buffer.o(i.prvWriteBytesToBuffer), (132 bytes). + Removing stream_buffer.o(i.prvWriteMessageToBuffer), (76 bytes). + Removing stream_buffer.o(i.ucStreamBufferGetStreamBufferType), (8 bytes). + Removing stream_buffer.o(i.uxStreamBufferGetStreamBufferNumber), (4 bytes). + Removing stream_buffer.o(i.vStreamBufferDelete), (36 bytes). + Removing stream_buffer.o(i.vStreamBufferSetStreamBufferNumber), (4 bytes). + Removing stream_buffer.o(i.xStreamBufferBytesAvailable), (24 bytes). + Removing stream_buffer.o(i.xStreamBufferGenericCreate), (110 bytes). + Removing stream_buffer.o(i.xStreamBufferGenericCreateStatic), (130 bytes). + Removing stream_buffer.o(i.xStreamBufferIsEmpty), (36 bytes). + Removing stream_buffer.o(i.xStreamBufferIsFull), (50 bytes). + Removing stream_buffer.o(i.xStreamBufferNextMessageLengthBytes), (86 bytes). + Removing stream_buffer.o(i.xStreamBufferReceive), (224 bytes). + Removing stream_buffer.o(i.xStreamBufferReceiveCompletedFromISR), (76 bytes). + Removing stream_buffer.o(i.xStreamBufferReceiveFromISR), (146 bytes). + Removing stream_buffer.o(i.xStreamBufferReset), (70 bytes). + Removing stream_buffer.o(i.xStreamBufferSend), (260 bytes). + Removing stream_buffer.o(i.xStreamBufferSendCompletedFromISR), (76 bytes). + Removing stream_buffer.o(i.xStreamBufferSendFromISR), (152 bytes). + Removing stream_buffer.o(i.xStreamBufferSetTriggerLevel), (42 bytes). + Removing stream_buffer.o(i.xStreamBufferSpacesAvailable), (40 bytes). + Removing tasks.o(i.eTaskGetState), (124 bytes). + Removing tasks.o(i.pcTaskGetName), (36 bytes). + Removing tasks.o(i.prvListTasksWithinSingleList), (92 bytes). + Removing tasks.o(i.prvTaskCheckFreeStackSpace), (20 bytes). + Removing tasks.o(i.prvTaskIsTaskSuspended), (56 bytes). + Removing tasks.o(i.ulTaskNotifyTake), (104 bytes). + Removing tasks.o(i.ulTaskNotifyValueClear), (44 bytes). + Removing tasks.o(i.uxTaskGetNumberOfTasks), (12 bytes). + Removing tasks.o(i.uxTaskGetStackHighWaterMark), (20 bytes). + Removing tasks.o(i.uxTaskGetSystemState), (172 bytes). + Removing tasks.o(i.uxTaskGetTaskNumber), (12 bytes). + Removing tasks.o(i.uxTaskPriorityGet), (28 bytes). + Removing tasks.o(i.uxTaskPriorityGetFromISR), (44 bytes). + Removing tasks.o(i.uxTaskResetEventItemValue), (24 bytes). + Removing tasks.o(i.vTaskDelayUntil), (152 bytes). + Removing tasks.o(i.vTaskDelete), (144 bytes). + Removing tasks.o(i.vTaskEndScheduler), (28 bytes). + Removing tasks.o(i.vTaskGetInfo), (116 bytes). + Removing tasks.o(i.vTaskNotifyGiveFromISR), (180 bytes). + Removing tasks.o(i.vTaskPlaceOnUnorderedEventList), (80 bytes). + Removing tasks.o(i.vTaskPrioritySet), (184 bytes). + Removing tasks.o(i.vTaskRemoveFromUnorderedEventList), (112 bytes). + Removing tasks.o(i.vTaskResume), (124 bytes). + Removing tasks.o(i.vTaskSetTaskNumber), (8 bytes). + Removing tasks.o(i.vTaskSetTimeOutState), (52 bytes). + Removing tasks.o(i.vTaskSuspend), (156 bytes). + Removing tasks.o(i.xTaskCatchUpTicks), (52 bytes). + Removing tasks.o(i.xTaskGenericNotify), (232 bytes). + Removing tasks.o(i.xTaskGenericNotifyFromISR), (272 bytes). + Removing tasks.o(i.xTaskGetCurrentTaskHandle), (12 bytes). + Removing tasks.o(i.xTaskGetTickCountFromISR), (16 bytes). + Removing tasks.o(i.xTaskNotifyStateClear), (52 bytes). + Removing tasks.o(i.xTaskNotifyWait), (144 bytes). + Removing tasks.o(i.xTaskResumeFromISR), (144 bytes). + Removing timers.o(i.pcTimerGetName), (24 bytes). + Removing timers.o(i.prvInitialiseNewTimer), (80 bytes). + Removing timers.o(i.pvTimerGetTimerID), (38 bytes). + Removing timers.o(i.uxTimerGetReloadMode), (50 bytes). + Removing timers.o(i.uxTimerGetTimerNumber), (4 bytes). + Removing timers.o(i.vTimerSetReloadMode), (62 bytes). + Removing timers.o(i.vTimerSetTimerID), (40 bytes). + Removing timers.o(i.vTimerSetTimerNumber), (4 bytes). + Removing timers.o(i.xTimerCreate), (52 bytes). + Removing timers.o(i.xTimerCreateStatic), (52 bytes). + Removing timers.o(i.xTimerGetExpiryTime), (24 bytes). + Removing timers.o(i.xTimerGetPeriod), (24 bytes). + Removing timers.o(i.xTimerGetTimerDaemonTaskHandle), (32 bytes). + Removing timers.o(i.xTimerIsTimerActive), (50 bytes). + Removing timers.o(i.xTimerPendFunctionCall), (60 bytes). + Removing timers.o(i.xTimerPendFunctionCallFromISR), (40 bytes). + Removing cmsis_os2.o(.rev16_text), (4 bytes). + Removing cmsis_os2.o(.revsh_text), (4 bytes). + Removing cmsis_os2.o(.rrx_text), (6 bytes). + Removing cmsis_os2.o(i.AllocBlock), (18 bytes). + Removing cmsis_os2.o(i.CreateBlock), (26 bytes). + Removing cmsis_os2.o(i.FreeBlock), (8 bytes). + Removing cmsis_os2.o(i.OS_Tick_GetCount), (12 bytes). + Removing cmsis_os2.o(i.OS_Tick_GetInterval), (10 bytes). + Removing cmsis_os2.o(i.OS_Tick_GetOverflow), (12 bytes). + Removing cmsis_os2.o(i.TimerCallback), (22 bytes). + Removing cmsis_os2.o(i.osDelayUntil), (46 bytes). + Removing cmsis_os2.o(i.osEventFlagsClear), (66 bytes). + Removing cmsis_os2.o(i.osEventFlagsDelete), (34 bytes). + Removing cmsis_os2.o(i.osEventFlagsGet), (24 bytes). + Removing cmsis_os2.o(i.osEventFlagsNew), (72 bytes). + Removing cmsis_os2.o(i.osEventFlagsSet), (84 bytes). + Removing cmsis_os2.o(i.osEventFlagsWait), (104 bytes). + Removing cmsis_os2.o(i.osKernelGetInfo), (60 bytes). + Removing cmsis_os2.o(i.osKernelGetState), (40 bytes). + Removing cmsis_os2.o(i.osKernelGetSysTimerCount), (66 bytes). + Removing cmsis_os2.o(i.osKernelGetSysTimerFreq), (12 bytes). + Removing cmsis_os2.o(i.osKernelGetTickCount), (16 bytes). + Removing cmsis_os2.o(i.osKernelGetTickFreq), (6 bytes). + Removing cmsis_os2.o(i.osKernelLock), (44 bytes). + Removing cmsis_os2.o(i.osKernelRestoreLock), (72 bytes). + Removing cmsis_os2.o(i.osKernelUnlock), (62 bytes). + Removing cmsis_os2.o(i.osMemoryPoolAlloc), (152 bytes). + Removing cmsis_os2.o(i.osMemoryPoolDelete), (94 bytes). + Removing cmsis_os2.o(i.osMemoryPoolFree), (196 bytes). + Removing cmsis_os2.o(i.osMemoryPoolGetBlockSize), (28 bytes). + Removing cmsis_os2.o(i.osMemoryPoolGetCapacity), (28 bytes). + Removing cmsis_os2.o(i.osMemoryPoolGetCount), (56 bytes). + Removing cmsis_os2.o(i.osMemoryPoolGetName), (24 bytes). + Removing cmsis_os2.o(i.osMemoryPoolGetSpace), (44 bytes). + Removing cmsis_os2.o(i.osMemoryPoolNew), (252 bytes). + Removing cmsis_os2.o(i.osMessageQueueDelete), (42 bytes). + Removing cmsis_os2.o(i.osMessageQueueGet), (108 bytes). + Removing cmsis_os2.o(i.osMessageQueueGetCapacity), (12 bytes). + Removing cmsis_os2.o(i.osMessageQueueGetCount), (22 bytes). + Removing cmsis_os2.o(i.osMessageQueueGetMsgSize), (12 bytes). + Removing cmsis_os2.o(i.osMessageQueueGetSpace), (48 bytes). + Removing cmsis_os2.o(i.osMessageQueueNew), (124 bytes). + Removing cmsis_os2.o(i.osMessageQueuePut), (112 bytes). + Removing cmsis_os2.o(i.osMessageQueueReset), (36 bytes). + Removing cmsis_os2.o(i.osMutexAcquire), (92 bytes). + Removing cmsis_os2.o(i.osMutexDelete), (46 bytes). + Removing cmsis_os2.o(i.osMutexGetOwner), (22 bytes). + Removing cmsis_os2.o(i.osMutexNew), (152 bytes). + Removing cmsis_os2.o(i.osMutexRelease), (72 bytes). + Removing cmsis_os2.o(i.osSemaphoreDelete), (42 bytes). + Removing cmsis_os2.o(i.osSemaphoreGetCount), (22 bytes). + Removing cmsis_os2.o(i.osThreadEnumerate), (98 bytes). + Removing cmsis_os2.o(i.osThreadExit), (8 bytes). + Removing cmsis_os2.o(i.osThreadFlagsClear), (84 bytes). + Removing cmsis_os2.o(i.osThreadFlagsGet), (46 bytes). + Removing cmsis_os2.o(i.osThreadFlagsSet), (116 bytes). + Removing cmsis_os2.o(i.osThreadFlagsWait), (156 bytes). + Removing cmsis_os2.o(i.osThreadGetCount), (16 bytes). + Removing cmsis_os2.o(i.osThreadGetId), (4 bytes). + Removing cmsis_os2.o(i.osThreadGetName), (18 bytes). + Removing cmsis_os2.o(i.osThreadGetPriority), (20 bytes). + Removing cmsis_os2.o(i.osThreadGetStackSpace), (24 bytes). + Removing cmsis_os2.o(i.osThreadGetState), (56 bytes). + Removing cmsis_os2.o(i.osThreadResume), (34 bytes). + Removing cmsis_os2.o(i.osThreadSetPriority), (42 bytes). + Removing cmsis_os2.o(i.osThreadSuspend), (34 bytes). + Removing cmsis_os2.o(i.osThreadTerminate), (52 bytes). + Removing cmsis_os2.o(i.osThreadYield), (40 bytes). + Removing cmsis_os2.o(i.osTimerDelete), (68 bytes). + Removing cmsis_os2.o(i.osTimerGetName), (18 bytes). + Removing cmsis_os2.o(i.osTimerIsRunning), (18 bytes). + Removing cmsis_os2.o(i.osTimerNew), (156 bytes). + Removing cmsis_os2.o(i.osTimerStart), (50 bytes). + Removing cmsis_os2.o(i.osTimerStop), (68 bytes). + Removing heap_4.o(i.vPortGetHeapStats), (108 bytes). + Removing heap_4.o(i.vPortInitialiseBlocks), (2 bytes). + Removing heap_4.o(i.xPortGetFreeHeapSize), (12 bytes). + Removing heap_4.o(i.xPortGetMinimumEverFreeHeapSize), (12 bytes). + Removing port.o(i.vPortEndScheduler), (32 bytes). + Removing usbd_core.o(.rev16_text), (4 bytes). + Removing usbd_core.o(.revsh_text), (4 bytes). + Removing usbd_core.o(.rrx_text), (6 bytes). + Removing usbd_core.o(i.USBD_DeInit), (54 bytes). + Removing usbd_core.o(i.USBD_GetEpDesc), (58 bytes). + Removing usbd_core.o(i.USBD_GetNextDesc), (14 bytes). + Removing usbd_core.o(i.USBD_Init), (40 bytes). + Removing usbd_core.o(i.USBD_RegisterClass), (58 bytes). + Removing usbd_core.o(i.USBD_Start), (4 bytes). + Removing usbd_core.o(i.USBD_Stop), (28 bytes). + Removing usbd_ctlreq.o(.rev16_text), (4 bytes). + Removing usbd_ctlreq.o(.revsh_text), (4 bytes). + Removing usbd_ctlreq.o(.rrx_text), (6 bytes). + Removing usbd_ctlreq.o(i.USBD_GetLen), (20 bytes). + Removing usbd_ctlreq.o(i.USBD_GetString), (80 bytes). + Removing usbd_ioreq.o(.rev16_text), (4 bytes). + Removing usbd_ioreq.o(.revsh_text), (4 bytes). + Removing usbd_ioreq.o(.rrx_text), (6 bytes). + Removing usbd_ioreq.o(i.USBD_CtlPrepareRx), (30 bytes). + Removing usbd_ioreq.o(i.USBD_GetRxCount), (4 bytes). + Removing usbd_cdc.o(.rev16_text), (4 bytes). + Removing usbd_cdc.o(.revsh_text), (4 bytes). + Removing usbd_cdc.o(.rrx_text), (6 bytes). + Removing usbd_cdc.o(i.USBD_CDC_DataIn), (120 bytes). + Removing usbd_cdc.o(i.USBD_CDC_DataOut), (62 bytes). + Removing usbd_cdc.o(i.USBD_CDC_DeInit), (148 bytes). + Removing usbd_cdc.o(i.USBD_CDC_EP0_RxReady), (56 bytes). + Removing usbd_cdc.o(i.USBD_CDC_GetDeviceQualifierDescriptor), (12 bytes). + Removing usbd_cdc.o(i.USBD_CDC_GetFSCfgDesc), (60 bytes). + Removing usbd_cdc.o(i.USBD_CDC_GetHSCfgDesc), (64 bytes). + Removing usbd_cdc.o(i.USBD_CDC_GetOtherSpeedCfgDesc), (60 bytes). + Removing usbd_cdc.o(i.USBD_CDC_Init), (348 bytes). + Removing usbd_cdc.o(i.USBD_CDC_ReceivePacket), (64 bytes). + Removing usbd_cdc.o(i.USBD_CDC_RegisterInterface), (24 bytes). + Removing usbd_cdc.o(i.USBD_CDC_SetRxBuffer), (28 bytes). + Removing usbd_cdc.o(i.USBD_CDC_SetTxBuffer), (32 bytes). + Removing usbd_cdc.o(i.USBD_CDC_Setup), (266 bytes). + Removing usbd_cdc.o(i.USBD_CDC_TransmitPacket), (80 bytes). + Removing usbd_cdc.o(.data), (83 bytes). + Removing usbd_cdc.o(.data), (56 bytes). + +1034 unused section(s) (total 90802 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../Src/freertos.c 0x00000000 Number 0 freertos.o ABSOLUTE + ../Src/main.c 0x00000000 Number 0 main.o ABSOLUTE + ../Src/stm32h7xx_hal_msp.c 0x00000000 Number 0 stm32h7xx_hal_msp.o ABSOLUTE + ../Src/stm32h7xx_hal_timebase_tim.c 0x00000000 Number 0 stm32h7xx_hal_timebase_tim.o ABSOLUTE + ../Src/stm32h7xx_it.c 0x00000000 Number 0 stm32h7xx_it.o ABSOLUTE + ../Src/system_stm32h7xx.c 0x00000000 Number 0 system_stm32h7xx.o ABSOLUTE + ../Src/usb_device.c 0x00000000 Number 0 usb_device.o ABSOLUTE + ../Src/usbd_cdc_if.c 0x00000000 Number 0 usbd_cdc_if.o ABSOLUTE + ../Src/usbd_conf.c 0x00000000 Number 0 usbd_conf.o ABSOLUTE + ../Src/usbd_desc.c 0x00000000 Number 0 usbd_desc.o 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C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.c 0x00000000 Number 0 stm32h7xx_hal_adc.o ABSOLUTE + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c 0x00000000 Number 0 stm32h7xx_hal_adc_ex.o ABSOLUTE + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c 0x00000000 Number 0 stm32h7xx_hal_cortex.o ABSOLUTE + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c 0x00000000 Number 0 stm32h7xx_hal_dma.o ABSOLUTE + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c 0x00000000 Number 0 stm32h7xx_hal_dma_ex.o ABSOLUTE + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c 0x00000000 Number 0 stm32h7xx_hal_exti.o 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stm32h7xx_hal.o(i.HAL_GetTick) + i.HAL_IncTick 0x0800456c Section 0 stm32h7xx_hal.o(i.HAL_IncTick) + i.HAL_Init 0x0800457c Section 0 stm32h7xx_hal.o(i.HAL_Init) + i.HAL_InitTick 0x080045d8 Section 0 stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) + i.HAL_MspInit 0x08004668 Section 0 stm32h7xx_hal_msp.o(i.HAL_MspInit) + i.HAL_NVIC_EnableIRQ 0x0800468c Section 0 stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) + i.HAL_NVIC_SetPriority 0x080046a8 Section 0 stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) + i.HAL_NVIC_SetPriorityGrouping 0x080046e8 Section 0 stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping) + i.HAL_PCDEx_LPM_Callback 0x0800470c Section 0 stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_LPM_Callback) + i.HAL_PCD_ConnectCallback 0x0800470e Section 0 usbd_conf.o(i.HAL_PCD_ConnectCallback) + i.HAL_PCD_DataInStageCallback 0x08004716 Section 0 usbd_conf.o(i.HAL_PCD_DataInStageCallback) + i.HAL_PCD_DataOutStageCallback 0x08004728 Section 0 usbd_conf.o(i.HAL_PCD_DataOutStageCallback) + i.HAL_PCD_DisconnectCallback 0x0800473c Section 0 usbd_conf.o(i.HAL_PCD_DisconnectCallback) + i.HAL_PCD_EP_Abort 0x08004744 Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Abort) + i.HAL_PCD_EP_ClrStall 0x08004762 Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_ClrStall) + i.HAL_PCD_EP_Open 0x080047ba Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Open) + i.HAL_PCD_EP_Receive 0x0800481a Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Receive) + i.HAL_PCD_EP_SetStall 0x0800484c Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_SetStall) + i.HAL_PCD_EP_Transmit 0x080048bc Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Transmit) + i.HAL_PCD_IRQHandler 0x080048ee Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) + i.HAL_PCD_ISOINIncompleteCallback 0x08004e30 Section 0 usbd_conf.o(i.HAL_PCD_ISOINIncompleteCallback) + i.HAL_PCD_ISOOUTIncompleteCallback 0x08004e38 Section 0 usbd_conf.o(i.HAL_PCD_ISOOUTIncompleteCallback) + i.HAL_PCD_ResetCallback 0x08004e40 Section 0 usbd_conf.o(i.HAL_PCD_ResetCallback) + i.HAL_PCD_ResumeCallback 0x08004e6e Section 0 usbd_conf.o(i.HAL_PCD_ResumeCallback) + i.HAL_PCD_SOFCallback 0x08004e76 Section 0 usbd_conf.o(i.HAL_PCD_SOFCallback) + i.HAL_PCD_SetAddress 0x08004e7e Section 0 stm32h7xx_hal_pcd.o(i.HAL_PCD_SetAddress) + i.HAL_PCD_SetupStageCallback 0x08004ea4 Section 0 usbd_conf.o(i.HAL_PCD_SetupStageCallback) + i.HAL_PCD_SuspendCallback 0x08004eb4 Section 0 usbd_conf.o(i.HAL_PCD_SuspendCallback) + i.HAL_PWREx_ConfigSupply 0x08004ee4 Section 0 stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply) + i.HAL_RCCEx_GetD3PCLK1Freq 0x08004f3c Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) + i.HAL_RCCEx_GetPLL1ClockFreq 0x08004f60 Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL1ClockFreq) + i.HAL_RCCEx_GetPLL2ClockFreq 0x08005120 Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq) + i.HAL_RCCEx_GetPLL3ClockFreq 0x080052e0 Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq) + i.HAL_RCCEx_GetPeriphCLKFreq 0x080054a0 Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) + i.HAL_RCCEx_PeriphCLKConfig 0x08005a90 Section 0 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) + i.HAL_RCC_ClockConfig 0x08006494 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) + i.HAL_RCC_GetClockConfig 0x08006710 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetClockConfig) + i.HAL_RCC_GetHCLKFreq 0x08006770 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) + i.HAL_RCC_GetPCLK1Freq 0x080067b4 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) + i.HAL_RCC_GetPCLK2Freq 0x080067d8 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq) + i.HAL_RCC_GetSysClockFreq 0x080067fc Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) + i.HAL_RCC_OscConfig 0x080069b0 Section 0 stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) + i.HAL_SYSCFG_AnalogSwitchConfig 0x08007034 Section 0 stm32h7xx_hal.o(i.HAL_SYSCFG_AnalogSwitchConfig) + i.HAL_TIMEx_Break2Callback 0x08007044 Section 0 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_Break2Callback) + i.HAL_TIMEx_BreakCallback 0x08007046 Section 0 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback) + i.HAL_TIMEx_CommutCallback 0x08007048 Section 0 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback) + i.HAL_TIMEx_ConfigBreakDeadTime 0x0800704c Section 0 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakDeadTime) + i.HAL_TIMEx_MasterConfigSynchronization 0x080070d8 Section 0 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) + i.HAL_TIM_Base_Init 0x08007178 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) + i.HAL_TIM_Base_MspInit 0x080071c8 Section 0 stm32h7xx_hal_msp.o(i.HAL_TIM_Base_MspInit) + i.HAL_TIM_Base_Start_IT 0x08007228 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_IT) + i.HAL_TIM_ConfigClockSource 0x080072bc Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) + i.HAL_TIM_IC_CaptureCallback 0x080073c4 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback) + i.HAL_TIM_IRQHandler 0x080073c6 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) + i.HAL_TIM_MspPostInit 0x08007518 Section 0 stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) + i.HAL_TIM_OC_DelayElapsedCallback 0x08007568 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback) + i.HAL_TIM_PWM_ConfigChannel 0x0800756a Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) + i.HAL_TIM_PWM_Init 0x080076a0 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) + i.HAL_TIM_PWM_MspInit 0x080076ee Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_MspInit) + i.HAL_TIM_PWM_PulseFinishedCallback 0x080076f0 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) + i.HAL_TIM_PWM_Start 0x080076f4 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) + i.HAL_TIM_PWM_Stop 0x0800781c Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) + i.HAL_TIM_PeriodElapsedCallback 0x080078cc Section 0 main.o(i.HAL_TIM_PeriodElapsedCallback) + i.HAL_TIM_TriggerCallback 0x080078e0 Section 0 stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerCallback) + i.HAL_UARTEx_DisableFifoMode 0x080078e2 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableFifoMode) + i.HAL_UARTEx_ReceiveToIdle_DMA 0x08007920 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) + i.HAL_UARTEx_RxEventCallback 0x08007974 Section 0 main.o(i.HAL_UARTEx_RxEventCallback) + i.HAL_UARTEx_RxFifoFullCallback 0x08007998 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_RxFifoFullCallback) + i.HAL_UARTEx_SetRxFifoThreshold 0x0800799a Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold) + i.HAL_UARTEx_SetTxFifoThreshold 0x080079e6 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold) + i.HAL_UARTEx_TxFifoEmptyCallback 0x08007a32 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_TxFifoEmptyCallback) + i.HAL_UARTEx_WakeupCallback 0x08007a34 Section 0 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_WakeupCallback) + i.HAL_UART_ErrorCallback 0x08007a36 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) + i.HAL_UART_GetState 0x08007a38 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_GetState) + i.HAL_UART_IRQHandler 0x08007a44 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) + i.HAL_UART_Init 0x08007df0 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_Init) + i.HAL_UART_MspInit 0x08007e60 Section 0 stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) + i.HAL_UART_RxCpltCallback 0x08007f30 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) + i.HAL_UART_RxHalfCpltCallback 0x08007f32 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback) + i.HAL_UART_Transmit 0x08007f34 Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_Transmit) + i.HAL_UART_TxCpltCallback 0x08007fec Section 0 stm32h7xx_hal_uart.o(i.HAL_UART_TxCpltCallback) + i.HardFault_Handler 0x08007fee Section 0 stm32h7xx_it.o(i.HardFault_Handler) + i.LL_ADC_INJ_IsConversionOngoing 0x08007ff0 Section 0 stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) + LL_ADC_INJ_IsConversionOngoing 0x08007ff1 Thumb Code 8 stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing) + i.LL_ADC_IsEnabled 0x08007ff8 Section 0 stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) + LL_ADC_IsEnabled 0x08007ff9 Thumb Code 8 stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled) + i.LL_ADC_REG_IsConversionOngoing 0x08008000 Section 0 stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) + LL_ADC_REG_IsConversionOngoing 0x08008001 Thumb Code 8 stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing) + i.LL_ADC_REG_IsTriggerSourceSWStart 0x08008008 Section 0 stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsTriggerSourceSWStart) + LL_ADC_REG_IsTriggerSourceSWStart 0x08008009 Thumb Code 16 stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsTriggerSourceSWStart) + i.LineCheck 0x08008018 Section 0 main.o(i.LineCheck) + i.MX_ADC3_Init 0x080084fc Section 0 main.o(i.MX_ADC3_Init) + MX_ADC3_Init 0x080084fd Thumb Code 332 main.o(i.MX_ADC3_Init) + i.MX_BDMA_Init 0x08008670 Section 0 main.o(i.MX_BDMA_Init) + MX_BDMA_Init 0x08008671 Thumb Code 56 main.o(i.MX_BDMA_Init) + i.MX_DMA_Init 0x080086ac Section 0 main.o(i.MX_DMA_Init) + MX_DMA_Init 0x080086ad Thumb Code 108 main.o(i.MX_DMA_Init) + i.MX_GPIO_Init 0x08008724 Section 0 main.o(i.MX_GPIO_Init) + MX_GPIO_Init 0x08008725 Thumb Code 316 main.o(i.MX_GPIO_Init) + i.MX_TIM1_Init 0x08008878 Section 0 main.o(i.MX_TIM1_Init) + MX_TIM1_Init 0x08008879 Thumb Code 206 main.o(i.MX_TIM1_Init) + i.MX_TIM2_Init 0x08008950 Section 0 main.o(i.MX_TIM2_Init) + MX_TIM2_Init 0x08008951 Thumb Code 150 main.o(i.MX_TIM2_Init) + i.MX_TIM4_Init 0x080089ec Section 0 main.o(i.MX_TIM4_Init) + MX_TIM4_Init 0x080089ed Thumb Code 146 main.o(i.MX_TIM4_Init) + i.MX_USART1_UART_Init 0x08008a88 Section 0 main.o(i.MX_USART1_UART_Init) + MX_USART1_UART_Init 0x08008a89 Thumb Code 90 main.o(i.MX_USART1_UART_Init) + i.MemManage_Handler 0x08008aec Section 0 stm32h7xx_it.o(i.MemManage_Handler) + i.NMI_Handler 0x08008aee Section 0 stm32h7xx_it.o(i.NMI_Handler) + i.OTG_FS_IRQHandler 0x08008af0 Section 0 stm32h7xx_it.o(i.OTG_FS_IRQHandler) + i.PCD_EP_OutSetupPacket_int 0x08008afc Section 0 stm32h7xx_hal_pcd.o(i.PCD_EP_OutSetupPacket_int) + PCD_EP_OutSetupPacket_int 0x08008afd Thumb Code 66 stm32h7xx_hal_pcd.o(i.PCD_EP_OutSetupPacket_int) + i.PCD_EP_OutXfrComplete_int 0x08008b44 Section 0 stm32h7xx_hal_pcd.o(i.PCD_EP_OutXfrComplete_int) + PCD_EP_OutXfrComplete_int 0x08008b45 Thumb Code 220 stm32h7xx_hal_pcd.o(i.PCD_EP_OutXfrComplete_int) + i.PCD_WriteEmptyTxFifo 0x08008c28 Section 0 stm32h7xx_hal_pcd.o(i.PCD_WriteEmptyTxFifo) + PCD_WriteEmptyTxFifo 0x08008c29 Thumb Code 156 stm32h7xx_hal_pcd.o(i.PCD_WriteEmptyTxFifo) + i.RCCEx_PLL2_Config 0x08008cc4 Section 0 stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config) + RCCEx_PLL2_Config 0x08008cc5 Thumb Code 286 stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config) + i.RCCEx_PLL3_Config 0x08008de8 Section 0 stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config) + RCCEx_PLL3_Config 0x08008de9 Thumb Code 286 stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config) + i.SWAPBYTE 0x08008f0c Section 0 usbd_ctlreq.o(i.SWAPBYTE) + SWAPBYTE 0x08008f0d Thumb Code 10 usbd_ctlreq.o(i.SWAPBYTE) + i.SampleRate_Set 0x08008f18 Section 0 main.o(i.SampleRate_Set) + i.SlopeSet 0x08008fc8 Section 0 main.o(i.SlopeSet) + i.StartDefaultTask 0x08009180 Section 0 main.o(i.StartDefaultTask) + i.SysTick_Handler 0x08009358 Section 0 cmsis_os2.o(i.SysTick_Handler) + i.SystemClock_Config 0x08009374 Section 0 main.o(i.SystemClock_Config) + i.SystemInit 0x0800941c Section 0 system_stm32h7xx.o(i.SystemInit) + i.TIM7_IRQHandler 0x080094f8 Section 0 stm32h7xx_it.o(i.TIM7_IRQHandler) + i.TIM_Base_SetConfig 0x08009504 Section 0 stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) + i.TIM_CCxChannelCmd 0x080095cc Section 0 stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) + i.TIM_ETR_SetConfig 0x080095e6 Section 0 stm32h7xx_hal_tim.o(i.TIM_ETR_SetConfig) + i.TIM_ITRx_SetConfig 0x080095fc Section 0 stm32h7xx_hal_tim.o(i.TIM_ITRx_SetConfig) + TIM_ITRx_SetConfig 0x080095fd Thumb Code 16 stm32h7xx_hal_tim.o(i.TIM_ITRx_SetConfig) + i.TIM_OC1_SetConfig 0x08009610 Section 0 stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig) + TIM_OC1_SetConfig 0x08009611 Thumb Code 136 stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig) + i.TIM_OC2_SetConfig 0x080096b0 Section 0 stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) + i.TIM_OC3_SetConfig 0x08009744 Section 0 stm32h7xx_hal_tim.o(i.TIM_OC3_SetConfig) + TIM_OC3_SetConfig 0x08009745 Thumb Code 122 stm32h7xx_hal_tim.o(i.TIM_OC3_SetConfig) + i.TIM_OC4_SetConfig 0x080097d8 Section 0 stm32h7xx_hal_tim.o(i.TIM_OC4_SetConfig) + TIM_OC4_SetConfig 0x080097d9 Thumb Code 92 stm32h7xx_hal_tim.o(i.TIM_OC4_SetConfig) + i.TIM_OC5_SetConfig 0x0800984c Section 0 stm32h7xx_hal_tim.o(i.TIM_OC5_SetConfig) + TIM_OC5_SetConfig 0x0800984d Thumb Code 86 stm32h7xx_hal_tim.o(i.TIM_OC5_SetConfig) + i.TIM_OC6_SetConfig 0x080098bc Section 0 stm32h7xx_hal_tim.o(i.TIM_OC6_SetConfig) + TIM_OC6_SetConfig 0x080098bd Thumb Code 88 stm32h7xx_hal_tim.o(i.TIM_OC6_SetConfig) + i.TIM_TI1_ConfigInputStage 0x0800992c Section 0 stm32h7xx_hal_tim.o(i.TIM_TI1_ConfigInputStage) + TIM_TI1_ConfigInputStage 0x0800992d Thumb Code 34 stm32h7xx_hal_tim.o(i.TIM_TI1_ConfigInputStage) + i.TIM_TI2_ConfigInputStage 0x0800994e Section 0 stm32h7xx_hal_tim.o(i.TIM_TI2_ConfigInputStage) + TIM_TI2_ConfigInputStage 0x0800994f Thumb Code 36 stm32h7xx_hal_tim.o(i.TIM_TI2_ConfigInputStage) + i.UARTEx_SetNbDataToProcess 0x08009974 Section 0 stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) + UARTEx_SetNbDataToProcess 0x08009975 Thumb Code 66 stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess) + i.UART_AdvFeatureConfig 0x080099bc Section 0 stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) + i.UART_CheckIdleState 0x08009a84 Section 0 stm32h7xx_hal_uart.o(i.UART_CheckIdleState) + i.UART_DMAAbortOnError 0x08009b2e Section 0 stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError) + UART_DMAAbortOnError 0x08009b2f Thumb Code 16 stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError) + i.UART_DMAError 0x08009b3e Section 0 stm32h7xx_hal_uart.o(i.UART_DMAError) + UART_DMAError 0x08009b3f Thumb Code 80 stm32h7xx_hal_uart.o(i.UART_DMAError) + i.UART_DMAReceiveCplt 0x08009b8e Section 0 stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) + UART_DMAReceiveCplt 0x08009b8f Thumb Code 132 stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) + i.UART_DMARxHalfCplt 0x08009c12 Section 0 stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) + UART_DMARxHalfCplt 0x08009c13 Thumb Code 32 stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) + i.UART_EndRxTransfer 0x08009c34 Section 0 stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) + UART_EndRxTransfer 0x08009c35 Thumb Code 78 stm32h7xx_hal_uart.o(i.UART_EndRxTransfer) + i.UART_EndTransmit_IT 0x08009c88 Section 0 stm32h7xx_hal_uart.o(i.UART_EndTransmit_IT) + UART_EndTransmit_IT 0x08009c89 Thumb Code 36 stm32h7xx_hal_uart.o(i.UART_EndTransmit_IT) + i.UART_EndTxTransfer 0x08009cac Section 0 stm32h7xx_hal_uart.o(i.UART_EndTxTransfer) + UART_EndTxTransfer 0x08009cad Thumb Code 46 stm32h7xx_hal_uart.o(i.UART_EndTxTransfer) + i.UART_SetConfig 0x08009cdc Section 0 stm32h7xx_hal_uart.o(i.UART_SetConfig) + i.UART_Start_Receive_DMA 0x0800a16c Section 0 stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) + i.UART_WaitOnFlagUntilTimeout 0x0800a210 Section 0 stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) + i.USART1_IRQHandler 0x0800a2a8 Section 0 stm32h7xx_it.o(i.USART1_IRQHandler) + i.USBD_ClrClassConfig 0x0800a2c8 Section 0 usbd_core.o(i.USBD_ClrClassConfig) + i.USBD_ClrFeature 0x0800a2dc Section 0 usbd_ctlreq.o(i.USBD_ClrFeature) + USBD_ClrFeature 0x0800a2dd Thumb Code 38 usbd_ctlreq.o(i.USBD_ClrFeature) + i.USBD_CoreFindEP 0x0800a302 Section 0 usbd_core.o(i.USBD_CoreFindEP) + i.USBD_CoreFindIF 0x0800a306 Section 0 usbd_core.o(i.USBD_CoreFindIF) + i.USBD_CtlContinueRx 0x0800a30a Section 0 usbd_ioreq.o(i.USBD_CtlContinueRx) + i.USBD_CtlContinueSendData 0x0800a31a Section 0 usbd_ioreq.o(i.USBD_CtlContinueSendData) + i.USBD_CtlError 0x0800a32a Section 0 usbd_ctlreq.o(i.USBD_CtlError) + i.USBD_CtlReceiveStatus 0x0800a342 Section 0 usbd_ioreq.o(i.USBD_CtlReceiveStatus) + i.USBD_CtlSendData 0x0800a358 Section 0 usbd_ioreq.o(i.USBD_CtlSendData) + i.USBD_CtlSendStatus 0x0800a372 Section 0 usbd_ioreq.o(i.USBD_CtlSendStatus) + i.USBD_GetConfig 0x0800a388 Section 0 usbd_ctlreq.o(i.USBD_GetConfig) + USBD_GetConfig 0x0800a389 Thumb Code 58 usbd_ctlreq.o(i.USBD_GetConfig) + i.USBD_GetDescriptor 0x0800a3c2 Section 0 usbd_ctlreq.o(i.USBD_GetDescriptor) + USBD_GetDescriptor 0x0800a3c3 Thumb Code 484 usbd_ctlreq.o(i.USBD_GetDescriptor) + i.USBD_GetStatus 0x0800a5a6 Section 0 usbd_ctlreq.o(i.USBD_GetStatus) + USBD_GetStatus 0x0800a5a7 Thumb Code 60 usbd_ctlreq.o(i.USBD_GetStatus) + i.USBD_Get_USB_Status 0x0800a5e2 Section 0 usbd_conf.o(i.USBD_Get_USB_Status) + i.USBD_LL_ClearStallEP 0x0800a606 Section 0 usbd_conf.o(i.USBD_LL_ClearStallEP) + i.USBD_LL_DataInStage 0x0800a618 Section 0 usbd_core.o(i.USBD_LL_DataInStage) + i.USBD_LL_DataOutStage 0x0800a6f4 Section 0 usbd_core.o(i.USBD_LL_DataOutStage) + i.USBD_LL_DevConnected 0x0800a7be Section 0 usbd_core.o(i.USBD_LL_DevConnected) + i.USBD_LL_DevDisconnected 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0x24000150 Data 4 heap_4.o(.data) + xMinimumEverFreeBytesRemaining 0x24000154 Data 4 heap_4.o(.data) + xNumberOfSuccessfulAllocations 0x24000158 Data 4 heap_4.o(.data) + xNumberOfSuccessfulFrees 0x2400015c Data 4 heap_4.o(.data) + xBlockAllocatedBit 0x24000160 Data 4 heap_4.o(.data) + xStart 0x24000164 Data 8 heap_4.o(.data) + .data 0x2400016c Section 12 port.o(.data) + ucMaxSysCallPriority 0x2400016c Data 1 port.o(.data) + uxCriticalNesting 0x24000170 Data 4 port.o(.data) + ulMaxPRIGROUPValue 0x24000174 Data 4 port.o(.data) + .data 0x24000178 Section 1 usbd_ctlreq.o(.data) + cfgidx 0x24000178 Data 1 usbd_ctlreq.o(.data) + .bss 0x2400017c Section 326 communicaion.o(.bss) + .bss 0x240002c4 Section 59372 main.o(.bss) + .bss 0x2400eab0 Section 120 main.o(.bss) + .bss 0x2400eb28 Section 1796 usbd_conf.o(.bss) + mem 0x2400eb28 Data 544 usbd_conf.o(.bss) + .bss 0x2400f22c Section 76 stm32h7xx_hal_timebase_tim.o(.bss) + .bss 0x2400f278 Section 64 queue.o(.bss) + .bss 0x2400f2b8 Section 1220 tasks.o(.bss) + pxReadyTasksLists 0x2400f2b8 Data 1120 tasks.o(.bss) + xDelayedTaskList1 0x2400f718 Data 20 tasks.o(.bss) + xDelayedTaskList2 0x2400f72c Data 20 tasks.o(.bss) + xPendingReadyList 0x2400f740 Data 20 tasks.o(.bss) + xTasksWaitingTermination 0x2400f754 Data 20 tasks.o(.bss) + xSuspendedTaskList 0x2400f768 Data 20 tasks.o(.bss) + .bss 0x2400f77c Section 280 timers.o(.bss) + xStaticTimerQueue 0x2400f77c Data 80 timers.o(.bss) + ucStaticTimerQueueStorage 0x2400f7cc Data 160 timers.o(.bss) + xActiveTimerList1 0x2400f86c Data 20 timers.o(.bss) + xActiveTimerList2 0x2400f880 Data 20 timers.o(.bss) + .bss 0x2400f894 Section 2232 cmsis_os2.o(.bss) + Idle_TCB 0x2400f894 Data 92 cmsis_os2.o(.bss) + Idle_Stack 0x2400f8f0 Data 1024 cmsis_os2.o(.bss) + Timer_TCB 0x2400fcf0 Data 92 cmsis_os2.o(.bss) + Timer_Stack 0x2400fd4c Data 1024 cmsis_os2.o(.bss) + .bss 0x2401014c Section 20480 heap_4.o(.bss) + ucHeap 0x2401014c Data 20480 heap_4.o(.bss) + .bss 0x2401514c Section 96 libspace.o(.bss) + HEAP 0x240151b0 Section 512 startup_stm32h750xx.o(HEAP) + Heap_Mem 0x240151b0 Data 512 startup_stm32h750xx.o(HEAP) + STACK 0x240153b0 Section 1024 startup_stm32h750xx.o(STACK) + Stack_Mem 0x240153b0 Data 1024 startup_stm32h750xx.o(STACK) + __initial_sp 0x240157b0 Data 0 startup_stm32h750xx.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv4$E$P$D$K$B$S$7EM$VFPv5_D16$PE$PLD8$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEX$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + __ARM_exceptions_init - Undefined Weak Reference + __alloca_initialize - Undefined Weak Reference + __arm_fini_ - Undefined Weak Reference + __arm_preinit_ - Undefined Weak Reference + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + __rt_locale - Undefined Weak Reference + __sigvec_lookup - Undefined Weak Reference + _atexit_init - Undefined Weak Reference + _call_atexit_fns - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _fp_trap_init - Undefined Weak Reference + _fp_trap_shutdown - Undefined Weak Reference + _get_lc_collate - Undefined Weak Reference + _get_lc_ctype - Undefined Weak Reference + _get_lc_monetary - Undefined Weak Reference + _get_lc_numeric - Undefined Weak Reference + _get_lc_time - Undefined Weak Reference + _getenv_init - Undefined Weak Reference + _handle_redirection - Undefined Weak Reference + _init_alloc - Undefined Weak Reference + _init_user_alloc - Undefined Weak Reference + _initio - Undefined Weak Reference + _rand_init - Undefined Weak Reference + _signal_finish - Undefined Weak Reference + _signal_init - Undefined Weak Reference + _terminate_alloc - Undefined Weak Reference + _terminate_user_alloc - Undefined Weak Reference + _terminateio - Undefined Weak Reference + __Vectors_Size 0x00000298 Number 0 startup_stm32h750xx.o ABSOLUTE + __Vectors 0x08000000 Data 4 startup_stm32h750xx.o(RESET) + __Vectors_End 0x08000298 Data 0 startup_stm32h750xx.o(RESET) + __main 0x08000299 Thumb Code 8 __main.o(!!!main) + __scatterload 0x080002a1 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_rt2 0x080002a1 Thumb Code 44 __scatter.o(!!!scatter) + __scatterload_rt2_thumb_only 0x080002a1 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_null 0x080002af Thumb Code 0 __scatter.o(!!!scatter) + __decompress 0x080002d5 Thumb Code 90 __dczerorl2.o(!!dczerorl2) + __decompress1 0x080002d5 Thumb Code 0 __dczerorl2.o(!!dczerorl2) + __scatterload_zeroinit 0x08000331 Thumb Code 28 __scatter_zi.o(!!handler_zi) + __rt_lib_init 0x0800034d Thumb Code 0 libinit.o(.ARM.Collect$$libinit$$00000000) + __rt_lib_init_fp_1 0x0800034f Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000001) + __rt_lib_init_alloca_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + __rt_lib_init_argv_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) + __rt_lib_init_atexit_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + __rt_lib_init_clock_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + __rt_lib_init_cpp_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + __rt_lib_init_exceptions_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + __rt_lib_init_fp_trap_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + __rt_lib_init_getenv_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + __rt_lib_init_heap_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) + __rt_lib_init_lc_collate_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000011) + __rt_lib_init_lc_ctype_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + __rt_lib_init_lc_monetary_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + __rt_lib_init_lc_numeric_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + __rt_lib_init_lc_time_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + __rt_lib_init_preinit_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + __rt_lib_init_rand_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + __rt_lib_init_return 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000033) + __rt_lib_init_signal_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + __rt_lib_init_stdio_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + __rt_lib_init_user_alloc_1 0x08000353 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + __rt_lib_shutdown 0x08000355 Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + __rt_lib_shutdown_cpp_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + __rt_lib_shutdown_fini_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + __rt_lib_shutdown_fp_trap_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000009) + __rt_lib_shutdown_heap_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000011) + __rt_lib_shutdown_return 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000012) + __rt_lib_shutdown_signal_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + __rt_lib_shutdown_stdio_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000006) + __rt_lib_shutdown_user_alloc_1 0x08000357 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000E) + __rt_entry 0x08000359 Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + __rt_entry_presh_1 0x08000359 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + __rt_entry_sh 0x08000359 Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + __rt_entry_li 0x0800035f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + __rt_entry_postsh_1 0x0800035f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) + __rt_entry_main 0x08000363 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) + __rt_entry_postli_1 0x08000363 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) + __rt_exit 0x0800036b Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000) + __rt_exit_ls 0x0800036d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003) + __rt_exit_prels_1 0x0800036d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) + __rt_exit_exit 0x08000371 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004) + SVC_Handler 0x08000379 Thumb Code 28 port.o(.emb_text) + __asm___6_port_c_39a90d8d__prvStartFirstTask 0x08000399 Thumb Code 36 port.o(.emb_text) + __asm___6_port_c_39a90d8d__prvEnableVFP 0x080003c1 Thumb Code 16 port.o(.emb_text) + PendSV_Handler 0x080003d5 Thumb Code 88 port.o(.emb_text) + vPortGetIPSR 0x08000431 Thumb Code 6 port.o(.emb_text) + Reset_Handler 0x08000439 Thumb Code 8 startup_stm32h750xx.o(.text) + ADC3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + ADC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel6_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + BDMA_Channel7_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + CEC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + COMP1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + CRS_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + CRYP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DCMI_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DFSDM1_FLT0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DFSDM1_FLT1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DFSDM1_FLT2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DFSDM1_FLT3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream6_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA1_Stream7_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2D_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream6_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMA2_Stream7_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + DMAMUX1_OVR_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + ECC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + ETH_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + ETH_WKUP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI15_10_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + EXTI9_5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FDCAN1_IT0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FDCAN1_IT1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FDCAN2_IT0_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FDCAN2_IT1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FDCAN_CAL_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FLASH_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FMC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + FPU_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HASH_RNG_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_FLT_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_Master_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_TIMA_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_TIMB_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_TIMC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_TIMD_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HRTIM1_TIME_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + HSEM1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C1_ER_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C1_EV_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C2_ER_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C2_EV_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C3_ER_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C3_EV_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C4_ER_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + I2C4_EV_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + JPEG_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPTIM1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPTIM2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPTIM3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPTIM4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPTIM5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LPUART1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LTDC_ER_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + LTDC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + MDIOS_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + MDIOS_WKUP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + MDMA_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_FS_EP1_IN_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_FS_EP1_OUT_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_FS_WKUP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_HS_EP1_IN_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_HS_EP1_OUT_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_HS_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + OTG_HS_WKUP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + PVD_AVD_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + QUADSPI_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + RCC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + RTC_Alarm_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + RTC_WKUP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SAI1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SAI2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SAI3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SAI4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SDMMC1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SDMMC2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPDIF_RX_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SPI6_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + SWPMI1_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TAMP_STAMP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM15_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM16_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM17_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM1_BRK_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM1_CC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM1_TRG_COM_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM1_UP_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM6_DAC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM8_BRK_TIM12_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM8_CC_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM8_TRG_COM_TIM14_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + TIM8_UP_TIM13_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + UART4_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + UART5_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + UART7_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + UART8_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + USART2_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + USART3_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + USART6_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + WAKEUP_PIN_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + WWDG_IRQHandler 0x08000453 Thumb Code 0 startup_stm32h750xx.o(.text) + __user_initial_stackheap 0x08000455 Thumb Code 0 startup_stm32h750xx.o(.text) + __aeabi_uldivmod 0x08000479 Thumb Code 0 lludivv7m.o(.text) + _ll_udiv 0x08000479 Thumb Code 238 lludivv7m.o(.text) + __aeabi_memcpy 0x08000567 Thumb Code 0 rt_memcpy_v6.o(.text) + __rt_memcpy 0x08000567 Thumb Code 138 rt_memcpy_v6.o(.text) + _memcpy_lastbytes 0x080005cd Thumb Code 0 rt_memcpy_v6.o(.text) + __aeabi_memcpy4 0x080005f1 Thumb Code 0 rt_memcpy_w.o(.text) + __aeabi_memcpy8 0x080005f1 Thumb Code 0 rt_memcpy_w.o(.text) + __rt_memcpy_w 0x080005f1 Thumb Code 100 rt_memcpy_w.o(.text) + _memcpy_lastbytes_aligned 0x08000639 Thumb Code 0 rt_memcpy_w.o(.text) + __aeabi_memset 0x08000655 Thumb Code 16 aeabi_memset.o(.text) + __aeabi_memclr 0x08000665 Thumb Code 0 rt_memclr.o(.text) + __rt_memclr 0x08000665 Thumb Code 68 rt_memclr.o(.text) + _memset 0x08000669 Thumb Code 0 rt_memclr.o(.text) + __aeabi_memclr4 0x080006a9 Thumb Code 0 rt_memclr_w.o(.text) + __aeabi_memclr8 0x080006a9 Thumb Code 0 rt_memclr_w.o(.text) + __rt_memclr_w 0x080006a9 Thumb Code 78 rt_memclr_w.o(.text) + _memset_w 0x080006ad Thumb Code 0 rt_memclr_w.o(.text) + __use_two_region_memory 0x080006f7 Thumb Code 2 heapauxi.o(.text) + __rt_heap_escrow$2region 0x080006f9 Thumb Code 2 heapauxi.o(.text) + __rt_heap_expand$2region 0x080006fb Thumb Code 2 heapauxi.o(.text) + __read_errno 0x080006fd Thumb Code 10 _rserrno.o(.text) + __set_errno 0x08000707 Thumb Code 12 _rserrno.o(.text) + __aeabi_errno_addr 0x08000715 Thumb Code 8 rt_errno_addr_intlibspace.o(.text) + __errno$intlibspace 0x08000715 Thumb Code 0 rt_errno_addr_intlibspace.o(.text) + __rt_errno_addr$intlibspace 0x08000715 Thumb Code 0 rt_errno_addr_intlibspace.o(.text) + __user_libspace 0x0800071d Thumb Code 8 libspace.o(.text) + __user_perproc_libspace 0x0800071d Thumb Code 0 libspace.o(.text) + __user_perthread_libspace 0x0800071d Thumb Code 0 libspace.o(.text) + __user_setup_stackheap 0x08000725 Thumb Code 74 sys_stackheap_outer.o(.text) + exit 0x0800076f Thumb Code 18 exit.o(.text) + _sys_exit 0x08000781 Thumb Code 8 sys_exit.o(.text) + __I$use$semihosting 0x0800078d Thumb Code 0 use_no_semi.o(.text) + __use_no_semihosting_swi 0x0800078d Thumb Code 2 use_no_semi.o(.text) + __semihosting_library_function 0x0800078f Thumb Code 0 indicate_semi.o(.text) + ADC_ConfigureBoostMode 0x08000791 Thumb Code 268 stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode) + ADC_ConversionStop 0x080008b9 Thumb Code 236 stm32h7xx_hal_adc.o(i.ADC_ConversionStop) + ADC_DMAConvCplt 0x080009ad Thumb Code 126 stm32h7xx_hal_adc.o(i.ADC_DMAConvCplt) + ADC_DMAError 0x08000a2b Thumb Code 26 stm32h7xx_hal_adc.o(i.ADC_DMAError) + ADC_DMAHalfConvCplt 0x08000a45 Thumb Code 10 stm32h7xx_hal_adc.o(i.ADC_DMAHalfConvCplt) + ADC_Disable 0x08000a51 Thumb Code 128 stm32h7xx_hal_adc.o(i.ADC_Disable) + ADC_Enable 0x08000ad5 Thumb Code 170 stm32h7xx_hal_adc.o(i.ADC_Enable) + BDMA_Channel0_IRQHandler 0x08000b95 Thumb Code 6 stm32h7xx_it.o(i.BDMA_Channel0_IRQHandler) + BusFault_Handler 0x08000ba1 Thumb Code 2 stm32h7xx_it.o(i.BusFault_Handler) + CLKHZSET 0x08000ba5 Thumb Code 250 main.o(i.CLKHZSET) + ChannelSelect 0x08000cb5 Thumb Code 284 main.o(i.ChannelSelect) + Clk_Set 0x08000dd5 Thumb Code 222 main.o(i.Clk_Set) + Command_AddReadIndex 0x08000ebd Thumb Code 22 communicaion.o(i.Command_AddReadIndex) + Command_Deal 0x08000ed9 Thumb Code 930 communicaion.o(i.Command_Deal) + Command_GetCommand 0x080012b5 Thumb Code 188 communicaion.o(i.Command_GetCommand) + Command_GetLength 0x08001375 Thumb Code 24 communicaion.o(i.Command_GetLength) + Command_GetRemain 0x08001391 Thumb Code 14 communicaion.o(i.Command_GetRemain) + Command_Read 0x080013a1 Thumb Code 16 communicaion.o(i.Command_Read) + Command_Write 0x080013b5 Thumb Code 88 communicaion.o(i.Command_Write) + CommunicationResponse 0x08001415 Thumb Code 1206 main.o(i.CommunicationResponse) + DMA1_Stream5_IRQHandler 0x080018dd Thumb Code 6 stm32h7xx_it.o(i.DMA1_Stream5_IRQHandler) + DMAMUX2_OVR_IRQHandler 0x080018e9 Thumb Code 6 stm32h7xx_it.o(i.DMAMUX2_OVR_IRQHandler) + DebugMon_Handler 0x08001d85 Thumb Code 2 stm32h7xx_it.o(i.DebugMon_Handler) + Error_Handler 0x08001d87 Thumb Code 4 main.o(i.Error_Handler) + FindMaxValue 0x08001d8d Thumb Code 54 main.o(i.FindMaxValue) + FramePack 0x08001dc9 Thumb Code 108 communicaion.o(i.FramePack) + HAL_ADCEx_Calibration_Start 0x08001e35 Thumb Code 156 stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_Calibration_Start) + HAL_ADC_ConfigChannel 0x08001ed9 Thumb Code 1148 stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel) + HAL_ADC_ConvCpltCallback 0x08002359 Thumb Code 384 main.o(i.HAL_ADC_ConvCpltCallback) + HAL_ADC_ConvHalfCpltCallback 0x080024f9 Thumb Code 332 main.o(i.HAL_ADC_ConvHalfCpltCallback) + HAL_ADC_ErrorCallback 0x08002669 Thumb Code 2 stm32h7xx_hal_adc.o(i.HAL_ADC_ErrorCallback) + HAL_ADC_Init 0x0800266d Thumb Code 510 stm32h7xx_hal_adc.o(i.HAL_ADC_Init) + HAL_ADC_MspInit 0x08002899 Thumb Code 306 stm32h7xx_hal_msp.o(i.HAL_ADC_MspInit) + HAL_ADC_Start_DMA 0x080029e9 Thumb Code 234 stm32h7xx_hal_adc.o(i.HAL_ADC_Start_DMA) + HAL_ADC_Stop_DMA 0x08002af5 Thumb Code 126 stm32h7xx_hal_adc.o(i.HAL_ADC_Stop_DMA) + HAL_DMAEx_ConfigMuxSync 0x08002b75 Thumb Code 226 stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_ConfigMuxSync) + HAL_DMAEx_MUX_IRQHandler 0x08002c61 Thumb Code 100 stm32h7xx_hal_dma_ex.o(i.HAL_DMAEx_MUX_IRQHandler) + HAL_DMA_Abort 0x08002cc5 Thumb Code 880 stm32h7xx_hal_dma.o(i.HAL_DMA_Abort) + HAL_DMA_Abort_IT 0x08003041 Thumb Code 674 stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT) + HAL_DMA_IRQHandler 0x080032f1 Thumb Code 1948 stm32h7xx_hal_dma.o(i.HAL_DMA_IRQHandler) + HAL_DMA_Init 0x08003a99 Thumb Code 994 stm32h7xx_hal_dma.o(i.HAL_DMA_Init) + HAL_DMA_Start 0x08003e95 Thumb Code 406 stm32h7xx_hal_dma.o(i.HAL_DMA_Start) + HAL_DMA_Start_IT 0x08004035 Thumb Code 734 stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT) + HAL_GPIO_Init 0x08004321 Thumb Code 498 stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init) + HAL_GPIO_WritePin 0x08004545 Thumb Code 14 stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin) + HAL_GetREVID 0x08004555 Thumb Code 8 stm32h7xx_hal.o(i.HAL_GetREVID) + HAL_GetTick 0x08004561 Thumb Code 6 stm32h7xx_hal.o(i.HAL_GetTick) + HAL_IncTick 0x0800456d Thumb Code 12 stm32h7xx_hal.o(i.HAL_IncTick) + HAL_Init 0x0800457d Thumb Code 74 stm32h7xx_hal.o(i.HAL_Init) + HAL_InitTick 0x080045d9 Thumb Code 124 stm32h7xx_hal_timebase_tim.o(i.HAL_InitTick) + HAL_MspInit 0x08004669 Thumb Code 32 stm32h7xx_hal_msp.o(i.HAL_MspInit) + HAL_NVIC_EnableIRQ 0x0800468d Thumb Code 26 stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ) + HAL_NVIC_SetPriority 0x080046a9 Thumb Code 60 stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority) + HAL_NVIC_SetPriorityGrouping 0x080046e9 Thumb Code 26 stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping) + HAL_PCDEx_LPM_Callback 0x0800470d Thumb Code 2 stm32h7xx_hal_pcd_ex.o(i.HAL_PCDEx_LPM_Callback) + HAL_PCD_ConnectCallback 0x0800470f Thumb Code 8 usbd_conf.o(i.HAL_PCD_ConnectCallback) + HAL_PCD_DataInStageCallback 0x08004717 Thumb Code 18 usbd_conf.o(i.HAL_PCD_DataInStageCallback) + HAL_PCD_DataOutStageCallback 0x08004729 Thumb Code 20 usbd_conf.o(i.HAL_PCD_DataOutStageCallback) + HAL_PCD_DisconnectCallback 0x0800473d Thumb Code 8 usbd_conf.o(i.HAL_PCD_DisconnectCallback) + HAL_PCD_EP_Abort 0x08004745 Thumb Code 30 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Abort) + HAL_PCD_EP_ClrStall 0x08004763 Thumb Code 88 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_ClrStall) + HAL_PCD_EP_Open 0x080047bb Thumb Code 96 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Open) + HAL_PCD_EP_Receive 0x0800481b Thumb Code 50 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Receive) + HAL_PCD_EP_SetStall 0x0800484d Thumb Code 112 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_SetStall) + HAL_PCD_EP_Transmit 0x080048bd Thumb Code 50 stm32h7xx_hal_pcd.o(i.HAL_PCD_EP_Transmit) + HAL_PCD_IRQHandler 0x080048ef Thumb Code 1346 stm32h7xx_hal_pcd.o(i.HAL_PCD_IRQHandler) + HAL_PCD_ISOINIncompleteCallback 0x08004e31 Thumb Code 8 usbd_conf.o(i.HAL_PCD_ISOINIncompleteCallback) + HAL_PCD_ISOOUTIncompleteCallback 0x08004e39 Thumb Code 8 usbd_conf.o(i.HAL_PCD_ISOOUTIncompleteCallback) + HAL_PCD_ResetCallback 0x08004e41 Thumb Code 46 usbd_conf.o(i.HAL_PCD_ResetCallback) + HAL_PCD_ResumeCallback 0x08004e6f Thumb Code 8 usbd_conf.o(i.HAL_PCD_ResumeCallback) + HAL_PCD_SOFCallback 0x08004e77 Thumb Code 8 usbd_conf.o(i.HAL_PCD_SOFCallback) + HAL_PCD_SetAddress 0x08004e7f Thumb Code 38 stm32h7xx_hal_pcd.o(i.HAL_PCD_SetAddress) + HAL_PCD_SetupStageCallback 0x08004ea5 Thumb Code 14 usbd_conf.o(i.HAL_PCD_SetupStageCallback) + HAL_PCD_SuspendCallback 0x08004eb5 Thumb Code 44 usbd_conf.o(i.HAL_PCD_SuspendCallback) + HAL_PWREx_ConfigSupply 0x08004ee5 Thumb Code 82 stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply) + HAL_RCCEx_GetD3PCLK1Freq 0x08004f3d Thumb Code 26 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq) + HAL_RCCEx_GetPLL1ClockFreq 0x08004f61 Thumb Code 424 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL1ClockFreq) + HAL_RCCEx_GetPLL2ClockFreq 0x08005121 Thumb Code 424 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq) + HAL_RCCEx_GetPLL3ClockFreq 0x080052e1 Thumb Code 424 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq) + HAL_RCCEx_GetPeriphCLKFreq 0x080054a1 Thumb Code 1518 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq) + HAL_RCCEx_PeriphCLKConfig 0x08005a91 Thumb Code 2558 stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig) + HAL_RCC_ClockConfig 0x08006495 Thumb Code 604 stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig) + HAL_RCC_GetClockConfig 0x08006711 Thumb Code 86 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetClockConfig) + HAL_RCC_GetHCLKFreq 0x08006771 Thumb Code 52 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq) + HAL_RCC_GetPCLK1Freq 0x080067b5 Thumb Code 26 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq) + HAL_RCC_GetPCLK2Freq 0x080067d9 Thumb Code 26 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq) + HAL_RCC_GetSysClockFreq 0x080067fd Thumb Code 402 stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq) + HAL_RCC_OscConfig 0x080069b1 Thumb Code 1664 stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig) + HAL_SYSCFG_AnalogSwitchConfig 0x08007035 Thumb Code 12 stm32h7xx_hal.o(i.HAL_SYSCFG_AnalogSwitchConfig) + HAL_TIMEx_Break2Callback 0x08007045 Thumb Code 2 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_Break2Callback) + HAL_TIMEx_BreakCallback 0x08007047 Thumb Code 2 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback) + HAL_TIMEx_CommutCallback 0x08007049 Thumb Code 2 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback) + HAL_TIMEx_ConfigBreakDeadTime 0x0800704d Thumb Code 132 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakDeadTime) + HAL_TIMEx_MasterConfigSynchronization 0x080070d9 Thumb Code 132 stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization) + HAL_TIM_Base_Init 0x08007179 Thumb Code 78 stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Init) + HAL_TIM_Base_MspInit 0x080071c9 Thumb Code 82 stm32h7xx_hal_msp.o(i.HAL_TIM_Base_MspInit) + HAL_TIM_Base_Start_IT 0x08007229 Thumb Code 116 stm32h7xx_hal_tim.o(i.HAL_TIM_Base_Start_IT) + HAL_TIM_ConfigClockSource 0x080072bd Thumb Code 260 stm32h7xx_hal_tim.o(i.HAL_TIM_ConfigClockSource) + HAL_TIM_IC_CaptureCallback 0x080073c5 Thumb Code 2 stm32h7xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback) + HAL_TIM_IRQHandler 0x080073c7 Thumb Code 338 stm32h7xx_hal_tim.o(i.HAL_TIM_IRQHandler) + HAL_TIM_MspPostInit 0x08007519 Thumb Code 72 stm32h7xx_hal_msp.o(i.HAL_TIM_MspPostInit) + HAL_TIM_OC_DelayElapsedCallback 0x08007569 Thumb Code 2 stm32h7xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback) + HAL_TIM_PWM_ConfigChannel 0x0800756b Thumb Code 310 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel) + HAL_TIM_PWM_Init 0x080076a1 Thumb Code 78 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init) + HAL_TIM_PWM_MspInit 0x080076ef Thumb Code 2 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_MspInit) + HAL_TIM_PWM_PulseFinishedCallback 0x080076f1 Thumb Code 2 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback) + HAL_TIM_PWM_Start 0x080076f5 Thumb Code 254 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Start) + HAL_TIM_PWM_Stop 0x0800781d Thumb Code 154 stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Stop) + HAL_TIM_PeriodElapsedCallback 0x080078cd Thumb Code 14 main.o(i.HAL_TIM_PeriodElapsedCallback) + HAL_TIM_TriggerCallback 0x080078e1 Thumb Code 2 stm32h7xx_hal_tim.o(i.HAL_TIM_TriggerCallback) + HAL_UARTEx_DisableFifoMode 0x080078e3 Thumb Code 62 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableFifoMode) + HAL_UARTEx_ReceiveToIdle_DMA 0x08007921 Thumb Code 82 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_ReceiveToIdle_DMA) + HAL_UARTEx_RxEventCallback 0x08007975 Thumb Code 26 main.o(i.HAL_UARTEx_RxEventCallback) + HAL_UARTEx_RxFifoFullCallback 0x08007999 Thumb Code 2 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_RxFifoFullCallback) + HAL_UARTEx_SetRxFifoThreshold 0x0800799b Thumb Code 76 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold) + HAL_UARTEx_SetTxFifoThreshold 0x080079e7 Thumb Code 76 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold) + HAL_UARTEx_TxFifoEmptyCallback 0x08007a33 Thumb Code 2 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_TxFifoEmptyCallback) + HAL_UARTEx_WakeupCallback 0x08007a35 Thumb Code 2 stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_WakeupCallback) + HAL_UART_ErrorCallback 0x08007a37 Thumb Code 2 stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback) + HAL_UART_GetState 0x08007a39 Thumb Code 12 stm32h7xx_hal_uart.o(i.HAL_UART_GetState) + HAL_UART_IRQHandler 0x08007a45 Thumb Code 920 stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler) + HAL_UART_Init 0x08007df1 Thumb Code 112 stm32h7xx_hal_uart.o(i.HAL_UART_Init) + HAL_UART_MspInit 0x08007e61 Thumb Code 186 stm32h7xx_hal_msp.o(i.HAL_UART_MspInit) + HAL_UART_RxCpltCallback 0x08007f31 Thumb Code 2 stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback) + HAL_UART_RxHalfCpltCallback 0x08007f33 Thumb Code 2 stm32h7xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback) + HAL_UART_Transmit 0x08007f35 Thumb Code 184 stm32h7xx_hal_uart.o(i.HAL_UART_Transmit) + HAL_UART_TxCpltCallback 0x08007fed Thumb Code 2 stm32h7xx_hal_uart.o(i.HAL_UART_TxCpltCallback) + HardFault_Handler 0x08007fef Thumb Code 2 stm32h7xx_it.o(i.HardFault_Handler) + LineCheck 0x08008019 Thumb Code 1226 main.o(i.LineCheck) + MemManage_Handler 0x08008aed Thumb Code 2 stm32h7xx_it.o(i.MemManage_Handler) + NMI_Handler 0x08008aef Thumb Code 2 stm32h7xx_it.o(i.NMI_Handler) + OTG_FS_IRQHandler 0x08008af1 Thumb Code 6 stm32h7xx_it.o(i.OTG_FS_IRQHandler) + SampleRate_Set 0x08008f19 Thumb Code 162 main.o(i.SampleRate_Set) + SlopeSet 0x08008fc9 Thumb Code 430 main.o(i.SlopeSet) + StartDefaultTask 0x08009181 Thumb Code 414 main.o(i.StartDefaultTask) + SysTick_Handler 0x08009359 Thumb Code 26 cmsis_os2.o(i.SysTick_Handler) + SystemClock_Config 0x08009375 Thumb Code 158 main.o(i.SystemClock_Config) + SystemInit 0x0800941d Thumb Code 178 system_stm32h7xx.o(i.SystemInit) + TIM7_IRQHandler 0x080094f9 Thumb Code 6 stm32h7xx_it.o(i.TIM7_IRQHandler) + TIM_Base_SetConfig 0x08009505 Thumb Code 168 stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig) + TIM_CCxChannelCmd 0x080095cd Thumb Code 26 stm32h7xx_hal_tim.o(i.TIM_CCxChannelCmd) + TIM_ETR_SetConfig 0x080095e7 Thumb Code 20 stm32h7xx_hal_tim.o(i.TIM_ETR_SetConfig) + TIM_OC2_SetConfig 0x080096b1 Thumb Code 124 stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig) + UART_AdvFeatureConfig 0x080099bd Thumb Code 200 stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig) + UART_CheckIdleState 0x08009a85 Thumb Code 170 stm32h7xx_hal_uart.o(i.UART_CheckIdleState) + UART_SetConfig 0x08009cdd Thumb Code 1168 stm32h7xx_hal_uart.o(i.UART_SetConfig) + UART_Start_Receive_DMA 0x0800a16d Thumb Code 152 stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA) + UART_WaitOnFlagUntilTimeout 0x0800a211 Thumb Code 152 stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout) + USART1_IRQHandler 0x0800a2a9 Thumb Code 22 stm32h7xx_it.o(i.USART1_IRQHandler) + USBD_ClrClassConfig 0x0800a2c9 Thumb Code 20 usbd_core.o(i.USBD_ClrClassConfig) + USBD_CoreFindEP 0x0800a303 Thumb Code 4 usbd_core.o(i.USBD_CoreFindEP) + USBD_CoreFindIF 0x0800a307 Thumb Code 4 usbd_core.o(i.USBD_CoreFindIF) + USBD_CtlContinueRx 0x0800a30b Thumb Code 16 usbd_ioreq.o(i.USBD_CtlContinueRx) + USBD_CtlContinueSendData 0x0800a31b Thumb Code 16 usbd_ioreq.o(i.USBD_CtlContinueSendData) + USBD_CtlError 0x0800a32b Thumb Code 24 usbd_ctlreq.o(i.USBD_CtlError) + USBD_CtlReceiveStatus 0x0800a343 Thumb Code 22 usbd_ioreq.o(i.USBD_CtlReceiveStatus) + USBD_CtlSendData 0x0800a359 Thumb Code 26 usbd_ioreq.o(i.USBD_CtlSendData) + USBD_CtlSendStatus 0x0800a373 Thumb Code 22 usbd_ioreq.o(i.USBD_CtlSendStatus) + USBD_Get_USB_Status 0x0800a5e3 Thumb Code 36 usbd_conf.o(i.USBD_Get_USB_Status) + USBD_LL_ClearStallEP 0x0800a607 Thumb Code 18 usbd_conf.o(i.USBD_LL_ClearStallEP) + USBD_LL_DataInStage 0x0800a619 Thumb Code 220 usbd_core.o(i.USBD_LL_DataInStage) + USBD_LL_DataOutStage 0x0800a6f5 Thumb Code 202 usbd_core.o(i.USBD_LL_DataOutStage) + USBD_LL_DevConnected 0x0800a7bf Thumb Code 4 usbd_core.o(i.USBD_LL_DevConnected) + USBD_LL_DevDisconnected 0x0800a7c3 Thumb Code 32 usbd_core.o(i.USBD_LL_DevDisconnected) + USBD_LL_IsStallEP 0x0800a7e3 Thumb Code 30 usbd_conf.o(i.USBD_LL_IsStallEP) + USBD_LL_IsoINIncomplete 0x0800a801 Thumb Code 42 usbd_core.o(i.USBD_LL_IsoINIncomplete) + USBD_LL_IsoOUTIncomplete 0x0800a82b Thumb Code 42 usbd_core.o(i.USBD_LL_IsoOUTIncomplete) + USBD_LL_OpenEP 0x0800a855 Thumb Code 24 usbd_conf.o(i.USBD_LL_OpenEP) + USBD_LL_PrepareReceive 0x0800a86d Thumb Code 18 usbd_conf.o(i.USBD_LL_PrepareReceive) + USBD_LL_Reset 0x0800a87f Thumb Code 96 usbd_core.o(i.USBD_LL_Reset) + USBD_LL_Resume 0x0800a8df Thumb Code 20 usbd_core.o(i.USBD_LL_Resume) + USBD_LL_SOF 0x0800a8f3 Thumb Code 26 usbd_core.o(i.USBD_LL_SOF) + USBD_LL_SetSpeed 0x0800a90d Thumb Code 6 usbd_core.o(i.USBD_LL_SetSpeed) + USBD_LL_SetUSBAddress 0x0800a913 Thumb Code 18 usbd_conf.o(i.USBD_LL_SetUSBAddress) + USBD_LL_SetupStage 0x0800a925 Thumb Code 96 usbd_core.o(i.USBD_LL_SetupStage) + USBD_LL_StallEP 0x0800a985 Thumb Code 18 usbd_conf.o(i.USBD_LL_StallEP) + USBD_LL_Suspend 0x0800a997 Thumb Code 26 usbd_core.o(i.USBD_LL_Suspend) + USBD_LL_Transmit 0x0800a9b1 Thumb Code 18 usbd_conf.o(i.USBD_LL_Transmit) + USBD_ParseSetupRequest 0x0800a9c3 Thumb Code 50 usbd_ctlreq.o(i.USBD_ParseSetupRequest) + USBD_RunTestMode 0x0800a9f5 Thumb Code 4 usbd_core.o(i.USBD_RunTestMode) + USBD_SetClassConfig 0x0800aa51 Thumb Code 20 usbd_core.o(i.USBD_SetClassConfig) + USBD_StdDevReq 0x0800ab65 Thumb Code 118 usbd_ctlreq.o(i.USBD_StdDevReq) + USBD_StdEPReq 0x0800abdb Thumb Code 544 usbd_ctlreq.o(i.USBD_StdEPReq) + USBD_StdItfReq 0x0800adfb Thumb Code 142 usbd_ctlreq.o(i.USBD_StdItfReq) + USB_ActivateEndpoint 0x0800ae89 Thumb Code 126 stm32h7xx_ll_usb.o(i.USB_ActivateEndpoint) + USB_ActivateSetup 0x0800af0d Thumb Code 28 stm32h7xx_ll_usb.o(i.USB_ActivateSetup) + USB_EP0_OutStart 0x0800af29 Thumb Code 80 stm32h7xx_ll_usb.o(i.USB_EP0_OutStart) + USB_EPClearStall 0x0800af7d Thumb Code 88 stm32h7xx_ll_usb.o(i.USB_EPClearStall) + USB_EPSetStall 0x0800afd5 Thumb Code 88 stm32h7xx_ll_usb.o(i.USB_EPSetStall) + USB_EPStartXfer 0x0800b02d Thumb Code 592 stm32h7xx_ll_usb.o(i.USB_EPStartXfer) + USB_EPStopXfer 0x0800b281 Thumb Code 164 stm32h7xx_ll_usb.o(i.USB_EPStopXfer) + USB_FlushTxFifo 0x0800b325 Thumb Code 68 stm32h7xx_ll_usb.o(i.USB_FlushTxFifo) + USB_GetDevSpeed 0x0800b369 Thumb Code 32 stm32h7xx_ll_usb.o(i.USB_GetDevSpeed) + USB_GetMode 0x0800b389 Thumb Code 8 stm32h7xx_ll_usb.o(i.USB_GetMode) + USB_ReadDevAllInEpInterrupt 0x0800b391 Thumb Code 14 stm32h7xx_ll_usb.o(i.USB_ReadDevAllInEpInterrupt) + USB_ReadDevAllOutEpInterrupt 0x0800b39f Thumb Code 14 stm32h7xx_ll_usb.o(i.USB_ReadDevAllOutEpInterrupt) + USB_ReadDevInEPInterrupt 0x0800b3ad Thumb Code 36 stm32h7xx_ll_usb.o(i.USB_ReadDevInEPInterrupt) + USB_ReadDevOutEPInterrupt 0x0800b3d1 Thumb Code 16 stm32h7xx_ll_usb.o(i.USB_ReadDevOutEPInterrupt) + USB_ReadInterrupts 0x0800b3e1 Thumb Code 8 stm32h7xx_ll_usb.o(i.USB_ReadInterrupts) + USB_ReadPacket 0x0800b3e9 Thumb Code 62 stm32h7xx_ll_usb.o(i.USB_ReadPacket) + USB_SetDevAddress 0x0800b427 Thumb Code 30 stm32h7xx_ll_usb.o(i.USB_SetDevAddress) + USB_SetTurnaroundTime 0x0800b445 Thumb Code 170 stm32h7xx_ll_usb.o(i.USB_SetTurnaroundTime) + USB_WritePacket 0x0800b539 Thumb Code 40 stm32h7xx_ll_usb.o(i.USB_WritePacket) + UsageFault_Handler 0x0800b561 Thumb Code 2 stm32h7xx_it.o(i.UsageFault_Handler) + __ARM_fpclassify 0x0800b563 Thumb Code 48 fpclassify.o(i.__ARM_fpclassify) + __hardfp_pow 0x0800b5b9 Thumb Code 2140 pow.o(i.__hardfp_pow) + __kernel_poly 0x0800beb1 Thumb Code 112 poly.o(i.__kernel_poly) + __mathlib_dbl_divzero 0x0800bf21 Thumb Code 14 dunder.o(i.__mathlib_dbl_divzero) + __mathlib_dbl_infnan2 0x0800bf41 Thumb Code 6 dunder.o(i.__mathlib_dbl_infnan2) + __mathlib_dbl_invalid 0x0800bf49 Thumb Code 10 dunder.o(i.__mathlib_dbl_invalid) + __mathlib_dbl_overflow 0x0800bf61 Thumb Code 10 dunder.o(i.__mathlib_dbl_overflow) + __mathlib_dbl_underflow 0x0800bf79 Thumb Code 10 dunder.o(i.__mathlib_dbl_underflow) + calculateAverage 0x0800bf91 Thumb Code 72 main.o(i.calculateAverage) + fabs 0x0800bff9 Thumb Code 24 fabs.o(i.fabs) + main 0x0800c011 Thumb Code 74 main.o(i.main) + osDelay 0x0800c06d Thumb Code 28 cmsis_os2.o(i.osDelay) + osKernelInitialize 0x0800c089 Thumb Code 34 cmsis_os2.o(i.osKernelInitialize) + osKernelStart 0x0800c0b1 Thumb Code 48 cmsis_os2.o(i.osKernelStart) + osSemaphoreAcquire 0x0800c0e9 Thumb Code 94 cmsis_os2.o(i.osSemaphoreAcquire) + osSemaphoreNew 0x0800c14d Thumb Code 178 cmsis_os2.o(i.osSemaphoreNew) + osSemaphoreRelease 0x0800c201 Thumb Code 82 cmsis_os2.o(i.osSemaphoreRelease) + osThreadNew 0x0800c259 Thumb Code 188 cmsis_os2.o(i.osThreadNew) + pvPortMalloc 0x0800cb41 Thumb Code 214 heap_4.o(i.pvPortMalloc) + pvTaskIncrementMutexHeldCount 0x0800cc1d Thumb Code 20 tasks.o(i.pvTaskIncrementMutexHeldCount) + pxPortInitialiseStack 0x0800cc35 Thumb Code 30 port.o(i.pxPortInitialiseStack) + sqrt 0x0800cc59 Thumb Code 106 sqrt.o(i.sqrt) + uxListRemove 0x0800ccc3 Thumb Code 38 list.o(i.uxListRemove) + vApplicationGetIdleTaskMemory 0x0800cce9 Thumb Code 18 cmsis_os2.o(i.vApplicationGetIdleTaskMemory) + vApplicationGetTimerTaskMemory 0x0800cd01 Thumb Code 18 cmsis_os2.o(i.vApplicationGetTimerTaskMemory) + vListInitialise 0x0800cd19 Thumb Code 22 list.o(i.vListInitialise) + vListInitialiseItem 0x0800cd2f Thumb Code 6 list.o(i.vListInitialiseItem) + vListInsert 0x0800cd35 Thumb Code 48 list.o(i.vListInsert) + vListInsertEnd 0x0800cd65 Thumb Code 24 list.o(i.vListInsertEnd) + vPortEnterCritical 0x0800cd7d Thumb Code 54 port.o(i.vPortEnterCritical) + vPortExitCritical 0x0800cdbd Thumb Code 38 port.o(i.vPortExitCritical) + vPortFree 0x0800cde9 Thumb Code 94 heap_4.o(i.vPortFree) + vPortSetupTimerInterrupt 0x0800ce4d Thumb Code 32 port.o(i.vPortSetupTimerInterrupt) + vPortValidateInterruptPriority 0x0800ce71 Thumb Code 74 port.o(i.vPortValidateInterruptPriority) + vQueueAddToRegistry 0x0800cec5 Thumb Code 32 queue.o(i.vQueueAddToRegistry) + vQueueDelete 0x0800cee9 Thumb Code 50 queue.o(i.vQueueDelete) + vQueueUnregisterQueue 0x0800cf1d Thumb Code 36 queue.o(i.vQueueUnregisterQueue) + vQueueWaitForMessageRestricted 0x0800cf45 Thumb Code 70 queue.o(i.vQueueWaitForMessageRestricted) + vTaskDelay 0x0800cf8d Thumb Code 70 tasks.o(i.vTaskDelay) + vTaskInternalSetTimeOutState 0x0800cfdd Thumb Code 12 tasks.o(i.vTaskInternalSetTimeOutState) + vTaskMissedYield 0x0800cfed Thumb Code 8 tasks.o(i.vTaskMissedYield) + vTaskPlaceOnEventList 0x0800cff9 Thumb Code 46 tasks.o(i.vTaskPlaceOnEventList) + vTaskPlaceOnEventListRestricted 0x0800d02d Thumb Code 54 tasks.o(i.vTaskPlaceOnEventListRestricted) + vTaskPriorityDisinheritAfterTimeout 0x0800d069 Thumb Code 138 tasks.o(i.vTaskPriorityDisinheritAfterTimeout) + vTaskStartScheduler 0x0800d0fd Thumb Code 126 tasks.o(i.vTaskStartScheduler) + vTaskSuspendAll 0x0800d18d Thumb Code 10 tasks.o(i.vTaskSuspendAll) + vTaskSwitchContext 0x0800d19d Thumb Code 94 tasks.o(i.vTaskSwitchContext) + xPortStartScheduler 0x0800d205 Thumb Code 222 port.o(i.xPortStartScheduler) + xPortSysTickHandler 0x0800d2f9 Thumb Code 38 port.o(i.xPortSysTickHandler) + xQueueCreateCountingSemaphore 0x0800d325 Thumb Code 60 queue.o(i.xQueueCreateCountingSemaphore) + xQueueCreateCountingSemaphoreStatic 0x0800d361 Thumb Code 66 queue.o(i.xQueueCreateCountingSemaphoreStatic) + xQueueGenericCreate 0x0800d3a3 Thumb Code 68 queue.o(i.xQueueGenericCreate) + xQueueGenericCreateStatic 0x0800d3e7 Thumb Code 108 queue.o(i.xQueueGenericCreateStatic) + xQueueGenericReset 0x0800d455 Thumb Code 134 queue.o(i.xQueueGenericReset) + xQueueGenericSend 0x0800d4e1 Thumb Code 352 queue.o(i.xQueueGenericSend) + xQueueGenericSendFromISR 0x0800d645 Thumb Code 192 queue.o(i.xQueueGenericSendFromISR) + xQueueGiveFromISR 0x0800d705 Thumb Code 158 queue.o(i.xQueueGiveFromISR) + xQueueReceive 0x0800d7a5 Thumb Code 310 queue.o(i.xQueueReceive) + xQueueReceiveFromISR 0x0800d8e1 Thumb Code 156 queue.o(i.xQueueReceiveFromISR) + xQueueSemaphoreTake 0x0800d97d Thumb Code 376 queue.o(i.xQueueSemaphoreTake) + xTaskCheckForTimeOut 0x0800daf9 Thumb Code 118 tasks.o(i.xTaskCheckForTimeOut) + xTaskCreate 0x0800db75 Thumb Code 100 tasks.o(i.xTaskCreate) + xTaskCreateStatic 0x0800dbd9 Thumb Code 92 tasks.o(i.xTaskCreateStatic) + xTaskGetSchedulerState 0x0800dc35 Thumb Code 24 tasks.o(i.xTaskGetSchedulerState) + xTaskGetTickCount 0x0800dc51 Thumb Code 6 tasks.o(i.xTaskGetTickCount) + xTaskIncrementTick 0x0800dc5d Thumb Code 196 tasks.o(i.xTaskIncrementTick) + xTaskPriorityDisinherit 0x0800dd29 Thumb Code 116 tasks.o(i.xTaskPriorityDisinherit) + xTaskPriorityInherit 0x0800dda5 Thumb Code 116 tasks.o(i.xTaskPriorityInherit) + xTaskRemoveFromEventList 0x0800de21 Thumb Code 106 tasks.o(i.xTaskRemoveFromEventList) + xTaskResumeAll 0x0800de99 Thumb Code 184 tasks.o(i.xTaskResumeAll) + xTimerCreateTimerTask 0x0800df61 Thumb Code 86 timers.o(i.xTimerCreateTimerTask) + xTimerGenericCommand 0x0800dfc9 Thumb Code 104 timers.o(i.xTimerGenericCommand) + __fpl_dcheck_NaN1 0x0800e035 Thumb Code 10 dcheck1.o(x$fpl$dcheck1) + _fp_init 0x0800e045 Thumb Code 10 fpinit.o(x$fpl$fpinit) + __fplib_config_fpu_vfp 0x0800e04d Thumb Code 0 fpinit.o(x$fpl$fpinit) + __fplib_config_pureend_doubles 0x0800e04d Thumb Code 0 fpinit.o(x$fpl$fpinit) + __fpl_return_NaN 0x0800e04f Thumb Code 100 retnan.o(x$fpl$retnan) + __ARM_scalbn 0x0800e0b3 Thumb Code 92 scalbn.o(x$fpl$scalbn) + __fpl_cmpreturn 0x0800e10f Thumb Code 48 trapv.o(x$fpl$trapveneer) + __I$use$fp 0x0800e13e Number 0 usenofp.o(x$fpl$usenofp) + defaultTask_attributes 0x0800e140 Data 36 main.o(.constdata) + CommunicationResponeTask_attributes 0x0800e164 Data 36 main.o(.constdata) + D1CorePrescTable 0x0800e6e4 Data 16 system_stm32h7xx.o(.constdata) + UARTPrescTable 0x0800e6fc Data 24 stm32h7xx_hal_uart.o(.constdata) + __mathlib_zero 0x0800e7b0 Data 8 qnan.o(.constdata) + Region$$Table$$Base 0x0800e7e0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0800e800 Number 0 anon$$obj.o(Region$$Table) + readIndex 0x24000000 Data 1 communicaion.o(.data) + writeIndex 0x24000001 Data 1 communicaion.o(.data) + dtime 0x24000002 Data 1 communicaion.o(.data) + commandLength 0x24000004 Data 4 communicaion.o(.data) + ADC3Finish 0x24000008 Data 1 main.o(.data) + StartFlag 0x24000009 Data 1 main.o(.data) + ReadFlag 0x2400000c Data 1 main.o(.data) + CLKCount 0x2400000d Data 1 main.o(.data) + defaultTaskHandle 0x24000010 Data 4 main.o(.data) + Command_Semaphore 0x24000014 Data 4 main.o(.data) + CommandResponse_Semaphore 0x24000018 Data 4 main.o(.data) + Datav 0x2400001c Data 4 main.o(.data) + CLKHZ 0x24000020 Data 196 main.o(.data) + SystemCoreClock 0x240000e4 Data 4 system_stm32h7xx.o(.data) + SystemD2Clock 0x240000e8 Data 4 system_stm32h7xx.o(.data) + uwTickFreq 0x240000ec Data 1 stm32h7xx_hal.o(.data) + uwTickPrio 0x240000f0 Data 4 stm32h7xx_hal.o(.data) + uwTick 0x240000f4 Data 4 stm32h7xx_hal.o(.data) + pxCurrentTCB 0x240000f8 Data 4 tasks.o(.data) + buffer 0x2400017c Data 121 communicaion.o(.bss) + CommunicationData 0x240001f8 Data 24 communicaion.o(.bss) + command 0x24000210 Data 50 communicaion.o(.bss) + SendBuf 0x24000242 Data 128 communicaion.o(.bss) + hadc3 0x240002c4 Data 100 main.o(.bss) + htim1 0x24000328 Data 76 main.o(.bss) + htim2 0x24000374 Data 76 main.o(.bss) + htim4 0x240003c0 Data 76 main.o(.bss) + huart1 0x2400040c Data 148 main.o(.bss) + hdma_usart1_rx 0x240004a0 Data 120 main.o(.bss) + hdma_memtomem_dma2_stream0 0x24000518 Data 120 main.o(.bss) + fft_inputbuf 0x24000590 Data 8192 main.o(.bss) + Uart_ReadCache 0x24002590 Data 128 main.o(.bss) + OutPut1 0x24002610 Data 12544 main.o(.bss) + OutPut2 0x24005710 Data 12544 main.o(.bss) + OutPut3 0x24008810 Data 12544 main.o(.bss) + OutPut4 0x2400b910 Data 12544 main.o(.bss) + LineCheckResult 0x2400ea10 Data 32 main.o(.bss) + LineCheckF 0x2400ea30 Data 128 main.o(.bss) + hdma_adc3 0x2400eab0 Data 120 main.o(.bss) + hpcd_USB_OTG_FS 0x2400ed48 Data 1252 usbd_conf.o(.bss) + htim7 0x2400f22c Data 76 stm32h7xx_hal_timebase_tim.o(.bss) + xQueueRegistry 0x2400f278 Data 64 queue.o(.bss) + __libspace_start 0x2401514c Data 96 libspace.o(.bss) + __temporary_stack_top$libspace 0x240151ac Data 0 libspace.o(.bss) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x08000299 + + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x0000e97c, Max: 0x00020000, ABSOLUTE, COMPRESSED[0x0000e8dc]) + + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x0000e800, Max: 0x00020000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x08000000 0x08000000 0x00000298 Data RO 3 RESET startup_stm32h750xx.o + 0x08000298 0x08000298 0x00000008 Code RO 8534 * !!!main c_w.l(__main.o) + 0x080002a0 0x080002a0 0x00000034 Code RO 8772 !!!scatter c_w.l(__scatter.o) + 0x080002d4 0x080002d4 0x0000005a Code RO 8770 !!dczerorl2 c_w.l(__dczerorl2.o) + 0x0800032e 0x0800032e 0x00000002 PAD + 0x08000330 0x08000330 0x0000001c Code RO 8774 !!handler_zi c_w.l(__scatter_zi.o) + 0x0800034c 0x0800034c 0x00000002 Code RO 8637 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o) + 0x0800034e 0x0800034e 0x00000004 Code RO 8648 .ARM.Collect$$libinit$$00000001 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8651 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8654 .ARM.Collect$$libinit$$0000000A c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8656 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8658 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8661 .ARM.Collect$$libinit$$00000011 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8663 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8665 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8667 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8669 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8671 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8673 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8675 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8677 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8679 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8681 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8685 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8687 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8689 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000000 Code RO 8691 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o) + 0x08000352 0x08000352 0x00000002 Code RO 8692 .ARM.Collect$$libinit$$00000033 c_w.l(libinit2.o) + 0x08000354 0x08000354 0x00000002 Code RO 8725 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o) + 0x08000356 0x08000356 0x00000000 Code RO 8751 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o) + 0x08000356 0x08000356 0x00000000 Code RO 8753 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o) + 0x08000356 0x08000356 0x00000000 Code RO 8755 .ARM.Collect$$libshutdown$$00000006 c_w.l(libshutdown2.o) + 0x08000356 0x08000356 0x00000000 Code RO 8758 .ARM.Collect$$libshutdown$$00000009 c_w.l(libshutdown2.o) + 0x08000356 0x08000356 0x00000000 Code RO 8761 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0x00000044 Code RO 8528 .text c_w.l(rt_memclr.o) + 0x080006a8 0x080006a8 0x0000004e Code RO 8530 .text c_w.l(rt_memclr_w.o) + 0x080006f6 0x080006f6 0x00000006 Code RO 8532 .text c_w.l(heapauxi.o) + 0x080006fc 0x080006fc 0x00000016 Code RO 8555 .text c_w.l(_rserrno.o) + 0x08000712 0x08000712 0x00000002 PAD + 0x08000714 0x08000714 0x00000008 Code RO 8617 .text c_w.l(rt_errno_addr_intlibspace.o) + 0x0800071c 0x0800071c 0x00000008 Code RO 8621 .text c_w.l(libspace.o) + 0x08000724 0x08000724 0x0000004a Code RO 8624 .text c_w.l(sys_stackheap_outer.o) + 0x0800076e 0x0800076e 0x00000012 Code RO 8626 .text c_w.l(exit.o) + 0x08000780 0x08000780 0x0000000c Code RO 8695 .text c_w.l(sys_exit.o) + 0x0800078c 0x0800078c 0x00000002 Code RO 8714 .text c_w.l(use_no_semi.o) + 0x0800078e 0x0800078e 0x00000000 Code RO 8716 .text c_w.l(indicate_semi.o) + 0x0800078e 0x0800078e 0x00000002 PAD + 0x08000790 0x08000790 0x00000128 Code RO 5272 i.ADC_ConfigureBoostMode stm32h7xx_hal_adc.o + 0x080008b8 0x080008b8 0x000000f4 Code RO 5273 i.ADC_ConversionStop stm32h7xx_hal_adc.o + 0x080009ac 0x080009ac 0x0000007e Code RO 5274 i.ADC_DMAConvCplt stm32h7xx_hal_adc.o + 0x08000a2a 0x08000a2a 0x0000001a Code RO 5275 i.ADC_DMAError stm32h7xx_hal_adc.o + 0x08000a44 0x08000a44 0x0000000a Code RO 5276 i.ADC_DMAHalfConvCplt stm32h7xx_hal_adc.o + 0x08000a4e 0x08000a4e 0x00000002 PAD + 0x08000a50 0x08000a50 0x00000084 Code RO 5277 i.ADC_Disable stm32h7xx_hal_adc.o + 0x08000ad4 0x08000ad4 0x000000c0 Code RO 5278 i.ADC_Enable stm32h7xx_hal_adc.o + 0x08000b94 0x08000b94 0x0000000c Code RO 927 i.BDMA_Channel0_IRQHandler stm32h7xx_it.o + 0x08000ba0 0x08000ba0 0x00000002 Code RO 928 i.BusFault_Handler stm32h7xx_it.o + 0x08000ba2 0x08000ba2 0x00000002 PAD + 0x08000ba4 0x08000ba4 0x00000110 Code RO 271 i.CLKHZSET main.o + 0x08000cb4 0x08000cb4 0x00000120 Code RO 272 i.ChannelSelect main.o + 0x08000dd4 0x08000dd4 0x000000e8 Code RO 274 i.Clk_Set main.o + 0x08000ebc 0x08000ebc 0x0000001c Code RO 13 i.Command_AddReadIndex communicaion.o + 0x08000ed8 0x08000ed8 0x000003dc Code RO 14 i.Command_Deal communicaion.o + 0x080012b4 0x080012b4 0x000000c0 Code RO 15 i.Command_GetCommand communicaion.o + 0x08001374 0x08001374 0x0000001c Code RO 16 i.Command_GetLength communicaion.o + 0x08001390 0x08001390 0x0000000e Code RO 17 i.Command_GetRemain communicaion.o + 0x0800139e 0x0800139e 0x00000002 PAD + 0x080013a0 0x080013a0 0x00000014 Code RO 18 i.Command_Read communicaion.o + 0x080013b4 0x080013b4 0x00000060 Code RO 19 i.Command_Write communicaion.o + 0x08001414 0x08001414 0x000004c8 Code RO 275 i.CommunicationResponse main.o + 0x080018dc 0x080018dc 0x0000000c Code RO 929 i.DMA1_Stream5_IRQHandler stm32h7xx_it.o + 0x080018e8 0x080018e8 0x0000000c Code RO 930 i.DMAMUX2_OVR_IRQHandler stm32h7xx_it.o + 0x080018f4 0x080018f4 0x000000c0 Code RO 3502 i.DMA_CalcBaseAndBitshift stm32h7xx_hal_dma.o + 0x080019b4 0x080019b4 0x000000a0 Code RO 3503 i.DMA_CalcDMAMUXChannelBaseAndMask stm32h7xx_hal_dma.o + 0x08001a54 0x08001a54 0x0000007c Code RO 3504 i.DMA_CalcDMAMUXRequestGenBaseAndMask stm32h7xx_hal_dma.o + 0x08001ad0 0x08001ad0 0x00000078 Code RO 3505 i.DMA_CheckFifoParam stm32h7xx_hal_dma.o + 0x08001b48 0x08001b48 0x0000023c Code RO 3506 i.DMA_SetConfig stm32h7xx_hal_dma.o + 0x08001d84 0x08001d84 0x00000002 Code RO 931 i.DebugMon_Handler stm32h7xx_it.o + 0x08001d86 0x08001d86 0x00000004 Code RO 276 i.Error_Handler main.o + 0x08001d8a 0x08001d8a 0x00000002 PAD + 0x08001d8c 0x08001d8c 0x0000003c Code RO 278 i.FindMaxValue main.o + 0x08001dc8 0x08001dc8 0x0000006c Code RO 20 i.FramePack communicaion.o + 0x08001e34 0x08001e34 0x000000a4 Code RO 5494 i.HAL_ADCEx_Calibration_Start stm32h7xx_hal_adc_ex.o + 0x08001ed8 0x08001ed8 0x00000480 Code RO 5280 i.HAL_ADC_ConfigChannel stm32h7xx_hal_adc.o + 0x08002358 0x08002358 0x000001a0 Code RO 279 i.HAL_ADC_ConvCpltCallback main.o + 0x080024f8 0x080024f8 0x00000170 Code RO 280 i.HAL_ADC_ConvHalfCpltCallback main.o + 0x08002668 0x08002668 0x00000002 Code RO 5284 i.HAL_ADC_ErrorCallback stm32h7xx_hal_adc.o + 0x0800266a 0x0800266a 0x00000002 PAD + 0x0800266c 0x0800266c 0x0000022c Code RO 5289 i.HAL_ADC_Init stm32h7xx_hal_adc.o + 0x08002898 0x08002898 0x00000150 Code RO 1022 i.HAL_ADC_MspInit stm32h7xx_hal_msp.o + 0x080029e8 0x080029e8 0x0000010c Code RO 5296 i.HAL_ADC_Start_DMA stm32h7xx_hal_adc.o + 0x08002af4 0x08002af4 0x0000007e Code RO 5299 i.HAL_ADC_Stop_DMA stm32h7xx_hal_adc.o + 0x08002b72 0x08002b72 0x00000002 PAD + 0x08002b74 0x08002b74 0x000000ec Code RO 3621 i.HAL_DMAEx_ConfigMuxSync stm32h7xx_hal_dma_ex.o + 0x08002c60 0x08002c60 0x00000064 Code RO 3624 i.HAL_DMAEx_MUX_IRQHandler stm32h7xx_hal_dma_ex.o + 0x08002cc4 0x08002cc4 0x0000037c Code RO 3507 i.HAL_DMA_Abort stm32h7xx_hal_dma.o + 0x08003040 0x08003040 0x000002b0 Code RO 3508 i.HAL_DMA_Abort_IT stm32h7xx_hal_dma.o + 0x080032f0 0x080032f0 0x000007a8 Code RO 3512 i.HAL_DMA_IRQHandler stm32h7xx_hal_dma.o + 0x08003a98 0x08003a98 0x000003fc Code RO 3513 i.HAL_DMA_Init stm32h7xx_hal_dma.o + 0x08003e94 0x08003e94 0x000001a0 Code RO 3516 i.HAL_DMA_Start stm32h7xx_hal_dma.o + 0x08004034 0x08004034 0x000002ec Code RO 3517 i.HAL_DMA_Start_IT stm32h7xx_hal_dma.o + 0x08004320 0x08004320 0x00000224 Code RO 3355 i.HAL_GPIO_Init stm32h7xx_hal_gpio.o + 0x08004544 0x08004544 0x0000000e Code RO 3359 i.HAL_GPIO_WritePin stm32h7xx_hal_gpio.o + 0x08004552 0x08004552 0x00000002 PAD + 0x08004554 0x08004554 0x0000000c Code RO 4380 i.HAL_GetREVID stm32h7xx_hal.o + 0x08004560 0x08004560 0x0000000c Code RO 4381 i.HAL_GetTick stm32h7xx_hal.o + 0x0800456c 0x0800456c 0x00000010 Code RO 4387 i.HAL_IncTick stm32h7xx_hal.o + 0x0800457c 0x0800457c 0x0000005c Code RO 4388 i.HAL_Init stm32h7xx_hal.o + 0x080045d8 0x080045d8 0x00000090 Code RO 1088 i.HAL_InitTick stm32h7xx_hal_timebase_tim.o + 0x08004668 0x08004668 0x00000024 Code RO 1023 i.HAL_MspInit stm32h7xx_hal_msp.o + 0x0800468c 0x0800468c 0x0000001a Code RO 4217 i.HAL_NVIC_EnableIRQ stm32h7xx_hal_cortex.o + 0x080046a6 0x080046a6 0x00000002 PAD + 0x080046a8 0x080046a8 0x00000040 Code RO 4223 i.HAL_NVIC_SetPriority stm32h7xx_hal_cortex.o + 0x080046e8 0x080046e8 0x00000024 Code RO 4224 i.HAL_NVIC_SetPriorityGrouping stm32h7xx_hal_cortex.o + 0x0800470c 0x0800470c 0x00000002 Code RO 2425 i.HAL_PCDEx_LPM_Callback stm32h7xx_hal_pcd_ex.o + 0x0800470e 0x0800470e 0x00000008 Code RO 563 i.HAL_PCD_ConnectCallback usbd_conf.o + 0x08004716 0x08004716 0x00000012 Code RO 564 i.HAL_PCD_DataInStageCallback usbd_conf.o + 0x08004728 0x08004728 0x00000014 Code RO 565 i.HAL_PCD_DataOutStageCallback usbd_conf.o + 0x0800473c 0x0800473c 0x00000008 Code RO 566 i.HAL_PCD_DisconnectCallback usbd_conf.o + 0x08004744 0x08004744 0x0000001e Code RO 2191 i.HAL_PCD_EP_Abort stm32h7xx_hal_pcd.o + 0x08004762 0x08004762 0x00000058 Code RO 2193 i.HAL_PCD_EP_ClrStall stm32h7xx_hal_pcd.o + 0x080047ba 0x080047ba 0x00000060 Code RO 2196 i.HAL_PCD_EP_Open stm32h7xx_hal_pcd.o + 0x0800481a 0x0800481a 0x00000032 Code RO 2197 i.HAL_PCD_EP_Receive stm32h7xx_hal_pcd.o + 0x0800484c 0x0800484c 0x00000070 Code RO 2198 i.HAL_PCD_EP_SetStall stm32h7xx_hal_pcd.o + 0x080048bc 0x080048bc 0x00000032 Code RO 2199 i.HAL_PCD_EP_Transmit stm32h7xx_hal_pcd.o + 0x080048ee 0x080048ee 0x00000542 Code RO 2201 i.HAL_PCD_IRQHandler stm32h7xx_hal_pcd.o + 0x08004e30 0x08004e30 0x00000008 Code RO 567 i.HAL_PCD_ISOINIncompleteCallback usbd_conf.o + 0x08004e38 0x08004e38 0x00000008 Code RO 568 i.HAL_PCD_ISOOUTIncompleteCallback usbd_conf.o + 0x08004e40 0x08004e40 0x0000002e Code RO 571 i.HAL_PCD_ResetCallback usbd_conf.o + 0x08004e6e 0x08004e6e 0x00000008 Code RO 572 i.HAL_PCD_ResumeCallback usbd_conf.o + 0x08004e76 0x08004e76 0x00000008 Code RO 573 i.HAL_PCD_SOFCallback usbd_conf.o + 0x08004e7e 0x08004e7e 0x00000026 Code RO 2210 i.HAL_PCD_SetAddress stm32h7xx_hal_pcd.o + 0x08004ea4 0x08004ea4 0x0000000e Code RO 574 i.HAL_PCD_SetupStageCallback usbd_conf.o + 0x08004eb2 0x08004eb2 0x00000002 PAD + 0x08004eb4 0x08004eb4 0x00000030 Code RO 575 i.HAL_PCD_SuspendCallback usbd_conf.o + 0x08004ee4 0x08004ee4 0x00000058 Code RO 3956 i.HAL_PWREx_ConfigSupply stm32h7xx_hal_pwr_ex.o + 0x08004f3c 0x08004f3c 0x00000024 Code RO 2918 i.HAL_RCCEx_GetD3PCLK1Freq stm32h7xx_hal_rcc_ex.o + 0x08004f60 0x08004f60 0x000001c0 Code RO 2919 i.HAL_RCCEx_GetPLL1ClockFreq stm32h7xx_hal_rcc_ex.o + 0x08005120 0x08005120 0x000001c0 Code RO 2920 i.HAL_RCCEx_GetPLL2ClockFreq stm32h7xx_hal_rcc_ex.o + 0x080052e0 0x080052e0 0x000001c0 Code RO 2921 i.HAL_RCCEx_GetPLL3ClockFreq stm32h7xx_hal_rcc_ex.o + 0x080054a0 0x080054a0 0x000005ee Code RO 2923 i.HAL_RCCEx_GetPeriphCLKFreq stm32h7xx_hal_rcc_ex.o + 0x08005a8e 0x08005a8e 0x00000002 PAD + 0x08005a90 0x08005a90 0x00000a04 Code RO 2927 i.HAL_RCCEx_PeriphCLKConfig stm32h7xx_hal_rcc_ex.o + 0x08006494 0x08006494 0x0000027c Code RO 2803 i.HAL_RCC_ClockConfig stm32h7xx_hal_rcc.o + 0x08006710 0x08006710 0x00000060 Code RO 2807 i.HAL_RCC_GetClockConfig stm32h7xx_hal_rcc.o + 0x08006770 0x08006770 0x00000044 Code RO 2808 i.HAL_RCC_GetHCLKFreq stm32h7xx_hal_rcc.o + 0x080067b4 0x080067b4 0x00000024 Code RO 2810 i.HAL_RCC_GetPCLK1Freq stm32h7xx_hal_rcc.o + 0x080067d8 0x080067d8 0x00000024 Code RO 2811 i.HAL_RCC_GetPCLK2Freq stm32h7xx_hal_rcc.o + 0x080067fc 0x080067fc 0x000001b4 Code RO 2812 i.HAL_RCC_GetSysClockFreq stm32h7xx_hal_rcc.o + 0x080069b0 0x080069b0 0x00000684 Code RO 2815 i.HAL_RCC_OscConfig stm32h7xx_hal_rcc.o + 0x08007034 0x08007034 0x00000010 Code RO 4393 i.HAL_SYSCFG_AnalogSwitchConfig stm32h7xx_hal.o + 0x08007044 0x08007044 0x00000002 Code RO 1891 i.HAL_TIMEx_Break2Callback stm32h7xx_hal_tim_ex.o + 0x08007046 0x08007046 0x00000002 Code RO 1892 i.HAL_TIMEx_BreakCallback stm32h7xx_hal_tim_ex.o + 0x08007048 0x08007048 0x00000002 Code RO 1893 i.HAL_TIMEx_CommutCallback stm32h7xx_hal_tim_ex.o + 0x0800704a 0x0800704a 0x00000002 PAD + 0x0800704c 0x0800704c 0x0000008c Code RO 1895 i.HAL_TIMEx_ConfigBreakDeadTime stm32h7xx_hal_tim_ex.o + 0x080070d8 0x080070d8 0x000000a0 Code RO 1913 i.HAL_TIMEx_MasterConfigSynchronization stm32h7xx_hal_tim_ex.o + 0x08007178 0x08007178 0x0000004e Code RO 1166 i.HAL_TIM_Base_Init stm32h7xx_hal_tim.o + 0x080071c6 0x080071c6 0x00000002 PAD + 0x080071c8 0x080071c8 0x00000060 Code RO 1025 i.HAL_TIM_Base_MspInit stm32h7xx_hal_msp.o + 0x08007228 0x08007228 0x00000094 Code RO 1171 i.HAL_TIM_Base_Start_IT stm32h7xx_hal_tim.o + 0x080072bc 0x080072bc 0x00000108 Code RO 1175 i.HAL_TIM_ConfigClockSource stm32h7xx_hal_tim.o + 0x080073c4 0x080073c4 0x00000002 Code RO 1200 i.HAL_TIM_IC_CaptureCallback stm32h7xx_hal_tim.o + 0x080073c6 0x080073c6 0x00000152 Code RO 1214 i.HAL_TIM_IRQHandler stm32h7xx_hal_tim.o + 0x08007518 0x08007518 0x00000050 Code RO 1026 i.HAL_TIM_MspPostInit stm32h7xx_hal_msp.o + 0x08007568 0x08007568 0x00000002 Code RO 1217 i.HAL_TIM_OC_DelayElapsedCallback stm32h7xx_hal_tim.o + 0x0800756a 0x0800756a 0x00000136 Code RO 1238 i.HAL_TIM_PWM_ConfigChannel stm32h7xx_hal_tim.o + 0x080076a0 0x080076a0 0x0000004e Code RO 1241 i.HAL_TIM_PWM_Init stm32h7xx_hal_tim.o + 0x080076ee 0x080076ee 0x00000002 Code RO 1243 i.HAL_TIM_PWM_MspInit stm32h7xx_hal_tim.o + 0x080076f0 0x080076f0 0x00000002 Code RO 1244 i.HAL_TIM_PWM_PulseFinishedCallback stm32h7xx_hal_tim.o + 0x080076f2 0x080076f2 0x00000002 PAD + 0x080076f4 0x080076f4 0x00000128 Code RO 1246 i.HAL_TIM_PWM_Start stm32h7xx_hal_tim.o + 0x0800781c 0x0800781c 0x000000b0 Code RO 1249 i.HAL_TIM_PWM_Stop stm32h7xx_hal_tim.o + 0x080078cc 0x080078cc 0x00000014 Code RO 281 i.HAL_TIM_PeriodElapsedCallback main.o + 0x080078e0 0x080078e0 0x00000002 Code RO 1257 i.HAL_TIM_TriggerCallback stm32h7xx_hal_tim.o + 0x080078e2 0x080078e2 0x0000003e Code RO 6148 i.HAL_UARTEx_DisableFifoMode stm32h7xx_hal_uart_ex.o + 0x08007920 0x08007920 0x00000052 Code RO 6154 i.HAL_UARTEx_ReceiveToIdle_DMA stm32h7xx_hal_uart_ex.o + 0x08007972 0x08007972 0x00000002 PAD + 0x08007974 0x08007974 0x00000024 Code RO 282 i.HAL_UARTEx_RxEventCallback main.o + 0x08007998 0x08007998 0x00000002 Code RO 6156 i.HAL_UARTEx_RxFifoFullCallback stm32h7xx_hal_uart_ex.o + 0x0800799a 0x0800799a 0x0000004c Code RO 6157 i.HAL_UARTEx_SetRxFifoThreshold stm32h7xx_hal_uart_ex.o + 0x080079e6 0x080079e6 0x0000004c Code RO 6158 i.HAL_UARTEx_SetTxFifoThreshold stm32h7xx_hal_uart_ex.o + 0x08007a32 0x08007a32 0x00000002 Code RO 6160 i.HAL_UARTEx_TxFifoEmptyCallback stm32h7xx_hal_uart_ex.o + 0x08007a34 0x08007a34 0x00000002 Code RO 6161 i.HAL_UARTEx_WakeupCallback stm32h7xx_hal_uart_ex.o + 0x08007a36 0x08007a36 0x00000002 Code RO 5748 i.HAL_UART_ErrorCallback stm32h7xx_hal_uart.o + 0x08007a38 0x08007a38 0x0000000c Code RO 5750 i.HAL_UART_GetState stm32h7xx_hal_uart.o + 0x08007a44 0x08007a44 0x000003ac Code RO 5751 i.HAL_UART_IRQHandler stm32h7xx_hal_uart.o + 0x08007df0 0x08007df0 0x00000070 Code RO 5752 i.HAL_UART_Init stm32h7xx_hal_uart.o + 0x08007e60 0x08007e60 0x000000d0 Code RO 1028 i.HAL_UART_MspInit stm32h7xx_hal_msp.o + 0x08007f30 0x08007f30 0x00000002 Code RO 5759 i.HAL_UART_RxCpltCallback stm32h7xx_hal_uart.o + 0x08007f32 0x08007f32 0x00000002 Code RO 5760 i.HAL_UART_RxHalfCpltCallback stm32h7xx_hal_uart.o + 0x08007f34 0x08007f34 0x000000b8 Code RO 5761 i.HAL_UART_Transmit stm32h7xx_hal_uart.o + 0x08007fec 0x08007fec 0x00000002 Code RO 5764 i.HAL_UART_TxCpltCallback stm32h7xx_hal_uart.o + 0x08007fee 0x08007fee 0x00000002 Code RO 932 i.HardFault_Handler stm32h7xx_it.o + 0x08007ff0 0x08007ff0 0x00000008 Code RO 5301 i.LL_ADC_INJ_IsConversionOngoing stm32h7xx_hal_adc.o + 0x08007ff8 0x08007ff8 0x00000008 Code RO 5302 i.LL_ADC_IsEnabled stm32h7xx_hal_adc.o + 0x08008000 0x08008000 0x00000008 Code RO 5303 i.LL_ADC_REG_IsConversionOngoing stm32h7xx_hal_adc.o + 0x08008008 0x08008008 0x00000010 Code RO 5304 i.LL_ADC_REG_IsTriggerSourceSWStart stm32h7xx_hal_adc.o + 0x08008018 0x08008018 0x000004e4 Code RO 284 i.LineCheck main.o + 0x080084fc 0x080084fc 0x00000174 Code RO 285 i.MX_ADC3_Init main.o + 0x08008670 0x08008670 0x0000003c Code RO 286 i.MX_BDMA_Init main.o + 0x080086ac 0x080086ac 0x00000078 Code RO 287 i.MX_DMA_Init main.o + 0x08008724 0x08008724 0x00000154 Code RO 288 i.MX_GPIO_Init main.o + 0x08008878 0x08008878 0x000000d8 Code RO 289 i.MX_TIM1_Init main.o + 0x08008950 0x08008950 0x0000009c Code RO 290 i.MX_TIM2_Init main.o + 0x080089ec 0x080089ec 0x0000009c Code RO 291 i.MX_TIM4_Init main.o + 0x08008a88 0x08008a88 0x00000064 Code RO 292 i.MX_USART1_UART_Init main.o + 0x08008aec 0x08008aec 0x00000002 Code RO 933 i.MemManage_Handler stm32h7xx_it.o + 0x08008aee 0x08008aee 0x00000002 Code RO 934 i.NMI_Handler stm32h7xx_it.o + 0x08008af0 0x08008af0 0x0000000c Code RO 935 i.OTG_FS_IRQHandler stm32h7xx_it.o + 0x08008afc 0x08008afc 0x00000048 Code RO 2216 i.PCD_EP_OutSetupPacket_int stm32h7xx_hal_pcd.o + 0x08008b44 0x08008b44 0x000000e4 Code RO 2217 i.PCD_EP_OutXfrComplete_int stm32h7xx_hal_pcd.o + 0x08008c28 0x08008c28 0x0000009c Code RO 2218 i.PCD_WriteEmptyTxFifo stm32h7xx_hal_pcd.o + 0x08008cc4 0x08008cc4 0x00000124 Code RO 2930 i.RCCEx_PLL2_Config stm32h7xx_hal_rcc_ex.o + 0x08008de8 0x08008de8 0x00000124 Code RO 2931 i.RCCEx_PLL3_Config stm32h7xx_hal_rcc_ex.o + 0x08008f0c 0x08008f0c 0x0000000a Code RO 8238 i.SWAPBYTE usbd_ctlreq.o + 0x08008f16 0x08008f16 0x00000002 PAD + 0x08008f18 0x08008f18 0x000000b0 Code RO 293 i.SampleRate_Set main.o + 0x08008fc8 0x08008fc8 0x000001b8 Code RO 294 i.SlopeSet main.o + 0x08009180 0x08009180 0x000001d8 Code RO 295 i.StartDefaultTask main.o + 0x08009358 0x08009358 0x0000001a Code RO 7415 i.SysTick_Handler cmsis_os2.o + 0x08009372 0x08009372 0x00000002 PAD + 0x08009374 0x08009374 0x000000a8 Code RO 296 i.SystemClock_Config main.o + 0x0800941c 0x0800941c 0x000000dc Code RO 1128 i.SystemInit system_stm32h7xx.o + 0x080094f8 0x080094f8 0x0000000c Code RO 936 i.TIM7_IRQHandler stm32h7xx_it.o + 0x08009504 0x08009504 0x000000c8 Code RO 1259 i.TIM_Base_SetConfig stm32h7xx_hal_tim.o + 0x080095cc 0x080095cc 0x0000001a Code RO 1260 i.TIM_CCxChannelCmd stm32h7xx_hal_tim.o + 0x080095e6 0x080095e6 0x00000014 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i.UARTEx_SetNbDataToProcess stm32h7xx_hal_uart_ex.o + 0x080099bc 0x080099bc 0x000000c8 Code RO 5766 i.UART_AdvFeatureConfig stm32h7xx_hal_uart.o + 0x08009a84 0x08009a84 0x000000aa Code RO 5767 i.UART_CheckIdleState stm32h7xx_hal_uart.o + 0x08009b2e 0x08009b2e 0x00000010 Code RO 5768 i.UART_DMAAbortOnError stm32h7xx_hal_uart.o + 0x08009b3e 0x08009b3e 0x00000050 Code RO 5769 i.UART_DMAError stm32h7xx_hal_uart.o + 0x08009b8e 0x08009b8e 0x00000084 Code RO 5770 i.UART_DMAReceiveCplt stm32h7xx_hal_uart.o + 0x08009c12 0x08009c12 0x00000020 Code RO 5772 i.UART_DMARxHalfCplt stm32h7xx_hal_uart.o + 0x08009c32 0x08009c32 0x00000002 PAD + 0x08009c34 0x08009c34 0x00000054 Code RO 5778 i.UART_EndRxTransfer stm32h7xx_hal_uart.o + 0x08009c88 0x08009c88 0x00000024 Code RO 5779 i.UART_EndTransmit_IT stm32h7xx_hal_uart.o + 0x08009cac 0x08009cac 0x0000002e Code RO 5780 i.UART_EndTxTransfer stm32h7xx_hal_uart.o + 0x08009cda 0x08009cda 0x00000002 PAD + 0x08009cdc 0x08009cdc 0x00000490 Code RO 5785 i.UART_SetConfig stm32h7xx_hal_uart.o + 0x0800a16c 0x0800a16c 0x000000a4 Code RO 5786 i.UART_Start_Receive_DMA stm32h7xx_hal_uart.o + 0x0800a210 0x0800a210 0x00000098 Code RO 5792 i.UART_WaitOnFlagUntilTimeout stm32h7xx_hal_uart.o + 0x0800a2a8 0x0800a2a8 0x00000020 Code RO 937 i.USART1_IRQHandler stm32h7xx_it.o + 0x0800a2c8 0x0800a2c8 0x00000014 Code RO 8072 i.USBD_ClrClassConfig usbd_core.o + 0x0800a2dc 0x0800a2dc 0x00000026 Code RO 8239 i.USBD_ClrFeature usbd_ctlreq.o + 0x0800a302 0x0800a302 0x00000004 Code RO 8073 i.USBD_CoreFindEP usbd_core.o + 0x0800a306 0x0800a306 0x00000004 Code RO 8074 i.USBD_CoreFindIF usbd_core.o + 0x0800a30a 0x0800a30a 0x00000010 Code RO 8345 i.USBD_CtlContinueRx usbd_ioreq.o + 0x0800a31a 0x0800a31a 0x00000010 Code RO 8346 i.USBD_CtlContinueSendData usbd_ioreq.o + 0x0800a32a 0x0800a32a 0x00000018 Code RO 8240 i.USBD_CtlError usbd_ctlreq.o + 0x0800a342 0x0800a342 0x00000016 Code RO 8348 i.USBD_CtlReceiveStatus usbd_ioreq.o + 0x0800a358 0x0800a358 0x0000001a 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i.prvResetNextTaskUnblockTime tasks.o + 0x0800c9f8 0x0800c9f8 0x0000002c Code RO 7235 i.prvSampleTimeNow timers.o + 0x0800ca24 0x0800ca24 0x00000070 Code RO 7236 i.prvSwitchTimerLists timers.o + 0x0800ca94 0x0800ca94 0x0000002c Code RO 7993 i.prvTaskExitError port.o + 0x0800cac0 0x0800cac0 0x00000014 Code RO 7237 i.prvTimerTask timers.o + 0x0800cad4 0x0800cad4 0x0000006a Code RO 6446 i.prvUnlockQueue queue.o + 0x0800cb3e 0x0800cb3e 0x00000002 PAD + 0x0800cb40 0x0800cb40 0x000000dc Code RO 7939 i.pvPortMalloc heap_4.o + 0x0800cc1c 0x0800cc1c 0x00000018 Code RO 6863 i.pvTaskIncrementMutexHeldCount tasks.o + 0x0800cc34 0x0800cc34 0x00000024 Code RO 7994 i.pxPortInitialiseStack port.o + 0x0800cc58 0x0800cc58 0x0000006a Code RO 8587 i.sqrt m_wv.l(sqrt.o) + 0x0800ccc2 0x0800ccc2 0x00000026 Code RO 6399 i.uxListRemove list.o + 0x0800cce8 0x0800cce8 0x00000018 Code RO 7488 i.vApplicationGetIdleTaskMemory cmsis_os2.o + 0x0800cd00 0x0800cd00 0x00000018 Code RO 7489 i.vApplicationGetTimerTaskMemory cmsis_os2.o + 0x0800cd18 0x0800cd18 0x00000016 Code RO 6400 i.vListInitialise list.o + 0x0800cd2e 0x0800cd2e 0x00000006 Code RO 6401 i.vListInitialiseItem list.o + 0x0800cd34 0x0800cd34 0x00000030 Code RO 6402 i.vListInsert list.o + 0x0800cd64 0x0800cd64 0x00000018 Code RO 6403 i.vListInsertEnd list.o + 0x0800cd7c 0x0800cd7c 0x00000040 Code RO 7996 i.vPortEnterCritical port.o + 0x0800cdbc 0x0800cdbc 0x0000002c Code RO 7997 i.vPortExitCritical port.o + 0x0800cde8 0x0800cde8 0x00000064 Code RO 7940 i.vPortFree heap_4.o + 0x0800ce4c 0x0800ce4c 0x00000024 Code RO 7998 i.vPortSetupTimerInterrupt port.o + 0x0800ce70 0x0800ce70 0x00000054 Code RO 7999 i.vPortValidateInterruptPriority port.o + 0x0800cec4 0x0800cec4 0x00000024 Code RO 6452 i.vQueueAddToRegistry queue.o + 0x0800cee8 0x0800cee8 0x00000032 Code RO 6453 i.vQueueDelete queue.o + 0x0800cf1a 0x0800cf1a 0x00000002 PAD + 0x0800cf1c 0x0800cf1c 0x00000028 Code RO 6455 i.vQueueUnregisterQueue queue.o + 0x0800cf44 0x0800cf44 0x00000046 Code RO 6456 i.vQueueWaitForMessageRestricted queue.o + 0x0800cf8a 0x0800cf8a 0x00000002 PAD + 0x0800cf8c 0x0800cf8c 0x00000050 Code RO 6873 i.vTaskDelay tasks.o + 0x0800cfdc 0x0800cfdc 0x00000010 Code RO 6878 i.vTaskInternalSetTimeOutState tasks.o + 0x0800cfec 0x0800cfec 0x0000000c Code RO 6879 i.vTaskMissedYield tasks.o + 0x0800cff8 0x0800cff8 0x00000034 Code RO 6881 i.vTaskPlaceOnEventList tasks.o + 0x0800d02c 0x0800d02c 0x0000003c Code RO 6882 i.vTaskPlaceOnEventListRestricted tasks.o + 0x0800d068 0x0800d068 0x00000094 Code RO 6884 i.vTaskPriorityDisinheritAfterTimeout tasks.o + 0x0800d0fc 0x0800d0fc 0x00000090 Code RO 6890 i.vTaskStartScheduler tasks.o + 0x0800d18c 0x0800d18c 0x00000010 Code RO 6892 i.vTaskSuspendAll tasks.o + 0x0800d19c 0x0800d19c 0x00000068 Code RO 6893 i.vTaskSwitchContext tasks.o + 0x0800d204 0x0800d204 0x000000f4 Code RO 8000 i.xPortStartScheduler port.o + 0x0800d2f8 0x0800d2f8 0x0000002c Code RO 8001 i.xPortSysTickHandler port.o + 0x0800d324 0x0800d324 0x0000003c Code RO 6457 i.xQueueCreateCountingSemaphore queue.o + 0x0800d360 0x0800d360 0x00000042 Code RO 6458 i.xQueueCreateCountingSemaphoreStatic queue.o + 0x0800d3a2 0x0800d3a2 0x00000044 Code RO 6461 i.xQueueGenericCreate queue.o + 0x0800d3e6 0x0800d3e6 0x0000006c Code RO 6462 i.xQueueGenericCreateStatic queue.o + 0x0800d452 0x0800d452 0x00000002 PAD + 0x0800d454 0x0800d454 0x0000008c Code RO 6463 i.xQueueGenericReset queue.o + 0x0800d4e0 0x0800d4e0 0x00000164 Code RO 6464 i.xQueueGenericSend queue.o + 0x0800d644 0x0800d644 0x000000c0 Code RO 6465 i.xQueueGenericSendFromISR queue.o + 0x0800d704 0x0800d704 0x0000009e Code RO 6468 i.xQueueGiveFromISR queue.o + 0x0800d7a2 0x0800d7a2 0x00000002 PAD + 0x0800d7a4 0x0800d7a4 0x0000013c Code RO 6474 i.xQueueReceive queue.o + 0x0800d8e0 0x0800d8e0 0x0000009c Code RO 6475 i.xQueueReceiveFromISR queue.o + 0x0800d97c 0x0800d97c 0x0000017c Code RO 6476 i.xQueueSemaphoreTake queue.o + 0x0800daf8 0x0800daf8 0x0000007c Code RO 6895 i.xTaskCheckForTimeOut tasks.o + 0x0800db74 0x0800db74 0x00000064 Code RO 6896 i.xTaskCreate tasks.o + 0x0800dbd8 0x0800dbd8 0x0000005c Code RO 6897 i.xTaskCreateStatic tasks.o + 0x0800dc34 0x0800dc34 0x0000001c Code RO 6901 i.xTaskGetSchedulerState tasks.o + 0x0800dc50 0x0800dc50 0x0000000c Code RO 6902 i.xTaskGetTickCount tasks.o + 0x0800dc5c 0x0800dc5c 0x000000cc Code RO 6904 i.xTaskIncrementTick tasks.o + 0x0800dd28 0x0800dd28 0x0000007c Code RO 6907 i.xTaskPriorityDisinherit tasks.o + 0x0800dda4 0x0800dda4 0x0000007c Code RO 6908 i.xTaskPriorityInherit tasks.o + 0x0800de20 0x0800de20 0x00000078 Code RO 6909 i.xTaskRemoveFromEventList tasks.o + 0x0800de98 0x0800de98 0x000000c8 Code RO 6910 i.xTaskResumeAll tasks.o + 0x0800df60 0x0800df60 0x00000068 Code RO 7246 i.xTimerCreateTimerTask timers.o + 0x0800dfc8 0x0800dfc8 0x0000006c Code RO 7247 i.xTimerGenericCommand timers.o + 0x0800e034 0x0800e034 0x00000010 Code RO 8619 x$fpl$dcheck1 fz_wv.l(dcheck1.o) + 0x0800e044 0x0800e044 0x0000000a Code RO 8710 x$fpl$fpinit fz_wv.l(fpinit.o) + 0x0800e04e 0x0800e04e 0x00000064 Code RO 8638 x$fpl$retnan fz_wv.l(retnan.o) + 0x0800e0b2 0x0800e0b2 0x0000005c Code RO 8557 x$fpl$scalbn fz_wv.l(scalbn.o) + 0x0800e10e 0x0800e10e 0x00000030 Code RO 8693 x$fpl$trapveneer fz_wv.l(trapv.o) + 0x0800e13e 0x0800e13e 0x00000000 Code RO 8559 x$fpl$usenofp fz_wv.l(usenofp.o) + 0x0800e13e 0x0800e13e 0x00000002 PAD + 0x0800e140 0x0800e140 0x000005a4 Data RO 305 .constdata main.o + 0x0800e6e4 0x0800e6e4 0x00000010 Data RO 1129 .constdata system_stm32h7xx.o + 0x0800e6f4 0x0800e6f4 0x00000008 Data RO 3519 .constdata stm32h7xx_hal_dma.o + 0x0800e6fc 0x0800e6fc 0x00000018 Data RO 5793 .constdata stm32h7xx_hal_uart.o + 0x0800e714 0x0800e714 0x00000010 Data RO 6164 .constdata stm32h7xx_hal_uart_ex.o + 0x0800e724 0x0800e724 0x00000004 PAD + 0x0800e728 0x0800e728 0x00000088 Data RO 8539 .constdata m_wv.l(pow.o) + 0x0800e7b0 0x0800e7b0 0x00000008 Data RO 8584 .constdata m_wv.l(qnan.o) + 0x0800e7b8 0x0800e7b8 0x00000028 Data RO 306 .conststring main.o + 0x0800e7e0 0x0800e7e0 0x00000020 Data RO 8768 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x0800e800, Size: 0x00000000, Max: 0x00020000, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_IRAM2 (Exec base: 0x24000000, Load base: 0x0800e800, Size: 0x000157b0, Max: 0x00080000, ABSOLUTE, COMPRESSED[0x000000dc]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x24000000 COMPRESSED 0x00000008 Data RW 22 .data communicaion.o + 0x24000008 COMPRESSED 0x000000dc Data RW 307 .data main.o + 0x240000e4 COMPRESSED 0x00000008 Data RW 1130 .data system_stm32h7xx.o + 0x240000ec COMPRESSED 0x0000000c Data RW 4410 .data stm32h7xx_hal.o + 0x240000f8 COMPRESSED 0x0000003c Data RW 6913 .data tasks.o + 0x24000134 COMPRESSED 0x00000014 Data RW 7255 .data timers.o + 0x24000148 COMPRESSED 0x00000004 Data RW 7491 .data cmsis_os2.o + 0x2400014c COMPRESSED 0x00000020 Data RW 7946 .data heap_4.o + 0x2400016c COMPRESSED 0x0000000c Data RW 8002 .data port.o + 0x24000178 COMPRESSED 0x00000001 Data RW 8253 .data usbd_ctlreq.o + 0x24000179 COMPRESSED 0x00000003 PAD + 0x2400017c - 0x00000146 Zero RW 21 .bss communicaion.o + 0x240002c2 COMPRESSED 0x00000002 PAD + 0x240002c4 - 0x0000e7ec Zero RW 300 .bss main.o + 0x2400eab0 - 0x00000078 Zero RW 301 .bss main.o + 0x2400eb28 - 0x00000704 Zero RW 594 .bss usbd_conf.o + 0x2400f22c - 0x0000004c Zero RW 1091 .bss stm32h7xx_hal_timebase_tim.o + 0x2400f278 - 0x00000040 Zero RW 6478 .bss queue.o + 0x2400f2b8 - 0x000004c4 Zero RW 6912 .bss tasks.o + 0x2400f77c - 0x00000118 Zero RW 7254 .bss timers.o + 0x2400f894 - 0x000008b8 Zero RW 7490 .bss cmsis_os2.o + 0x2401014c - 0x00005000 Zero RW 7945 .bss heap_4.o + 0x2401514c - 0x00000060 Zero RW 8622 .bss c_w.l(libspace.o) + 0x240151ac COMPRESSED 0x00000004 PAD + 0x240151b0 - 0x00000200 Zero RW 2 HEAP startup_stm32h750xx.o + 0x240153b0 - 0x00000400 Zero RW 1 STACK startup_stm32h750xx.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 752 38 0 4 2232 72174 cmsis_os2.o + 1474 96 0 8 326 1363392 communicaion.o + 0 0 0 0 0 19920 event_groups.o + 480 26 0 32 20480 5675 heap_4.o + 138 0 0 0 0 4190 list.o + 7144 530 1484 220 59492 25683 main.o + 786 84 0 12 0 12577 port.o + 2562 28 0 0 64 30192 queue.o + 64 26 664 0 1536 840 startup_stm32h750xx.o + 148 36 0 12 0 23349 stm32h7xx_hal.o + 3170 262 0 0 0 79902 stm32h7xx_hal_adc.o + 164 8 0 0 0 62798 stm32h7xx_hal_adc_ex.o + 158 14 0 0 0 39374 stm32h7xx_hal_cortex.o + 6892 154 8 0 0 16458 stm32h7xx_hal_dma.o + 336 10 0 0 0 2505 stm32h7xx_hal_dma_ex.o + 562 50 0 0 0 2732 stm32h7xx_hal_gpio.o + 756 78 0 0 0 4175 stm32h7xx_hal_msp.o + 2266 14 0 0 0 12114 stm32h7xx_hal_pcd.o + 2 0 0 0 0 1301 stm32h7xx_hal_pcd_ex.o + 88 6 0 0 0 905 stm32h7xx_hal_pwr_ex.o + 2976 136 0 0 0 9433 stm32h7xx_hal_rcc.o + 6046 180 0 0 0 14967 stm32h7xx_hal_rcc_ex.o + 2830 292 0 0 0 21707 stm32h7xx_hal_tim.o + 306 36 0 0 0 4696 stm32h7xx_hal_tim_ex.o + 144 20 0 0 76 1727 stm32h7xx_hal_timebase_tim.o + 3536 140 24 0 0 38868 stm32h7xx_hal_uart.o + 374 6 16 0 0 7177 stm32h7xx_hal_uart_ex.o + 104 40 0 0 0 5529 stm32h7xx_it.o + 1752 88 0 0 0 17067 stm32h7xx_ll_usb.o + 0 0 0 0 0 472 stream_buffer.o + 220 42 16 8 0 1510 system_stm32h7xx.o + 2472 208 0 60 1220 33823 tasks.o + 1040 88 0 20 280 34907 timers.o + 374 4 0 0 1796 12682 usbd_conf.o + 864 0 0 0 0 14183 usbd_core.o + 1872 22 0 1 0 18007 usbd_ctlreq.o + 102 0 0 0 0 4396 usbd_ioreq.o + + ---------------------------------------------------------------------- + 53018 2762 2248 380 87504 2021407 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 64 0 4 3 2 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 90 0 0 0 0 0 __dczerorl2.o + 8 0 0 0 0 68 __main.o + 0 0 0 0 0 0 __rtentry.o + 12 0 0 0 0 0 __rtentry2.o + 6 0 0 0 0 0 __rtentry4.o + 52 8 0 0 0 0 __scatter.o + 28 0 0 0 0 0 __scatter_zi.o + 22 0 0 0 0 100 _rserrno.o + 16 0 0 0 0 68 aeabi_memset.o + 18 0 0 0 0 80 exit.o + 6 0 0 0 0 152 heapauxi.o + 0 0 0 0 0 0 indicate_semi.o + 2 0 0 0 0 0 libinit.o + 6 0 0 0 0 0 libinit2.o + 2 0 0 0 0 0 libshutdown.o + 2 0 0 0 0 0 libshutdown2.o + 8 4 0 0 96 68 libspace.o + 238 0 0 0 0 100 lludivv7m.o + 8 4 0 0 0 68 rt_errno_addr_intlibspace.o + 68 0 0 0 0 68 rt_memclr.o + 78 0 0 0 0 80 rt_memclr_w.o + 138 0 0 0 0 68 rt_memcpy_v6.o + 100 0 0 0 0 80 rt_memcpy_w.o + 2 0 0 0 0 0 rtexit.o + 10 0 0 0 0 0 rtexit2.o + 12 4 0 0 0 68 sys_exit.o + 74 0 0 0 0 80 sys_stackheap_outer.o + 2 0 0 0 0 68 use_no_semi.o + 16 4 0 0 0 116 dcheck1.o + 10 0 0 0 0 116 fpinit.o + 100 0 0 0 0 116 retnan.o + 92 0 0 0 0 116 scalbn.o + 48 0 0 0 0 116 trapv.o + 0 0 0 0 0 0 usenofp.o + 110 60 0 0 0 580 dunder.o + 24 0 0 0 0 124 fabs.o + 48 0 0 0 0 124 fpclassify.o + 112 0 0 0 0 116 poly.o + 2296 304 136 0 0 320 pow.o + 0 0 8 0 0 0 qnan.o + 106 0 0 0 0 140 sqrt.o + + ---------------------------------------------------------------------- + 3982 388 144 0 100 3200 Library Totals + 12 0 0 0 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 1008 20 0 0 96 1216 c_w.l + 266 4 0 0 0 580 fz_wv.l + 2696 364 144 0 0 1404 m_wv.l + + ---------------------------------------------------------------------- + 3982 388 144 0 100 3200 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 57000 3150 2392 380 87604 1989335 Grand Totals + 57000 3150 2392 220 87604 1989335 ELF Image Totals (compressed) + 57000 3150 2392 220 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 59392 ( 58.00kB) + Total RW Size (RW Data + ZI Data) 87984 ( 85.92kB) + Total ROM Size (Code + RO Data + RW Data) 59612 ( 58.21kB) + +============================================================================== + diff --git a/MDK-ARM/startup_stm32h750xx.s b/MDK-ARM/startup_stm32h750xx.s new file mode 100644 index 0000000..a654289 --- /dev/null +++ b/MDK-ARM/startup_stm32h750xx.s @@ -0,0 +1,611 @@ +;******************************************************************************** +;* File Name : startup_stm32h750xx.s +;* @author MCD Application Team +;* Description : STM32H7xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2018 STMicroelectronics. +;* All rights reserved. +;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +;* +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it) + DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 + DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0 + DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0 + DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1 + DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1 + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt + DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD CRYP_IRQHandler ; CRYP crypto + DCD HASH_RNG_IRQHandler ; Hash and Rng + DCD FPU_IRQHandler ; FPU + DCD UART7_IRQHandler ; UART7 + DCD UART8_IRQHandler ; UART8 + DCD SPI4_IRQHandler ; SPI4 + DCD SPI5_IRQHandler ; SPI5 + DCD SPI6_IRQHandler ; SPI6 + DCD SAI1_IRQHandler ; SAI1 + DCD LTDC_IRQHandler ; LTDC + DCD LTDC_ER_IRQHandler ; LTDC error + DCD DMA2D_IRQHandler ; DMA2D + DCD SAI2_IRQHandler ; SAI2 + DCD QUADSPI_IRQHandler ; QUADSPI + DCD LPTIM1_IRQHandler ; LPTIM1 + DCD CEC_IRQHandler ; HDMI_CEC + DCD I2C4_EV_IRQHandler ; I2C4 Event + DCD I2C4_ER_IRQHandler ; I2C4 Error + DCD SPDIF_RX_IRQHandler ; SPDIF_RX + DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out + DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt + DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts + DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt + DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt + DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt + DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt + DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt + DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt + DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt + DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt + DCD SAI3_IRQHandler ; SAI3 global Interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TIM15_IRQHandler ; TIM15 global Interrupt + DCD TIM16_IRQHandler ; TIM16 global Interrupt + DCD TIM17_IRQHandler ; TIM17 global Interrupt + DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt + DCD MDIOS_IRQHandler ; MDIOS global Interrupt + DCD JPEG_IRQHandler ; JPEG global Interrupt + DCD MDMA_IRQHandler ; MDMA global Interrupt + DCD 0 ; Reserved + DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt + DCD HSEM1_IRQHandler ; HSEM1 global Interrupt + DCD 0 ; Reserved + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt + DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt + DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt + DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt + DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt + DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt + DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt + DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt + DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt + DCD COMP1_IRQHandler ; COMP1 global Interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt + DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt + DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt + DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD 0 ; Reserved + DCD CRS_IRQHandler ; Clock Recovery Global Interrupt + DCD ECC_IRQHandler ; ECC diagnostic Global Interrupt + DCD SAI4_IRQHandler ; SAI4 global interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins + + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_AVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT FDCAN1_IT0_IRQHandler [WEAK] + EXPORT FDCAN2_IT0_IRQHandler [WEAK] + EXPORT FDCAN1_IT1_IRQHandler [WEAK] + EXPORT FDCAN2_IT1_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT FDCAN_CAL_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CRYP_IRQHandler [WEAK] + EXPORT HASH_RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT UART7_IRQHandler [WEAK] + EXPORT UART8_IRQHandler [WEAK] + EXPORT SPI4_IRQHandler [WEAK] + EXPORT SPI5_IRQHandler [WEAK] + EXPORT SPI6_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT LTDC_IRQHandler [WEAK] + EXPORT LTDC_ER_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT CEC_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT SPDIF_RX_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMAMUX1_OVR_IRQHandler [WEAK] + EXPORT HRTIM1_Master_IRQHandler [WEAK] + EXPORT HRTIM1_TIMA_IRQHandler [WEAK] + EXPORT HRTIM1_TIMB_IRQHandler [WEAK] + EXPORT HRTIM1_TIMC_IRQHandler [WEAK] + EXPORT HRTIM1_TIMD_IRQHandler [WEAK] + EXPORT HRTIM1_TIME_IRQHandler [WEAK] + EXPORT HRTIM1_FLT_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT SAI3_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TIM15_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT MDIOS_WKUP_IRQHandler [WEAK] + EXPORT MDIOS_IRQHandler [WEAK] + EXPORT JPEG_IRQHandler [WEAK] + EXPORT MDMA_IRQHandler [WEAK] + EXPORT SDMMC2_IRQHandler [WEAK] + EXPORT HSEM1_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT DMAMUX2_OVR_IRQHandler [WEAK] + EXPORT BDMA_Channel0_IRQHandler [WEAK] + EXPORT BDMA_Channel1_IRQHandler [WEAK] + EXPORT BDMA_Channel2_IRQHandler [WEAK] + EXPORT BDMA_Channel3_IRQHandler [WEAK] + EXPORT BDMA_Channel4_IRQHandler [WEAK] + EXPORT BDMA_Channel5_IRQHandler [WEAK] + EXPORT BDMA_Channel6_IRQHandler [WEAK] + EXPORT BDMA_Channel7_IRQHandler [WEAK] + EXPORT COMP1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT LPTIM3_IRQHandler [WEAK] + EXPORT LPTIM4_IRQHandler [WEAK] + EXPORT LPTIM5_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT ECC_IRQHandler [WEAK] + EXPORT SAI4_IRQHandler [WEAK] + EXPORT WAKEUP_PIN_IRQHandler [WEAK] + + +WWDG_IRQHandler +PVD_AVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +FDCAN1_IT0_IRQHandler +FDCAN2_IT0_IRQHandler +FDCAN1_IT1_IRQHandler +FDCAN2_IT1_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +FDCAN_CAL_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +CRYP_IRQHandler +HASH_RNG_IRQHandler +FPU_IRQHandler +UART7_IRQHandler +UART8_IRQHandler +SPI4_IRQHandler +SPI5_IRQHandler +SPI6_IRQHandler +SAI1_IRQHandler +LTDC_IRQHandler +LTDC_ER_IRQHandler +DMA2D_IRQHandler +SAI2_IRQHandler +QUADSPI_IRQHandler +LPTIM1_IRQHandler +CEC_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +SPDIF_RX_IRQHandler +OTG_FS_EP1_OUT_IRQHandler +OTG_FS_EP1_IN_IRQHandler +OTG_FS_WKUP_IRQHandler +OTG_FS_IRQHandler +DMAMUX1_OVR_IRQHandler +HRTIM1_Master_IRQHandler +HRTIM1_TIMA_IRQHandler +HRTIM1_TIMB_IRQHandler +HRTIM1_TIMC_IRQHandler +HRTIM1_TIMD_IRQHandler +HRTIM1_TIME_IRQHandler +HRTIM1_FLT_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +DFSDM1_FLT3_IRQHandler +SAI3_IRQHandler +SWPMI1_IRQHandler +TIM15_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +MDIOS_WKUP_IRQHandler +MDIOS_IRQHandler +JPEG_IRQHandler +MDMA_IRQHandler +SDMMC2_IRQHandler +HSEM1_IRQHandler +ADC3_IRQHandler +DMAMUX2_OVR_IRQHandler +BDMA_Channel0_IRQHandler +BDMA_Channel1_IRQHandler +BDMA_Channel2_IRQHandler +BDMA_Channel3_IRQHandler +BDMA_Channel4_IRQHandler +BDMA_Channel5_IRQHandler +BDMA_Channel6_IRQHandler +BDMA_Channel7_IRQHandler +COMP1_IRQHandler +LPTIM2_IRQHandler +LPTIM3_IRQHandler +LPTIM4_IRQHandler +LPTIM5_IRQHandler +LPUART1_IRQHandler +CRS_IRQHandler +ECC_IRQHandler +SAI4_IRQHandler +WAKEUP_PIN_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + diff --git a/Src/Communicaion.c b/Src/Communicaion.c new file mode 100644 index 0000000..2728cbf --- /dev/null +++ b/Src/Communicaion.c @@ -0,0 +1,493 @@ + +#include "cmsis_os.h" +#include "cmsis_os2.h" +#include "main.h" +#include "stdio.h" +#include "usb_device.h" +#include +#include +#include + +typedef struct +{ + const char *cmd; + int cmd_id; +} CmdTable; + +/* +自定义协议 +帧头 0xAA 55 +帧长度 1字节 +帧序号 1字节 +帧类型 1字节 +数据域 N字节 +帧校验 1字节 + +| 帧头 | 命令 | 长度 | 帧号 | 数据 (128B) | CRC16 | +|--------|------|--------|------|-------------|--------| +| AA 55 | 01 | 00 80 | 01 | [0xXX...] | 2字节 | + +| 帧头 | 命令 | 长度 | 帧号 | 数据 (128B) | CRC16 | +|--------|------|--------|------|-------------|--------| +| AA 55 | 04 | 00 80 | FF | 00 | +*/ +// extern uint8_t Uart_ReadCache[128]; +// extern _Bool ReadFlag; +// uint8_t CPk = 0; // 当前包计数 +// void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) +// { +// UNUSED(huart); +// __HAL_UART_CLEAR_OREFLAG(huart); +// __HAL_UART_CLEAR_IDLEFLAG(huart); +// if(__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) != RESET) // +// 空闲中断标记被置位 +// { +// __HAL_UART_CLEAR_IDLEFLAG(huart); // 清除中断标记 +// HAL_UART_DMAStop(huart); // 停止DMA接收 +// CPk = __HAL_DMA_GET_COUNTER(huart->hdmarx); // 总数据量 +// HAL_UARTEx_ReceiveToIdle_DMA(huart, Uart_ReadCache, 128); // +// 重新启动DMA接收 +// } + +// // if ((Uart_ReadCache[0] == 'C') && (Uart_ReadCache[1] == 'M') && +// (Uart_ReadCache[2] == 'D')) +// // { +// // char buf[10]; +// // uint16_t i,j,k= 0; + +// // HAL_GPIO_WritePin( GPIOA, GPIO_PIN_8, GPIO_PIN_SET); +// // for( k = 0; k < 8; k ++ ) +// // { +// // for( i = 0; i < 3; i ++) +// // { +// // for( j = 0; j < 98; j ++) +// // { +// // sprintf( buf, "%.4f\r\n", OutPut1[k][i][j]); +// // HAL_UART_Transmit(&huart, (uint8_t +// *)buf,strlen(buf),0xFFFF); +// // while(HAL_UART_GetState(&huart) == +// HAL_UART_STATE_BUSY_TX);//锟斤拷锟経ART锟斤拷锟酵斤拷锟斤拷 +// // } +// // } +// // } +// // ReadFlag = 1; +// // HAL_GPIO_WritePin( GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); +// // } +// // HAL_UARTEx_ReceiveToIdle_IT(&huart1, (uint8_t *)&Uart_ReadCache, 100); +// //锟劫匡拷锟斤拷锟斤拷锟斤拷锟叫讹拷 + +// } + +// #include "command.h" +// 假设每个通道每个频率点4字节(float)，每帧最大数据长度为120字节(30个float) +#define MAX_FRAME_DATA_LEN 120 +// 指令的最小长度 +#define COMMAND_MIN_LENGTH 4 +// 循环缓冲区大小 +#define BUFFER_SIZE 121 +// 循环缓冲区 +uint8_t buffer[BUFFER_SIZE]; +// 循环缓冲区读索引 +uint8_t readIndex = 0; +// 循环缓冲区写索引 +uint8_t writeIndex = 0; + +/** + * @brief 增加读索引 + * @param length 要增加的长度 + */ +void Command_AddReadIndex(uint8_t length) +{ + readIndex += length; + readIndex %= BUFFER_SIZE; +} + +/** + * @brief 读取第i位数据 超过缓存区长度自动循环 + * @param i 要读取的数据索引 + */ + +uint8_t Command_Read(uint8_t i) +{ + uint8_t index = i % BUFFER_SIZE; + return buffer[index]; +} + +/** + * @brief 计算未处理的数据长度 + * @return 未处理的数据长度 + * @retval 0 缓冲区为空 + * @retval 1~BUFFER_SIZE-1 未处理的数据长度 + * @retval BUFFER_SIZE 缓冲区已满 + */ +// uint8_t Command_GetLength() { +// // 读索引等于写索引时，缓冲区为空 +// if (readIndex == writeIndex) { +// return 0; +// } +// // 如果缓冲区已满,返回BUFFER_SIZE +// if (writeIndex + 1 == readIndex || (writeIndex == BUFFER_SIZE - 1 && +// readIndex == 0)) { +// return BUFFER_SIZE; +// } +// // 如果缓冲区未满,返回未处理的数据长度 +// if (readIndex <= writeIndex) { +// return writeIndex - readIndex; +// } else { +// return BUFFER_SIZE - readIndex + writeIndex; +// } +// } + +uint8_t Command_GetLength() { return (writeIndex + BUFFER_SIZE - readIndex) % BUFFER_SIZE; } + +/** + * @brief 计算缓冲区剩余空间 + * @return 剩余空间 + * @retval 0 缓冲区已满 + * @retval 1~BUFFER_SIZE-1 剩余空间 + * @retval BUFFER_SIZE 缓冲区为空 + */ +uint8_t Command_GetRemain() { return BUFFER_SIZE - Command_GetLength(); } + +/** + * @brief 向缓冲区写入数据 + * @param data 要写入的数据指针 + * @param length 要写入的数据长度 + * @return 写入的数据长度 + */ +uint8_t Command_Write(uint8_t *data, uint16_t length) +{ + // 如果缓冲区不足 则不写入数据 返回0 + if (Command_GetRemain() < length) + { + return 0; + } + // 使用memcpy函数将数据写入缓冲区 + if (writeIndex + length < BUFFER_SIZE) + { + memcpy(buffer + writeIndex, data, length); + writeIndex += length; + } + else + { + uint8_t firstLength = BUFFER_SIZE - writeIndex; + memcpy(buffer + writeIndex, data, firstLength); + memcpy(buffer, data + firstLength, length - firstLength); + writeIndex = length - firstLength; + } + return length; +} + +/** + * @brief 尝试获取一条指令 + * @param command 指令存放指针 + * @return 获取的指令长度 + * @retval 0 没有获取到指令 + */ +uint8_t Command_GetCommand(uint8_t *command) +{ + /* + | 帧头 | 命令 | 长度 | 帧号 | 数据 (128B) | CRC16 | + |--------|------|--------|------|-------------|--------| + | AA 55 | 04 | 80 | FF | 00 | + */ + // 寻找完整指令 + while (1) + { + // 如果缓冲区长度小于COMMAND_MIN_LENGTH 则不可能有完整的指令 + if (Command_GetLength() < COMMAND_MIN_LENGTH) + { + return 0; + } + // 如果不是包头 则跳过 重新开始寻找 + if (((Command_Read(readIndex) != 0xAA) || (Command_Read(readIndex + 1) != 0x55))) + { + Command_AddReadIndex(1); + continue; + } + // 如果缓冲区长度小于指令长度 则不可能有完整的指令 + uint8_t length = Command_Read(readIndex + 3); + if (Command_GetLength() < length) + { + return 0; + } + // 如果校验和不正确 则跳过 重新开始寻找 + uint16_t sum = 0; + for (uint8_t i = 0; i < length - 2; i++) + { + sum += Command_Read(readIndex + i); + } + if (sum != (Command_Read(readIndex + length - 2) << 8 | Command_Read(readIndex + length - 1))) + { + Command_AddReadIndex(1); + continue; + } + // 如果找到完整指令 则将指令写入command 返回指令长度 + for (uint8_t i = 0; i < length; i++) + { + command[i] = Command_Read(readIndex + i); + } + Command_AddReadIndex(length); + return length; + } +} +extern osSemaphoreId_t Command_Semaphore; +extern UART_HandleTypeDef huart1; +extern uint16_t CLKHZ[98]; +extern void CLKHZSET(uint16_t Deep); +extern float LineCheckF[32]; +union +{ + float ufloat; + uint32_t u32; + uint16_t u16[2]; + uint8_t u8[4]; +} uDataCover; + +uint16_t FramePack(uint8_t *buf, uint8_t cmd, uint8_t frameNum, uint8_t *data, uint16_t dataLength) +{ + uint8_t Lenth = 0; + uint16_t crcSum = 0; + memset(buf, 0, 128); + buf[0] = 0xAA; // 帧头 + buf[1] = 0x55; // 帧头 + buf[2] = cmd; // 命令 + buf[3] = 0x00; // 长度 + buf[4] = frameNum; // 帧号 + Lenth = 7; + + for (uint8_t i = 0; i < 5; i++) + { + crcSum += buf[i]; + } + for (uint8_t i = 0; i < dataLength; i++) + { + buf[i + 5] = data[i]; + crcSum += data[i]; + Lenth += 1; + } + buf[3] = Lenth; // 更新长度 + crcSum +=Lenth; + buf[Lenth - 2] = crcSum >> 8; // CRC高字节 + buf[Lenth - 1] = crcSum & 0xFF; // CRC低字节 + return Lenth; +} +struct uCommunication CommunicationData; +extern float OutPut1[8][4][98]; +extern float OutPut2[8][4][98]; +extern float OutPut3[8][4][98]; +extern float OutPut4[8][4][98]; +extern uint8_t Uart_ReadCache[128]; +uint8_t command[50]; +uint8_t SendBuf[128]; +int commandLength = 0; +uint8_t dtime = 10; +void Command_Deal(void) +{ + + osSemaphoreAcquire(Command_Semaphore, osWaitForever); // 等待命令信号量 + + + do + { + memset(command,0,50); + commandLength = Command_GetCommand(command); + if (commandLength == 0) + { + return; + } + uint8_t cmd = command[2]; // 获取命令 + uint8_t SenDataLenth = 0; + + switch (cmd) + { + case 1: // 开始测试命令 + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_RESET); + osDelay(50); + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); + CommunicationData.MeasurementPrecision = 0; + CommunicationData.MeasurementFlag = 1; + break; + case 2: // 终止测试命令 + CommunicationData.MeasurementPrecision = 0; + CommunicationData.MeasurementFlag = 0; + break; + case 3: // 设定深度 + CommunicationData.Deep = (command[5] << 8) | command[6]; + CLKHZSET(CommunicationData.Deep); + break; + case 4: // 设置增益 + CommunicationData.Gain = command[5]; + break; + case 5: // 设定通道数量 + CommunicationData.ChannelNum = command[5]; + break; + case 6: // 道接地信号强度测试命令 + CommunicationData.SingelStrengthMeasurementFlag = 1; + CommunicationData.MeasurementPrecision = 0; + break; + case 7: // 获取通道接地信号强度 + if (CommunicationData.MeasurementPrecision == 100.0f) + { + SenDataLenth = FramePack(SendBuf, 0x07, 0x01, (uint8_t *)LineCheckF, 16 * 4); + + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; // 等待UART发送完成 + osDelay(50); + + SenDataLenth = FramePack(SendBuf, 0x07, 0xFF, (uint8_t *)(LineCheckF + 16), 16 * 4); + + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + osDelay(100); + HAL_UARTEx_ReceiveToIdle_DMA(&huart1, Uart_ReadCache, 128); // 重新启动DMA接收 + } + break; + case 8: // 获取测量进度 + { + SenDataLenth = FramePack(SendBuf, 0x08, 0xFF, (uint8_t *)&CommunicationData.MeasurementPrecision, 1); + + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; // 等待UART发送完成 + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + break; + } + case 9: // 获取测量结果 + if (CommunicationData.MeasurementPrecision == 100.0f) + { + uint8_t totalChannels = CommunicationData.ChannelNum; + uint8_t totalFreqs = 0; + for (uint8_t i = 0; i < 98; i++) + { + if (CLKHZ[i] != 0) + totalFreqs++; + else + break; + } + uint32_t totalDataLen = totalChannels * totalFreqs * 4; + uint8_t frameNum = 1; + uint32_t sentLen = 0; + + while (sentLen < totalDataLen) + { + /** + * 根据剩余待发送数据长度，计算本次发送的数据长度，并组装数据帧。 + * + * 1. 计算本次发送的数据长度 sendLen，不超过 MAX_FRAME_DATA_LEN。 + * 2. 初始化数据缓冲区 dataBuf。 + * 3. 遍历每个待发送的 float 数据（每 4 字节为一个 float），根据 globalIdx 计算通道号 ch 和频点 freq。 + * 4. 根据通道号 ch 从对应的 OutPut 数组中获取数据 val。 + * - ch < 8: 从 OutPut1 取数据 + * - ch < 16: 从 OutPut2 取数据 + * - ch < 24: 从 OutPut3 取数据 + * - ch < 32: 从 OutPut4 取数据 + * 5. 将获取到的 float 数据 val 拷贝到 dataBuf 中，准备发送。 + * + * 参数说明： + * - totalDataLen: 总数据长度（字节） + * - sentLen: 已发送的数据长度（字节） + * - MAX_FRAME_DATA_LEN: 单帧最大数据长度（字节） + * - totalChannels: 总通道数 + * - OutPut1~4: 四组输出数据数组 + */ + uint32_t remain = totalDataLen - sentLen; + uint8_t sendLen = (remain > MAX_FRAME_DATA_LEN) ? MAX_FRAME_DATA_LEN : remain; + uint8_t dataBuf[MAX_FRAME_DATA_LEN]; + // 组装数据 + uint32_t dataIdx = 0; + uint32_t globalIdx = sentLen / 4; + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + osDelay(dtime); + for (uint8_t i = 0; i < sendLen / 4; i++) + { + uint8_t ch = (globalIdx % totalChannels); + uint8_t freq = (globalIdx / totalChannels); + float val = 0.0f; + if (ch < 8) + val = OutPut1[ch][0][freq]; + else if (ch < 16) + val = OutPut2[ch - 8][0][freq]; + else if (ch < 24) + val = OutPut3[ch - 16][0][freq]; + else if (ch < 32) + val = OutPut4[ch - 24][0][freq]; + memcpy(&dataBuf[dataIdx], &val, 4); + dataIdx += 4; + globalIdx++; + } + + uint8_t thisFrameNum = (sentLen + sendLen >= totalDataLen) ? 0xFF : frameNum; + SenDataLenth = FramePack(SendBuf, 0x09, thisFrameNum, dataBuf, sendLen); + + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; + sentLen += sendLen; + frameNum++; + } + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + osDelay(100); + HAL_UARTEx_ReceiveToIdle_DMA(&huart1, Uart_ReadCache, 128); // 重新启动DMA接收 + + } + break; + case 10: // 获取电池电压 + SenDataLenth = FramePack(SendBuf, 0x0A, 0x01, (uint8_t *)&CommunicationData.BatteryVoltage, 4); + + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; // 等待UART发送完成 + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + break; + case 11: // 获取电流 + SenDataLenth = FramePack(SendBuf, 0x0B, 0x01, (uint8_t *)&CommunicationData.BatteryCurrent, 4); + + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + HAL_UART_Transmit(&huart1, SendBuf, SenDataLenth, HAL_MAX_DELAY); + while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) + ; // 等待UART发送完成 + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + break; + } + } + while(commandLength != 0); +} + +/* + | 帧头 | 命令 | 长度 | 帧号 | 数据 (128B) | CRC16 | + |--------|------|--------|------|-------------|--------| + | AA 55 | 04 | 80 | FF | 00 | + +设定频率 +设置增益 +设定通道数量 +道接地信号强度测试命令 +获取通道接地信号强度 +开始测试命令 +终止测试命令 +获取测量进度 +获取测量结果 +获取电池电压 +获取电流 +CmdTable cmd_table[] = { + {"CMD_START", 1}, // 开始测试命令 + {"CMD_STOP", 2}, // 终止测试命令 + {"CMD_SET_FREQ", 3}, // 设定深度 + {"CMD_SET_GAIN", 4}, // 设置增益 + {"CMD_SET_CHANNELS", 5}, // 设定通道数量 + {"CMD_TEST_GROUND", 6}, // 道接地信号强度测试命令 + {"CMD_GET_GROUND", 7}, // 获取通道接地信号强度 + {"CMD_GET_PROGRESS", 8}, // 获取测量进度 + {"CMD_GET_RESULT", 9}, // 获取测量结果 + {"CMD_GET_BATTERY_VOLTAGE", 10}, // 获取电池电压 + {"CMD_GET_CURRENT", 11}, // 获取电流 + // ...更多命令 +}; +*/ diff --git a/Src/FlashRW.c b/Src/FlashRW.c new file mode 100644 index 0000000..2b1bc52 --- /dev/null +++ b/Src/FlashRW.c @@ -0,0 +1,53 @@ +#include "main.h" +#include "stm32h7xx_hal.h" + + + +void Store_Data_To_Flash(float *data, uint32_t size); +void Read_Data_From_Flash(float *data, uint32_t size); + + +void Store_Data_To_Flash(float *data, uint32_t size) +{ + HAL_StatusTypeDef status; + FLASH_EraseInitTypeDef erase_init; + uint32_t page_error; + + // Flash + HAL_FLASH_Unlock(); + + // ʼṹ +// erase_init.TypeErase = FLASH_TYPEERASE_SECTORS; + erase_init.Banks = FLASH_BANK_1; // For dual bank STM32H7 devices, select the appropriate bank + erase_init.Sector = FLASH_SECTOR_2; // Specify the starting sector + erase_init.NbSectors = (size * sizeof(float) + FLASH_SECTOR_SIZE - 1) / FLASH_SECTOR_SIZE; // ҪFlash + + // Flash + status = HAL_FLASHEx_Erase(&erase_init, &page_error); + if(status != HAL_OK) + { + // ʧܴ + } + + // дFlash + for (uint32_t i = 0; i < size; i++) + { + status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, FLASH_DATA_ADDRESS + i * sizeof(float), *((uint32_t *)(data + i))); + if(status != HAL_OK) + { + // дʧܴ + } + } + // Flash + HAL_FLASH_Lock(); +} + +void Read_Data_From_Flash(float *data, uint32_t size) +{ + // Flashжȡ + for (uint32_t i = 0; i < size; i ++) + { + data[i] = *(uint32_t *)(FLASH_DATA_ADDRESS + i); + } +} + diff --git a/Src/freertos.c b/Src/freertos.c new file mode 100644 index 0000000..4c1aa6f --- /dev/null +++ b/Src/freertos.c @@ -0,0 +1,59 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : freertos.c + * Description : Code for freertos applications + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "FreeRTOS.h" +#include "task.h" +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN Variables */ + +/* USER CODE END Variables */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN FunctionPrototypes */ + +/* USER CODE END FunctionPrototypes */ + +/* Private application code --------------------------------------------------*/ +/* USER CODE BEGIN Application */ + +/* USER CODE END Application */ + diff --git a/Src/main.c b/Src/main.c new file mode 100644 index 0000000..67485b5 --- /dev/null +++ b/Src/main.c @@ -0,0 +1,1942 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "cmsis_os.h" +#include "usb_device.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +// #include "arm_math.h" +#include "stm32h7xx_hal_pwr.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ +#include "stdio.h" +#include +#include + +#define ITM_PORT8(n) (*(volatile unsigned char *)(0xe0000000 + 4 * (n))) +#define ITM_PORT16(n) (*(volatile unsigned short *)(0xe0000000 + 4 * (n))) +#define ITM_PORT32(n) (*(volatile unsigned long *)(0xe0000000 + 4 * (n))) +#define DEMCR (*(volatile unsigned long *)(0xE000EDFC)) +#define TRCENA 0X01000000 + +int fputc(int ch, FILE *f) +{ + if (DEMCR & TRCENA) + { + while (ITM_PORT32(0) == 0) + ; + ITM_PORT8(0) = ch; + } + return ch; +} +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc3; +DMA_HandleTypeDef hdma_adc3; + +TIM_HandleTypeDef htim1; +TIM_HandleTypeDef htim2; +TIM_HandleTypeDef htim4; + +UART_HandleTypeDef huart1; +DMA_HandleTypeDef hdma_usart1_rx; + +DMA_HandleTypeDef hdma_memtomem_dma2_stream0; +/* Definitions for defaultTask */ +osThreadId_t defaultTaskHandle; + +/* USER CODE BEGIN PV */ +const osThreadAttr_t defaultTask_attributes = { + .name = "defaultTask", + .stack_size = 4096, + .priority = (osPriority_t)osPriorityNormal, +}; +const osThreadAttr_t CommunicationResponeTask_attributes = { + .name = "CommunicationResponeTask", + .stack_size = 4096, + .priority = (osPriority_t)osPriorityNormal, +}; +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_BDMA_Init(void); +static void MX_DMA_Init(void); +static void MX_ADC3_Init(void); +static void MX_USART1_UART_Init(void); +static void MX_TIM2_Init(void); +static void MX_TIM1_Init(void); +static void MX_TIM4_Init(void); +void StartDefaultTask(void *argument); + +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ +//_Bool ADC1Finish = 1; +//_Bool ADC2Finish = 1; +_Bool ADC3Finish = 1; +// uint32_t ADC3DataBuf[1024 * 10 / 2] __attribute__((section(".ADC3DataBufAddr"))); +// uint32_t ADC3DataBufTrans[4096 * 10 / 2] __attribute__((section(".ADC3DataBufTransAddr"))); +#define ADC3DataBuf ((uint32_t *)(D3_SRAM_BASE + 0x1000)) +#define ADC3DataBufTrans ((uint32_t *)(D1_AXISRAM_BASE + 0x50000)) +void ExitRun0Mode(void) {} +_Bool StartFlag = 0; +static uint8_t HFk = 0; +static uint8_t CPk = 0; +void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc) +{ + __HAL_DMA_CLEAR_FLAG(hadc3.DMA_Handle, BDMA_FLAG_HT0); + if (StartFlag) + { + if (hadc->Instance == ADC3) + { + if (HFk < 4) + { + if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK) + { + Error_Handler(); + } + HAL_DMA_Start(&hdma_memtomem_dma2_stream0, (uint32_t)(ADC3DataBuf), + (uint32_t)(ADC3DataBufTrans + 1024 * 10 * 2 * HFk / 4), 1024 * 10); + while (__HAL_DMA_GET_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_HTIF0_4) == RESET) + ; + __HAL_DMA_CLEAR_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_HTIF0_4); + __HAL_DMA_CLEAR_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_TCIF0_4); + HFk++; + } + else + { + HFk = 4; + } + } + } + else + { + HFk = 0; + } +} +void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) +{ + __HAL_DMA_CLEAR_FLAG(hadc3.DMA_Handle, BDMA_FLAG_TC0); + if (StartFlag) + { + + if (hadc->Instance == ADC3) + { + + if (CPk < 4) + { + if (HFk <= CPk) + return; + if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK) + { + Error_Handler(); + } + HAL_DMA_Start(&hdma_memtomem_dma2_stream0, (uint32_t)(ADC3DataBuf + 1024 * 10 / 4), + (uint32_t)(ADC3DataBufTrans + 1024 * 10 / 4 + 1024 * 10 * 2 * CPk / 4), 1024 * 10); + while (__HAL_DMA_GET_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_TCIF0_4) == RESET) + ; + __HAL_DMA_CLEAR_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_HTIF0_4); + __HAL_DMA_CLEAR_FLAG(&hdma_memtomem_dma2_stream0, DMA_FLAG_TCIF0_4); + CPk++; + if (CPk == 4) + { + ADC3Finish = 1; + StartFlag = 0; + } + } + else + { + CPk = 4; + ADC3Finish = 1; + StartFlag = 0; + } + } + } + else + { + CPk = 0; + } +} + +/* FFT相关参数，默认使用4096点FFT + * 可选范围为: 16, 64, 256, 1024, 4096 + */ +#define FFT_LENGTH 4096 + +uint16_t fft_inputbuf[FFT_LENGTH]; /* FFT输入缓冲区 */ +uint8_t Uart_ReadCache[128]; +_Bool ReadFlag = 0; +uint8_t gain = 0; +void CommunicationResponse(void *P_grg); +osSemaphoreId_t Command_Semaphore; +osSemaphoreId_t CommandResponse_Semaphore; +extern uint8_t Command_Write(uint8_t *data, uint16_t length); +extern uint8_t Command_GetCommand(uint8_t *command); + +void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) +{ + UNUSED(huart); +//HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_RESET); +//osDelay(10); +//HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); +// HAL_UART_DMAStop(huart); // 停止DMA接收 + if (Command_Write(Uart_ReadCache, Size) >= 4) + { + // 如果写入成功，释放信号量，允许其他线程获取 + osSemaphoreRelease(Command_Semaphore); + } + // 处理接收到的数据 +// HAL_UARTEx_ReceiveToIdle_DMA(huart, Uart_ReadCache, 128); // 重新启动DMA接收 +} + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + + /* USER CODE BEGIN 1 */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /*************************************************************************************** */ + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_BDMA_Init(); + MX_DMA_Init(); + MX_ADC3_Init(); + MX_USART1_UART_Init(); + MX_TIM2_Init(); + MX_TIM1_Init(); + MX_TIM4_Init(); + /* USER CODE BEGIN 2 */ + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + + /* USER CODE END 2 */ + + /* Init scheduler */ + osKernelInitialize(); + + /* USER CODE BEGIN RTOS_MUTEX */ + /* add mutexes, ... */ + /* USER CODE END RTOS_MUTEX */ + + /* USER CODE BEGIN RTOS_SEMAPHORES */ + /* add semaphores, ... */ + /* USER CODE END RTOS_SEMAPHORES */ + + /* USER CODE BEGIN RTOS_TIMERS */ + /* start timers, add new ones, ... */ + /* USER CODE END RTOS_TIMERS */ + + /* USER CODE BEGIN RTOS_QUEUES */ + + /* USER CODE END RTOS_QUEUES */ + + /* Create the thread(s) */ + /* creation of defaultTask */ + + defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); + + /* USER CODE BEGIN RTOS_THREADS */ + + + /* add threads, ... */ + /* USER CODE END RTOS_THREADS */ + + /* USER CODE BEGIN RTOS_EVENTS */ + /* add events, ... */ + /* USER CODE END RTOS_EVENTS */ + + /* Start scheduler */ + osKernelStart(); + + /* We should never get here as control is now taken by the scheduler */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) + { + } + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 192; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 15; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | + RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief ADC3 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC3_Init(void) +{ + + /* USER CODE BEGIN ADC3_Init 0 */ + + /* USER CODE END ADC3_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC3_Init 1 */ + + /* USER CODE END ADC3_Init 1 */ + + /** Common config + */ + hadc3.Instance = ADC3; + hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4; + hadc3.Init.Resolution = ADC_RESOLUTION_16B; + hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE; + hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; + hadc3.Init.LowPowerAutoWait = DISABLE; + hadc3.Init.ContinuousConvMode = DISABLE; + hadc3.Init.NbrOfConversion = 10; + hadc3.Init.DiscontinuousConvMode = DISABLE; + hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T4_TRGO; + hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR; + hadc3.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; + hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE; + hadc3.Init.OversamplingMode = DISABLE; + hadc3.Init.Oversampling.Ratio = 1; + if (HAL_ADC_Init(&hadc3) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_0; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + sConfig.OffsetSignedSaturation = DISABLE; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_2; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_5; + sConfig.Rank = ADC_REGULAR_RANK_3; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Rank = ADC_REGULAR_RANK_4; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_10; + sConfig.Rank = ADC_REGULAR_RANK_5; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_11; + sConfig.Rank = ADC_REGULAR_RANK_6; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_13; + sConfig.Rank = ADC_REGULAR_RANK_7; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_14; + sConfig.Rank = ADC_REGULAR_RANK_8; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_15; + sConfig.Rank = ADC_REGULAR_RANK_9; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_16; + sConfig.Rank = ADC_REGULAR_RANK_10; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC3_Init 2 */ + + /* USER CODE END ADC3_Init 2 */ +} + +/** + * @brief TIM1 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM1_Init(void) +{ + + /* USER CODE BEGIN TIM1_Init 0 */ + + /* USER CODE END TIM1_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + + /* USER CODE BEGIN TIM1_Init 1 */ + + /* USER CODE END TIM1_Init 1 */ + htim1.Instance = TIM1; + htim1.Init.Prescaler = 240000000 / 1000000 - 1; + htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + htim1.Init.Period = 100 - 1; + htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim1.Init.RepetitionCounter = 0; + htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 5; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; + sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + sBreakDeadTimeConfig.DeadTime = 0; + sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + sBreakDeadTimeConfig.BreakFilter = 0; + sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + sBreakDeadTimeConfig.Break2Filter = 0; + sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM1_Init 2 */ + + /* USER CODE END TIM1_Init 2 */ +} + +/** + * @brief TIM2 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM2_Init(void) +{ + + /* USER CODE BEGIN TIM2_Init 0 */ + + /* USER CODE END TIM2_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM2_Init 1 */ + + /* USER CODE END TIM2_Init 1 */ + htim2.Instance = TIM2; + htim2.Init.Prescaler = 240000000 / 1000000 - 1; + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + htim2.Init.Period = 100 - 1; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM2_Init 2 */ + + /* USER CODE END TIM2_Init 2 */ + HAL_TIM_MspPostInit(&htim2); +} + +/** + * @brief TIM4 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM4_Init(void) +{ + + /* USER CODE BEGIN TIM4_Init 0 */ + + /* USER CODE END TIM4_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + htim4.Init.Prescaler = 240000000 / 1000000 - 1; + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + htim4.Init.Period = 100 - 1; + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 5; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM4_Init 2 */ + + /* USER CODE END TIM4_Init 2 */ +} + +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ +} + +/** + * Enable DMA controller clock + */ +static void MX_BDMA_Init(void) +{ + + /* DMA controller clock enable */ + __HAL_RCC_BDMA_CLK_ENABLE(); + + /* DMA interrupt init */ + /* DMAMUX2_OVR_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMAMUX2_OVR_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMAMUX2_OVR_IRQn); + /* BDMA_Channel0_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn); +} + +/** + * Enable DMA controller clock + * Configure DMA for memory to memory transfers + * hdma_memtomem_dma2_stream0 + */ +static void MX_DMA_Init(void) +{ + + /* DMA controller clock enable */ + __HAL_RCC_DMA2_CLK_ENABLE(); + __HAL_RCC_DMA1_CLK_ENABLE(); + + /* Configure DMA request hdma_memtomem_dma2_stream0 on DMA2_Stream0 */ + hdma_memtomem_dma2_stream0.Instance = DMA2_Stream0; + hdma_memtomem_dma2_stream0.Init.Request = DMA_REQUEST_MEM2MEM; + hdma_memtomem_dma2_stream0.Init.Direction = DMA_MEMORY_TO_MEMORY; + hdma_memtomem_dma2_stream0.Init.PeriphInc = DMA_PINC_ENABLE; + hdma_memtomem_dma2_stream0.Init.MemInc = DMA_MINC_ENABLE; + hdma_memtomem_dma2_stream0.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_memtomem_dma2_stream0.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_memtomem_dma2_stream0.Init.Mode = DMA_NORMAL; + hdma_memtomem_dma2_stream0.Init.Priority = DMA_PRIORITY_LOW; + hdma_memtomem_dma2_stream0.Init.FIFOMode = DMA_FIFOMODE_ENABLE; + hdma_memtomem_dma2_stream0.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + hdma_memtomem_dma2_stream0.Init.MemBurst = DMA_MBURST_SINGLE; + hdma_memtomem_dma2_stream0.Init.PeriphBurst = DMA_PBURST_SINGLE; + if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK) + { + Error_Handler(); + } + + /* DMA interrupt init */ + /* DMA1_Stream5_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* USER CODE BEGIN MX_GPIO_Init_1 */ + /* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOC, GPIO_PIN_11, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7, + GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14, + GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); + + /*Configure GPIO pin : PA8 */ + GPIO_InitStruct.Pin = GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pin : PC11 */ + GPIO_InitStruct.Pin = GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /*Configure GPIO pins : PD0 PD1 PD3 PD4 + PD5 */ + GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /*Configure GPIO pins : PD2 PD7 */ + GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /*Configure GPIO pins : PG9 PG10 PG11 PG12 + PG13 PG14 */ + GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /*Configure GPIO pin : PI7 */ + GPIO_InitStruct.Pin = GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); + + /* USER CODE BEGIN MX_GPIO_Init_2 */ + /* USER CODE END MX_GPIO_Init_2 */ +} + +/* USER CODE BEGIN 4 */ +void LOWPower() +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) + { + } + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) + { + } + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 32; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 15; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | + RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + + MX_USART1_UART_Init(); +} + +uint16_t CLKHZ[98] = {5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, + 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1}; // 500mi +float BaseNiose[4]; +float BaseNioseGain[4]; +float OutPut1[8][4][98]; +float OutPut2[8][4][98]; +float OutPut3[8][4][98]; +float OutPut4[8][4][98]; +uint8_t CLKCount = 98; +float Datav; +void CLKHZSET(uint16_t Deep) +{ + switch (Deep) + { + case 150: + { + uint16_t HZ[98] = {5000, 4500, 4000, 3500, 3000, 2500, 2200, 2000, 1800, 1600, 1400, 1300, 1200, 1100, + 1000, 950, 900, 850, 800, 750, 700, 650, 600, 550, 500, 460, 400, 350, + 320, 300, 260, 230, 210, 190, 180, 170, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; // 500mi + memcpy(CLKHZ, HZ, sizeof(HZ)); + CLKCount = 36; + break; + } + case 600: + { + + uint16_t HZ[98] = {5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, + 400, 350, 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, + 85, 80, 77, 75, 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, + 61, 60, 59, 58, 57, 56, 55, 54, 45, 44, 43, 42, 41, 40, 39, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 + + }; + CLKCount = 60; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + case 800: + { + uint16_t HZ[98] = { + 5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + }; + CLKCount = 64; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + case 1200: + { + uint16_t HZ[98] = { + 5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + }; + CLKCount = 68; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + case 1500: + { + uint16_t HZ[98] = { + 5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + }; + CLKCount = 78; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + case 2000: + { + uint16_t HZ[98] = { + 5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, + 13, 12, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + }; + CLKCount = 88; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + default: + case 3000: + { + uint16_t HZ[98] = { + 5000, 4000, 3000, 2500, 2000, 1500, 1300, 1200, 1100, 1000, 900, 800, 700, 520, 460, 400, 350, + 300, 260, 230, 210, 190, 170, 160, 140, 130, 120, 110, 105, 90, 85, 80, 77, 75, + 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, + 55, 54, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, + 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, + }; + CLKCount = 98; + memcpy(CLKHZ, HZ, sizeof(HZ)); + break; + } + } +} + +_Bool CheckMaxV(uint16_t Vmv) +{ + uint8_t j, k = 0; + for (k = 0; k < 100; k++) + { + for (j = 0; j < 128; j++) + { + // for( i = 0; i < 14/2; i++) + // { + // if( ADC1DataBuf[i+j*7] /65535 *3300 > Vmv ) + // return 1; + // if( ADC1DataBuf[i+j*7]>>16 /65535 *3300 > Vmv ) + // return 1; + // } + // if( ADC2DataBuf[j] /65535 *3300 > Vmv ) + // return 1; + // if( ADC2DataBuf[j]>>16 /65535 *3300 > Vmv ) + // return 1; + // for( i = 0; i < 16/2; i++) + { + // if( ADC3DataBuf[7+j*8] /65535 *3300 > Vmv ) + // return 1; + Datav = (ADC3DataBuf[7 + j * 8] >> 16) / 65535.0f * 3300; + if (Datav > Vmv + 1650) + return 1; + Datav = (ADC3DataBuf[7 + j * 8] & 0x00FF) / 65535.0f * 3300; + if (Datav > Vmv + 1650) + return 1; + Datav = (ADC3DataBuf[6 + j * 8] >> 16) / 65535.0f * 3300; + if (Datav > Vmv + 1650) + return 1; + Datav = (ADC3DataBuf[6 + j * 8] & 0x00FF) / 65535.0f * 3300; + if (Datav > Vmv + 1650) + return 1; + Datav = (ADC3DataBuf[0 + j * 8] >> 16) / 65535.0f * 3300; + if (Datav > Vmv + 1650) + return 1; + } + } + } + return 0; +} + +void ChannelSelect(uint8_t Channel) +{ + switch (Channel) + { + default: + case 0: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET); + break; + case 1: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET); + break; + case 2: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET); + break; + case 3: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET); + break; + case 4: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET); + break; + case 5: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET); + break; + case 6: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET); + break; + case 7: + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_11, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET); + break; + } +} +void SampleRate_Set(uint32_t Rate) +{ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM4_Init 1 */ + + /* USER CODE END TIM4_Init 1 */ + htim4.Instance = TIM4; + htim4.Init.Prescaler = 240000000 / Rate / 100 - 1; + htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + htim4.Init.Period = 100 - 1; + htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 5; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } +} +void Clk_Set(uint16_t Clk) +{ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + htim2.Instance = TIM2; + if (Clk == 0) + { + HAL_TIM_PWM_Stop(&htim2, TIM_CHANNEL_1); + return; + } + + if (Clk < 5) + { + htim2.Init.Prescaler = 240000000 / (Clk * 100 * 100) - 1; + htim2.Init.Period = 100 - 1; + } + else + { + htim2.Init.Prescaler = 240000000 / (Clk * 10 * 100) - 1; + htim2.Init.Period = 10 - 1; + } + + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + if (Clk < 5) + { + + sConfigOC.Pulse = 50; + } + else + { + sConfigOC.Pulse = 5; + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + HAL_TIM_MspPostInit(&htim2); + + HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); +} +void SlopeSet(uint8_t Level) +{ + osDelay(100); + + switch (Level) + { + default: + case 0: // 1 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET); + break; + case 1: // 10 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET); + break; + case 2: // 100 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET); + break; + case 3: // 1000 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET); + break; + case 4: // 10000 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET); + break; + case 5: // 100000 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_5, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET); + break; + } + HAL_GPIO_WritePin(GPIOC, GPIO_PIN_11, GPIO_PIN_SET); + osDelay(100); + HAL_GPIO_WritePin(GPIOC, GPIO_PIN_11, GPIO_PIN_RESET); +} +uint16_t i, j = 0; +union floattouint16_t +{ // 32位float与16位uint16的联合体 + float f; + uint32_t u32; + uint16_t u16[2]; + uint8_t u8[4]; +}; +union floattouint16_t FtU; + +// 计算一个数组的平均值 +float calculateAverage(uint16_t arr[], int size) +{ + double sum = 0.0; + + // 累加 + int i; + for (i = 0; i < size; i++) + { + sum += arr[i]; + } + + // 计算平均值 + double average = sum / size; + + return average / 65535.0f * 3300 * 2.828; +} + +_Bool LineCheckResult[32]; +float LineCheckF[32]; +char bufx[80]; +void LineCheck(void) +{ + uint16_t i, j, k = 0; + float TempCheck; + CommunicationData.MeasurementPrecision = 0; + SampleRate_Set(4096 * 2); + HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_13, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_RESET); + for (j = 0; j < 8; j++) + { + CommunicationData.MeasurementPrecision = 96 / 3 / 8 * j; + HAL_ADC_Stop_DMA(&hadc3); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + ChannelSelect(j); + memset(ADC3DataBuf, 0, sizeof(ADC3DataBuf)); + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + osDelay(500); + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 2] >> 0); // CH1 + } + LineCheckF[j + 0] = calculateAverage(fft_inputbuf, 1024); + + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 2] >> 16); // CH2 + } + LineCheckF[j + 8] = calculateAverage(fft_inputbuf, 1024); + + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 0] >> 16); // CH3 + } + LineCheckF[j + 16] = calculateAverage(fft_inputbuf, 1024); + + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 0] >> 0); // CH4 + } + LineCheckF[j + 24] = calculateAverage(fft_inputbuf, 1024); + } + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_13, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_SET); + for (j = 0; j < 8; j++) + { + CommunicationData.MeasurementPrecision = 96 / 3 / 8 * j + 30; + HAL_ADC_Stop_DMA(&hadc3); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + ChannelSelect(j); + memset(ADC3DataBuf, 0, sizeof(ADC3DataBuf)); + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + for (i = 0; i < 50; i++) + { + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_RESET); + osDelay(5); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_SET); + osDelay(5); + } + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 2] >> 0); // CH1 + } + TempCheck = calculateAverage(fft_inputbuf, 1024); + LineCheckF[j + 0] = (TempCheck > LineCheckF[j + 0] ? (TempCheck - LineCheckF[j + 0]) : 0); + if (LineCheckF[j + 0] > 100) + { + LineCheckResult[j + 0] = 1; + } + else + { + LineCheckResult[j + 0] = 0; + } + + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 0] >> 16); // CH3 + } + TempCheck = calculateAverage(fft_inputbuf, 1024); + LineCheckF[j + 16] = (TempCheck > LineCheckF[j + 16] ? (TempCheck - LineCheckF[j + 16]) : 0); + if (LineCheckF[j + 16] > 100) + { + LineCheckResult[j + 16] = 1; + } + else + { + LineCheckResult[j + 16] = 0; + } + } + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // A1 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); // A0 + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_13, GPIO_PIN_RESET); // A1 + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_SET); // A0 + for (j = 0; j < 8; j++) + { + CommunicationData.MeasurementPrecision = 96 / 3 / 8 * j + 60; + HAL_ADC_Stop_DMA(&hadc3); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + ChannelSelect(j); + memset(ADC3DataBuf, 0, sizeof(ADC3DataBuf)); + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + for (i = 0; i < 50; i++) + { + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + osDelay(5); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + osDelay(5); + } + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 2] >> 16); // CH2 + } + TempCheck = calculateAverage(fft_inputbuf, 1024); + LineCheckF[j + 8] = (TempCheck > LineCheckF[j + 8] ? (TempCheck - LineCheckF[j + 8]) : 0); + if (LineCheckF[j + 8] > 100) + { + LineCheckResult[j + 8] = 1; + } + else + { + LineCheckResult[j + 8] = 0; + } + + for (k = 0; k < 1024; k++) + { + fft_inputbuf[k] = (uint16_t)(ADC3DataBuf[k * 5 + 0] >> 0); // CH4 + } + TempCheck = calculateAverage(fft_inputbuf, 1024); + LineCheckF[j + 24] = (TempCheck > LineCheckF[j + 24] ? (TempCheck - LineCheckF[j + 24]) : 0); + if (LineCheckF[j + 24] > 100) + { + LineCheckResult[j + 24] = 1; + } + else + { + LineCheckResult[j + 24] = 0; + } + } + + HAL_TIM_PWM_Stop(&htim2, TIM_CHANNEL_1); +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); +// osDelay(500); +// sprintf(bufx, "%s\r\n", "\r\n\r\n\r\n----------------------接线测试----------------------\r\n"); +// HAL_UART_Transmit(&huart1, (uint8_t *)bufx, strlen(bufx), 0xFFFF); +// while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) +// ; // 等待UART发送完成 +// osDelay(3000); +// for (i = 0; i < 32; i++) +// { + +// sprintf(bufx, "通道%02d: %.1f\r\n", i + 1, LineCheckF[i]); +// HAL_UART_Transmit(&huart1, (uint8_t *)bufx, strlen(bufx), 0xFFFF); +// while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) +// ; // 等待UART发送完成 +// } +// for (i = 0; i < 32; i++) +// { + +// sprintf(bufx, "通道%02d: %d\r\n", i + 1, LineCheckResult[i]); +// HAL_UART_Transmit(&huart1, (uint8_t *)bufx, strlen(bufx), 0xFFFF); +// while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX) +// ; // 等待UART发送完成 +// } + ReadFlag = 1; +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); +// HAL_UARTEx_ReceiveToIdle_IT(&huart1, (uint8_t *)&Uart_ReadCache, 100); // 锟劫匡拷锟斤拷锟斤拷锟斤拷锟叫讹拷 + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_RESET); + osDelay(1000); + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_13, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_RESET); + CommunicationData.MeasurementPrecision = 100; +} + +extern void Command_Deal(void); +float FindMaxValue(float *data, uint16_t length) +{ + float maxValue = data[0]; + for (uint16_t i = 1; i < length; i++) + { + if (data[i] > maxValue) + { + maxValue = data[i]; + } + } + if(maxValue < 0.05) + { + maxValue = data[2]; + + } + return maxValue; +} +void CommunicationResponse(void *P_grg) +{ + float FindmaxDatabuf[4]; + for (;;) + { + + osSemaphoreAcquire(CommandResponse_Semaphore, osWaitForever); + + if (CommunicationData.MeasurementFlag) + { + uint8_t l, m, n = 0; + CommunicationData.MeasurementPrecision = 0; + SampleRate_Set(4096 * 2); + HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + HAL_ADC_Stop_DMA(&hadc3); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + ChannelSelect(0); + Clk_Set(CLKHZ[0]); + osDelay(1000); // 10 + SlopeSet(2); +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); + HFk = 0; + CPk = 0; + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + + for (l = 0; l < CLKCount; l++) + { + if (!CommunicationData.MeasurementFlag) + break; + CommunicationData.MeasurementPrecision = 100.0 / CLKCount * l; + + osDelay(10); // 10 + for (m = 0; m < 8; m++) + { + if (!CommunicationData.MeasurementFlag) + break; + for (n = 0; n < 3; n++) + { + if (!CommunicationData.MeasurementFlag) + break; + if (l >= 90) + osDelay(2000); // 10 + else + osDelay(200); // 10 + ADC3Finish = 0; + StartFlag = 1; + do + { + osDelay(30); + } while (!ADC3Finish); + + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + HAL_ADC_Stop_DMA(&hadc3); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + if (n < 2) + { + SlopeSet(n + 3); + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + } + else + { + if ((m == 7) && (l < 97)) + { + Clk_Set(CLKHZ[l + 1]); + } + ChannelSelect(m + 1); + SlopeSet(2); + if ((m == 7) && (l < 97)) + { + } + HFk = 0; + CPk = 0; + if (l >= 90) + { + SampleRate_Set(4096 / 2); + osDelay(1500); // 10 + } + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); + } + + int x = 0; + for (x = 0; x < FFT_LENGTH; x++) + { + fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 0); // CH1 + } + OutPut1[m][n][l] = (calculateAverage(fft_inputbuf, FFT_LENGTH)) / pow(10, n + 2);// - BaseNioseGain[0]; + if (OutPut1[m][n][l] < 0) + OutPut1[m][n][l] = 0; + for (x = 0; x < FFT_LENGTH; x++) + { + fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 16); // CH2 + } + OutPut2[m][n][l] = (calculateAverage(fft_inputbuf, FFT_LENGTH) ) / pow(10, n + 2);// - BaseNioseGain[1]; + if (OutPut2[m][n][l] < 0) + OutPut2[m][n][l] = 0; + for (x = 0; x < FFT_LENGTH; x++) + { + fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 0); // CH3 + } + OutPut3[m][n][l] = (calculateAverage(fft_inputbuf, FFT_LENGTH) ) / pow(10, n + 2);// - BaseNioseGain[2]; + if (OutPut3[m][n][l] < 0) + OutPut3[m][n][l] = 0; + for (x = 0; x < FFT_LENGTH; x++) + { + fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 16); // CH4 + } + OutPut4[m][n][l] = (calculateAverage(fft_inputbuf, FFT_LENGTH) ) / pow(10, n + 2);// - BaseNioseGain[3]; + if (OutPut4[m][n][l] < 0) + OutPut4[m][n][l] = 0; + } + } + } + for (l = 0; l < CLKCount; l++) + { + for (m = 0; m < 8; m++) + { + FindmaxDatabuf[0] = OutPut1[m][0][l]; + FindmaxDatabuf[1] = OutPut1[m][1][l]; + FindmaxDatabuf[2] = OutPut1[m][2][l]; +// FindmaxDatabuf[3] = OutPut1[m][3][l]; + OutPut1[m][0][l] = FindMaxValue(FindmaxDatabuf, 3); + FindmaxDatabuf[0] = OutPut2[m][0][l]; + FindmaxDatabuf[1] = OutPut2[m][1][l]; + FindmaxDatabuf[2] = OutPut2[m][2][l]; +// FindmaxDatabuf[3] = OutPut2[m][3][l]; + OutPut2[m][0][l] = FindMaxValue(FindmaxDatabuf, 3); + FindmaxDatabuf[0] = OutPut3[m][0][l]; + FindmaxDatabuf[1] = OutPut3[m][1][l]; + FindmaxDatabuf[2] = OutPut3[m][2][l]; +// FindmaxDatabuf[3] = OutPut3[m][3][l]; + OutPut3[m][0][l] = FindMaxValue(FindmaxDatabuf, 3); + FindmaxDatabuf[0] = OutPut4[m][0][l]; + FindmaxDatabuf[1] = OutPut4[m][1][l]; + FindmaxDatabuf[2] = OutPut4[m][2][l]; +// FindmaxDatabuf[3] = OutPut4[m][3][l]; + OutPut4[m][0][l] = FindMaxValue(FindmaxDatabuf, 3); + } + } + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); + HAL_ADC_Stop_DMA(&hadc3); + + + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_RESET); + osDelay(1500); + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); + if (!CommunicationData.MeasurementFlag) + { + CommunicationData.MeasurementPrecision = 0; + CommunicationData.MeasurementFlag = 0; + } + else + { + CommunicationData.MeasurementPrecision = 100; + CommunicationData.MeasurementFlag = 0; + } + } + if (CommunicationData.SingelStrengthMeasurementFlag) + { + LineCheck(); + CommunicationData.SingelStrengthMeasurementFlag = 0; + } + } +} +/* USER CODE END 4 */ + +/* USER CODE BEGIN Header_StartDefaultTask */ +/** + * @brief Function implementing the defaultTask thread. + * @param argument: Not used + * @retval None + */ +#include "usbd_cdc_if.h" +/* USER CODE END Header_StartDefaultTask */ +void StartDefaultTask(void *argument) +{ + /* init code for USB_DEVICE */ +// MX_USB_DEVICE_Init(); + /* USER CODE BEGIN 5 */ + /* Infinite loop */ + CommunicationData.Deep = 150; // 默认深度150 + CommunicationData.ChannelNum = 8; // 默认通道数8 + HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_13, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOG, GPIO_PIN_14, GPIO_PIN_RESET); + HAL_TIM_PWM_Stop(&htim2, TIM_CHANNEL_1); + SlopeSet(0); + Clk_Set(CLKHZ[0]); + HAL_TIM_PWM_Stop(&htim2, TIM_CHANNEL_1); + + osDelay(5000); // 10 + HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED); + HAL_ADCEx_Calibration_Start(&hadc3, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED); + HAL_ADC_Start_DMA(&hadc3, ADC3DataBuf, 1024 * 10); + HAL_UARTEx_ReceiveToIdle_DMA(&huart1, Uart_ReadCache, 128); // 开启DMA串口接收 + __HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE); // 开启空闲中断 /* USER CODE END RTOS_EVENTS */ + __HAL_DMA_DISABLE_IT(&hdma_usart1_rx, DMA_IT_HT); // 禁止半传输完成中断 + CommandResponse_Semaphore = osSemaphoreNew(1, 0, NULL); // 创建命令响应信号量，初始值为0，最大值为1 + Command_Semaphore = osSemaphoreNew(1, 0, NULL); // 创建信号量，初始值为0，最大值为1 + // osThreadId_t communicationTaskHandle = + osThreadNew(CommunicationResponse, NULL, &CommunicationResponeTask_attributes); + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + +// HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); +// osDelay(500); // 10 +// { +// ADC3Finish = 0; +// StartFlag = 1; +// do +// { +// osDelay(50); +// } while (!ADC3Finish); +// HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); +// int x = 0; + +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 0); // CH1 +// } +// BaseNiose[0] = calculateAverage(fft_inputbuf, FFT_LENGTH); +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 16); // CH2 +// } +// BaseNiose[1] = calculateAverage(fft_inputbuf, FFT_LENGTH); +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 0); // CH3 +// } +// BaseNiose[2] = calculateAverage(fft_inputbuf, FFT_LENGTH); +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 16); // CH4 +// } +// BaseNiose[3] = calculateAverage(fft_inputbuf, FFT_LENGTH); +// } + + + + +// +// SlopeSet(4); +// Clk_Set(CLKHZ[0]); +// osDelay(1000); // 10 + +// HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); +// osDelay(500); // 10 +// { +// ADC3Finish = 0; +// StartFlag = 1; +// do +// { +// osDelay(50); +// } while (!ADC3Finish); +// HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_1); +// int x = 0; + +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 0); // CH1 +// } +// BaseNioseGain[0] = (calculateAverage(fft_inputbuf, FFT_LENGTH) - BaseNiose[0]) / 10000.0f; +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 3] >> 16); // CH2 +// } +// BaseNioseGain[1] = (calculateAverage(fft_inputbuf, FFT_LENGTH) - BaseNiose[1]) / 10000.0f; +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 0); // CH3 +// } +// BaseNioseGain[2] = (calculateAverage(fft_inputbuf, FFT_LENGTH) - BaseNiose[2]) / 10000.0f; +// for (x = 0; x < FFT_LENGTH; x++) +// { +// fft_inputbuf[x] = (uint16_t)(ADC3DataBufTrans[x * 5 + 4] >> 16); // CH4 +// } +// BaseNioseGain[3] = (calculateAverage(fft_inputbuf, FFT_LENGTH) - BaseNiose[3]) / 10000.0f; +// } + + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_RESET); + osDelay(500); + HAL_GPIO_WritePin(GPIOI, GPIO_PIN_7, GPIO_PIN_SET); + + + +// char buf[80]; + +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); +// sprintf(buf, "%.4f,%.4f,%.4f,%.4f,%.4f,%.4f,%.4f,%.4f,\r\n", BaseNiose[0],BaseNiose[1],BaseNiose[2],BaseNiose[3],BaseNioseGain[0],BaseNioseGain[1],BaseNioseGain[2],BaseNioseGain[3]); +// HAL_UART_Transmit(&huart1, (uint8_t *)buf, strlen(buf), HAL_MAX_DELAY); +// while (HAL_UART_GetState(&huart1) == HAL_UART_STATE_BUSY_TX); +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); + while (1) + { + + Command_Deal(); + osSemaphoreRelease(CommandResponse_Semaphore); + osDelay(300); // + } + + // LOWPower(); + + /* USER CODE END 5 */ +} + +/** + * @brief Period elapsed callback in non blocking mode + * @note This function is called when TIM7 interrupt took place, inside + * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment + * a global variable "uwTick" used as application time base. + * @param htim : TIM handle + * @retval None + */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +{ + /* USER CODE BEGIN Callback 0 */ + + /* USER CODE END Callback 0 */ + if (htim->Instance == TIM7) + { + HAL_IncTick(); + } + /* USER CODE BEGIN Callback 1 */ + + /* USER CODE END Callback 1 */ +} + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/Src/stm32h7xx_hal_msp.c b/Src/stm32h7xx_hal_msp.c new file mode 100644 index 0000000..e700cc1 --- /dev/null +++ b/Src/stm32h7xx_hal_msp.c @@ -0,0 +1,454 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_hal_msp.c + * @brief This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ +extern DMA_HandleTypeDef hdma_adc3; + +extern DMA_HandleTypeDef hdma_usart1_rx; + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + + /* System interrupt init*/ + /* PendSV_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** + * @brief ADC MSP Initialization + * This function configures the hardware resources used in this example + * @param hadc: ADC handle pointer + * @retval None + */ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + HAL_DMA_MuxSyncConfigTypeDef pSyncConfig; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(hadc->Instance==ADC3) + { + /* USER CODE BEGIN ADC3_MspInit 0 */ + + /* USER CODE END ADC3_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC; + PeriphClkInitStruct.PLL2.PLL2M = 5; + PeriphClkInitStruct.PLL2.PLL2N = 144; + PeriphClkInitStruct.PLL2.PLL2P = 10; + PeriphClkInitStruct.PLL2.PLL2Q = 2; + PeriphClkInitStruct.PLL2.PLL2R = 2; + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE; + PeriphClkInitStruct.PLL2.PLL2FRACN = 0; + PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_ADC3_CLK_ENABLE(); + + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + /**ADC3 GPIO Configuration + PF3 ------> ADC3_INP5 + PC0 ------> ADC3_INP10 + PC1 ------> ADC3_INP11 + PC2_C ------> ADC3_INP0 + PC3_C ------> ADC3_INP1 + PH2 ------> ADC3_INP13 + PH3 ------> ADC3_INP14 + PH4 ------> ADC3_INP15 + PH5 ------> ADC3_INP16 + */ + GPIO_InitStruct.Pin = GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + + HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_OPEN); + + HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_OPEN); + + /* ADC3 DMA Init */ + /* ADC3 Init */ + hdma_adc3.Instance = BDMA_Channel0; + hdma_adc3.Init.Request = BDMA_REQUEST_ADC3; + hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_adc3.Init.MemInc = DMA_MINC_ENABLE; + hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; + hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; + hdma_adc3.Init.Mode = DMA_CIRCULAR; + hdma_adc3.Init.Priority = DMA_PRIORITY_LOW; + if (HAL_DMA_Init(&hdma_adc3) != HAL_OK) + { + Error_Handler(); + } + + pSyncConfig.SyncSignalID = HAL_DMAMUX2_SYNC_EXTI0; + pSyncConfig.SyncPolarity = HAL_DMAMUX_SYNC_NO_EVENT; + pSyncConfig.SyncEnable = DISABLE; + pSyncConfig.EventEnable = ENABLE; + pSyncConfig.RequestNumber = 1; + if (HAL_DMAEx_ConfigMuxSync(&hdma_adc3, &pSyncConfig) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc3); + + /* USER CODE BEGIN ADC3_MspInit 1 */ + + /* USER CODE END ADC3_MspInit 1 */ + + } + +} + +/** + * @brief ADC MSP De-Initialization + * This function freeze the hardware resources used in this example + * @param hadc: ADC handle pointer + * @retval None + */ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + if(hadc->Instance==ADC3) + { + /* USER CODE BEGIN ADC3_MspDeInit 0 */ + + /* USER CODE END ADC3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ADC3_CLK_DISABLE(); + + /**ADC3 GPIO Configuration + PF3 ------> ADC3_INP5 + PC0 ------> ADC3_INP10 + PC1 ------> ADC3_INP11 + PC2_C ------> ADC3_INP0 + PC3_C ------> ADC3_INP1 + PH2 ------> ADC3_INP13 + PH3 ------> ADC3_INP14 + PH4 ------> ADC3_INP15 + PH5 ------> ADC3_INP16 + */ + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_3); + + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1); + + HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5); + + /* ADC3 DMA DeInit */ + HAL_DMA_DeInit(hadc->DMA_Handle); + /* USER CODE BEGIN ADC3_MspDeInit 1 */ + + /* USER CODE END ADC3_MspDeInit 1 */ + } + +} + +/** + * @brief TIM_Base MSP Initialization + * This function configures the hardware resources used in this example + * @param htim_base: TIM_Base handle pointer + * @retval None + */ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM1) + { + /* USER CODE BEGIN TIM1_MspInit 0 */ + + /* USER CODE END TIM1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM1_CLK_ENABLE(); + /* USER CODE BEGIN TIM1_MspInit 1 */ + + /* USER CODE END TIM1_MspInit 1 */ + } + else if(htim_base->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspInit 0 */ + + /* USER CODE END TIM2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM2_CLK_ENABLE(); + /* USER CODE BEGIN TIM2_MspInit 1 */ + + /* USER CODE END TIM2_MspInit 1 */ + } + else if(htim_base->Instance==TIM4) + { + /* USER CODE BEGIN TIM4_MspInit 0 */ + + /* USER CODE END TIM4_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM4_CLK_ENABLE(); + /* USER CODE BEGIN TIM4_MspInit 1 */ + + /* USER CODE END TIM4_MspInit 1 */ + } + +} + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(htim->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspPostInit 0 */ + + /* USER CODE END TIM2_MspPostInit 0 */ + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**TIM2 GPIO Configuration + PA15 (JTDI) ------> TIM2_CH1 + */ + GPIO_InitStruct.Pin = GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM2_MspPostInit 1 */ + + /* USER CODE END TIM2_MspPostInit 1 */ + } + +} +/** + * @brief TIM_Base MSP De-Initialization + * This function freeze the hardware resources used in this example + * @param htim_base: TIM_Base handle pointer + * @retval None + */ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM1) + { + /* USER CODE BEGIN TIM1_MspDeInit 0 */ + + /* USER CODE END TIM1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM1_CLK_DISABLE(); + /* USER CODE BEGIN TIM1_MspDeInit 1 */ + + /* USER CODE END TIM1_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspDeInit 0 */ + + /* USER CODE END TIM2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM2_CLK_DISABLE(); + /* USER CODE BEGIN TIM2_MspDeInit 1 */ + + /* USER CODE END TIM2_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM4) + { + /* USER CODE BEGIN TIM4_MspDeInit 0 */ + + /* USER CODE END TIM4_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM4_CLK_DISABLE(); + /* USER CODE BEGIN TIM4_MspDeInit 1 */ + + /* USER CODE END TIM4_MspDeInit 1 */ + } + +} + +/** + * @brief UART MSP Initialization + * This function configures the hardware resources used in this example + * @param huart: UART handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USART1 DMA Init */ + /* USART1_RX Init */ + hdma_usart1_rx.Instance = DMA1_Stream5; + hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX; + hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart1_rx.Init.Mode = DMA_NORMAL; + hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); + + /* USART1 interrupt Init */ + HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(USART1_IRQn); + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + + } + +} + +/** + * @brief UART MSP De-Initialization + * This function freeze the hardware resources used in this example + * @param huart: UART handle pointer + * @retval None + */ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); + + /* USART1 DMA DeInit */ + HAL_DMA_DeInit(huart->hdmarx); + + /* USART1 interrupt DeInit */ + HAL_NVIC_DisableIRQ(USART1_IRQn); + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Src/stm32h7xx_hal_timebase_tim.c b/Src/stm32h7xx_hal_timebase_tim.c new file mode 100644 index 0000000..6d550ba --- /dev/null +++ b/Src/stm32h7xx_hal_timebase_tim.c @@ -0,0 +1,130 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_hal_timebase_TIM.c + * @brief HAL time base based on the hardware TIM. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32h7xx_hal.h" +#include "stm32h7xx_hal_tim.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +TIM_HandleTypeDef htim7; +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief This function configures the TIM7 as a time base source. + * The time source is configured to have 1ms time base with a dedicated + * Tick interrupt priority. + * @note This function is called automatically at the beginning of program after + * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). + * @param TickPriority: Tick interrupt priority. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) +{ + RCC_ClkInitTypeDef clkconfig; + uint32_t uwTimclock, uwAPB1Prescaler; + uint32_t uwPrescalerValue; + uint32_t pFLatency; + + /*Configure the TIM7 IRQ priority */ + if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + { + HAL_NVIC_SetPriority(TIM7_IRQn, TickPriority ,0); + + /* Enable the TIM7 global Interrupt */ + HAL_NVIC_EnableIRQ(TIM7_IRQn); + uwTickPrio = TickPriority; + } + else + { + return HAL_ERROR; + } + + /* Enable TIM7 clock */ + __HAL_RCC_TIM7_CLK_ENABLE(); + + /* Get clock configuration */ + HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); + + /* Get APB1 prescaler */ + uwAPB1Prescaler = clkconfig.APB1CLKDivider; + /* Compute TIM7 clock */ + if (uwAPB1Prescaler == RCC_HCLK_DIV1) + { + uwTimclock = HAL_RCC_GetPCLK1Freq(); + } + else + { + uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq(); + } + + /* Compute the prescaler value to have TIM7 counter clock equal to 1MHz */ + uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); + + /* Initialize TIM7 */ + htim7.Instance = TIM7; + + /* Initialize TIMx peripheral as follow: + * Period = [(TIM7CLK/1000) - 1]. to have a (1/1000) s time base. + * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. + * ClockDivision = 0 + * Counter direction = Up + */ + htim7.Init.Period = (1000000U / 1000U) - 1U; + htim7.Init.Prescaler = uwPrescalerValue; + htim7.Init.ClockDivision = 0; + htim7.Init.CounterMode = TIM_COUNTERMODE_UP; + + if(HAL_TIM_Base_Init(&htim7) == HAL_OK) + { + /* Start the TIM time Base generation in interrupt mode */ + return HAL_TIM_Base_Start_IT(&htim7); + } + + /* Return function status */ + return HAL_ERROR; +} + +/** + * @brief Suspend Tick increment. + * @note Disable the tick increment by disabling TIM7 update interrupt. + * @param None + * @retval None + */ +void HAL_SuspendTick(void) +{ + /* Disable TIM7 update Interrupt */ + __HAL_TIM_DISABLE_IT(&htim7, TIM_IT_UPDATE); +} + +/** + * @brief Resume Tick increment. + * @note Enable the tick increment by Enabling TIM7 update interrupt. + * @param None + * @retval None + */ +void HAL_ResumeTick(void) +{ + /* Enable TIM7 Update interrupt */ + __HAL_TIM_ENABLE_IT(&htim7, TIM_IT_UPDATE); +} + diff --git a/Src/stm32h7xx_it.c b/Src/stm32h7xx_it.c new file mode 100644 index 0000000..81baaef --- /dev/null +++ b/Src/stm32h7xx_it.c @@ -0,0 +1,261 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32h7xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +extern PCD_HandleTypeDef hpcd_USB_OTG_FS; +extern DMA_HandleTypeDef hdma_adc3; +extern DMA_HandleTypeDef hdma_usart1_rx; +extern UART_HandleTypeDef huart1; +extern TIM_HandleTypeDef htim7; + +/* USER CODE BEGIN EV */ +extern uint32_t ADC1DataBuf[1024*14/2]; +extern uint32_t ADC2DataBuf[1024*2/2]; +extern uint32_t ADC3DataBuf[1024*16/2]; +extern uint32_t ADC1DataBufTrans[4096*14/2]; +extern uint32_t ADC2DataBufTrans[4096*2/2]; +extern uint32_t ADC3DataBufTrans[4096*16/2]; +extern DMA_HandleTypeDef hdma_memtomem_dma2_stream0; +extern uint8_t Uart_ReadCache[128]; + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) + { + } + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32H7xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32h7xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles DMA1 stream5 global interrupt. + */ +void DMA1_Stream5_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ + + /* USER CODE END DMA1_Stream5_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart1_rx); + /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ + + /* USER CODE END DMA1_Stream5_IRQn 1 */ +} + +/** + * @brief This function handles USART1 global interrupt. + */ +void USART1_IRQHandler(void) +{ + /* USER CODE BEGIN USART1_IRQn 0 */ + /* USER CODE END USART1_IRQn 0 */ + HAL_UART_IRQHandler(&huart1); + /* USER CODE BEGIN USART1_IRQn 1 */ +// HAL_UART_DMAStop(&huart1); // ֹͣDMA + HAL_UARTEx_ReceiveToIdle_DMA(&huart1, Uart_ReadCache, 128); // DMA + /* USER CODE END USART1_IRQn 1 */ +} + +/** + * @brief This function handles TIM7 global interrupt. + */ +void TIM7_IRQHandler(void) +{ + /* USER CODE BEGIN TIM7_IRQn 0 */ + + /* USER CODE END TIM7_IRQn 0 */ + HAL_TIM_IRQHandler(&htim7); + /* USER CODE BEGIN TIM7_IRQn 1 */ + + /* USER CODE END TIM7_IRQn 1 */ +} + +/** + * @brief This function handles USB On The Go FS global interrupt. + */ +void OTG_FS_IRQHandler(void) +{ + /* USER CODE BEGIN OTG_FS_IRQn 0 */ + + /* USER CODE END OTG_FS_IRQn 0 */ + HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); + /* USER CODE BEGIN OTG_FS_IRQn 1 */ + + /* USER CODE END OTG_FS_IRQn 1 */ +} + +/** + * @brief This function handles DMAMUX2 overrun interrupt. + */ +void DMAMUX2_OVR_IRQHandler(void) +{ + /* USER CODE BEGIN DMAMUX2_OVR_IRQn 0 */ + + /* USER CODE END DMAMUX2_OVR_IRQn 0 */ + // Handle BDMA_Channel0 + HAL_DMAEx_MUX_IRQHandler(&hdma_adc3); + /* USER CODE BEGIN DMAMUX2_OVR_IRQn 1 */ + + /* USER CODE END DMAMUX2_OVR_IRQn 1 */ +} + +/** + * @brief This function handles BDMA channel0 global interrupt. + */ +void BDMA_Channel0_IRQHandler(void) +{ + /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */ + + /* USER CODE END BDMA_Channel0_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_adc3); + /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */ + + /* USER CODE END BDMA_Channel0_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Src/syscalls.c b/Src/syscalls.c new file mode 100644 index 0000000..e10d76f --- /dev/null +++ b/Src/syscalls.c @@ -0,0 +1,244 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeMX + * @brief Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib or Picolibc libc-manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + + return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _open(char *path, int flags, ...) +{ + (void)path; + (void)flags; + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + (void)status; + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + (void)name; + errno = ENOENT; + return -1; +} + +clock_t _times(struct tms *buf) +{ + (void)buf; + return -1; +} + +int _stat(const char *file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + (void)old; + (void)new; + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + (void)name; + (void)argv; + (void)env; + errno = ENOMEM; + return -1; +} + +// --- Picolibc Specific Section --- +#if defined(__PICOLIBC__) + +/** + * @brief Picolibc helper function to output a character to a FILE stream. + * This redirects the output to the low-level __io_putchar function. + * @param c Character to write. + * @param file FILE stream pointer (ignored). + * @retval int The character written. + */ +static int starm_putc(char c, FILE *file) +{ + (void) file; + __io_putchar(c); + return c; +} + +/** + * @brief Picolibc helper function to input a character from a FILE stream. + * This redirects the input from the low-level __io_getchar function. + * @param file FILE stream pointer (ignored). + * @retval int The character read, cast to an unsigned char then int. + */ +static int starm_getc(FILE *file) +{ + unsigned char c; + (void) file; + c = __io_getchar(); + return c; +} + +// Define and initialize the standard I/O streams for Picolibc. +// FDEV_SETUP_STREAM connects the starm_putc and starm_getc helper functions to a FILE structure. +// _FDEV_SETUP_RW indicates the stream is for reading and writing. +static FILE __stdio = FDEV_SETUP_STREAM(starm_putc, + starm_getc, + NULL, + _FDEV_SETUP_RW); + +// Assign the standard stream pointers (stdin, stdout, stderr) to the initialized stream. +// Picolibc uses these pointers for standard I/O operations (printf, scanf, etc.). +FILE *const stdin = &__stdio; +__strong_reference(stdin, stdout); +__strong_reference(stdin, stderr); + +// Create strong aliases mapping standard C library function names (without underscore) +// to the implemented system call stubs (with underscore). Picolibc uses these +// standard names internally, so this linking is required. +__strong_reference(_read, read); +__strong_reference(_write, write); +__strong_reference(_times, times); +__strong_reference(_execve, execve); +__strong_reference(_fork, fork); +__strong_reference(_link, link); +__strong_reference(_unlink, unlink); +__strong_reference(_stat, stat); +__strong_reference(_wait, wait); +__strong_reference(_open, open); +__strong_reference(_close, close); +__strong_reference(_lseek, lseek); +__strong_reference(_isatty, isatty); +__strong_reference(_fstat, fstat); +__strong_reference(_exit, exit); +__strong_reference(_kill, kill); +__strong_reference(_getpid, getpid); + +#endif //__PICOLIBC__ diff --git a/Src/sysmem.c b/Src/sysmem.c new file mode 100644 index 0000000..a875d42 --- /dev/null +++ b/Src/sysmem.c @@ -0,0 +1,87 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeMX + * @brief System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the Newlib or Picolibc libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) + { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) + { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} + +#if defined(__PICOLIBC__) + // Picolibc expects syscalls without the leading underscore. + // This creates a strong alias so that + // calls to `sbrk()` are resolved to our `_sbrk()` implementation. + __strong_reference(_sbrk, sbrk); +#endif diff --git a/Src/system_stm32h7xx.c b/Src/system_stm32h7xx.c new file mode 100644 index 0000000..f024f51 --- /dev/null +++ b/Src/system_stm32h7xx.c @@ -0,0 +1,450 @@ +/** + ****************************************************************************** + * @file system_stm32h7xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32h7xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock, it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32h7xx_system + * @{ + */ + +/** @addtogroup STM32H7xx_System_Private_Includes + * @{ + */ + +#include "stm32h7xx.h" +#include + +#if !defined (HSE_VALUE) +#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (CSI_VALUE) +#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +#if !defined (HSI_VALUE) +#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */ +/* #define DATA_IN_D2_SRAM */ + +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +#if defined(DUAL_CORE) && defined(CORE_CM4) +/*!< Uncomment the following line if you need to relocate your vector Table + in D2 AXI SRAM else user remap will be done in FLASH BANK2. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#endif /* VECT_TAB_SRAM */ +#else +/*!< Uncomment the following line if you need to relocate your vector Table + in D1 AXI SRAM else user remap will be done in FLASH BANK1. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#endif /* VECT_TAB_SRAM */ +#endif /* DUAL_CORE && CORE_CM4 */ +#endif /* USER_VECT_TAB_ADDRESS */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Variables + * @{ + */ +/* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. +*/ +uint32_t SystemCoreClock = 480000000; +uint32_t SystemD2Clock = 64000000; +const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting and vector table location + * configuration. + * @param None + * @retval None + */ +void SystemInit (void) +{ +#if defined (DATA_IN_D2_SRAM) + __IO uint32_t tmpreg; +#endif /* DATA_IN_D2_SRAM */ + + /* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ +#endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + + /* Increasing the CPU frequency */ + if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); + } + + /* Set HSION bit */ + RCC->CR |= RCC_CR_HSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEAF6ED7FU; + + /* Decreasing the number of wait states because of lower CPU frequency */ + if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); + } + +#if defined(D3_SRAM_BASE) + /* Reset D1CFGR register */ + RCC->D1CFGR = 0x00000000; + + /* Reset D2CFGR register */ + RCC->D2CFGR = 0x00000000; + + /* Reset D3CFGR register */ + RCC->D3CFGR = 0x00000000; +#else + /* Reset CDCFGR1 register */ + RCC->CDCFGR1 = 0x00000000; + + /* Reset CDCFGR2 register */ + RCC->CDCFGR2 = 0x00000000; + + /* Reset SRDCFGR register */ + RCC->SRDCFGR = 0x00000000; +#endif + /* Reset PLLCKSELR register */ + RCC->PLLCKSELR = 0x02020200; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x01FF0000; + /* Reset PLL1DIVR register */ + RCC->PLL1DIVR = 0x01010280; + /* Reset PLL1FRACR register */ + RCC->PLL1FRACR = 0x00000000; + + /* Reset PLL2DIVR register */ + RCC->PLL2DIVR = 0x01010280; + + /* Reset PLL2FRACR register */ + + RCC->PLL2FRACR = 0x00000000; + /* Reset PLL3DIVR register */ + RCC->PLL3DIVR = 0x01010280; + + /* Reset PLL3FRACR register */ + RCC->PLL3FRACR = 0x00000000; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000; + +#if (STM32H7_DEV_ID == 0x450UL) + /* dual core CM7 or single core line */ + if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) + { + /* if stm32h7 revY*/ + /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ + *((__IO uint32_t*)0x51008108) = 0x000000001U; + } +#endif /* STM32H7_DEV_ID */ + +#if defined(DATA_IN_D2_SRAM) + /* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */ +#if defined(RCC_AHB2ENR_D2SRAM3EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN); +#elif defined(RCC_AHB2ENR_D2SRAM2EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN); +#else + RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN); +#endif /* RCC_AHB2ENR_D2SRAM3EN */ + + tmpreg = RCC->AHB2ENR; + (void) tmpreg; +#endif /* DATA_IN_D2_SRAM */ + +#if defined(DUAL_CORE) && defined(CORE_CM4) + /* Configure the Vector Table location add offset address for cortex-M4 ------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */ +#endif /* USER_VECT_TAB_ADDRESS */ + +#else + /* + * Disable the FMC bank1 (enabled after reset). + * This, prevents CPU speculation access on this bank which blocks the use of FMC during + * 24us. During this time the others FMC master (such as LTDC) cannot use it! + */ + FMC_Bank1_R->BTCR[0] = 0x000030D2; + + /* Configure the Vector Table location -------------------------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */ +#endif /* USER_VECT_TAB_ADDRESS */ + +#endif /*DUAL_CORE && CORE_CM4*/ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock , it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*) + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*), + * HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors. + * + * (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 64 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp; + uint32_t common_system_clock; + float_t fracn1, pllvco; + + + /* Get SYSCLK source -------------------------------------------------------*/ + + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ + common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)); + break; + + case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */ + common_system_clock = CSI_VALUE; + break; + + case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ + common_system_clock = HSE_VALUE; + break; + + case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); + pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; + pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); + fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); + + if (pllm != 0U) + { + switch (pllsource) + { + case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */ + + hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; + pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + + break; + + case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */ + pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */ + pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + default: + hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; + pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + } + pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ; + common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp); + } + else + { + common_system_clock = 0U; + } + break; + + default: + common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)); + break; + } + + /* Compute SystemClock frequency --------------------------------------------------*/ +#if defined (RCC_D1CFGR_D1CPRE) + tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); + +#else + tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU)); + +#endif + +#if defined(DUAL_CORE) && defined(CORE_CM4) + SystemCoreClock = SystemD2Clock; +#else + SystemCoreClock = common_system_clock; +#endif /* DUAL_CORE && CORE_CM4 */ +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/Src/usb_device.c b/Src/usb_device.c new file mode 100644 index 0000000..9a86291 --- /dev/null +++ b/Src/usb_device.c @@ -0,0 +1,101 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usb_device.c + * @version : v1.0_Cube + * @brief : This file implements the USB Device + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ + +#include "usb_device.h" +#include "usbd_core.h" +#include "usbd_desc.h" +#include "usbd_cdc.h" +#include "usbd_cdc_if.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN PV */ +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE END PV */ + +/* USER CODE BEGIN PFP */ +/* Private function prototypes -----------------------------------------------*/ + +/* USER CODE END PFP */ + +/* USB Device Core handle declaration. */ +USBD_HandleTypeDef hUsbDeviceFS; + +/* + * -- Insert your variables declaration here -- + */ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* + * -- Insert your external function declaration here -- + */ +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** + * Init USB device Library, add supported class and start the library + * @retval None + */ +void MX_USB_DEVICE_Init(void) +{ + /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ + + /* USER CODE END USB_DEVICE_Init_PreTreatment */ + + /* Init Device Library, add supported class and start the library. */ + if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) + { + Error_Handler(); + } + if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) + { + Error_Handler(); + } + if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) + { + Error_Handler(); + } + if (USBD_Start(&hUsbDeviceFS) != USBD_OK) + { + Error_Handler(); + } + + /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ + HAL_PWREx_EnableUSBVoltageDetector(); + + /* USER CODE END USB_DEVICE_Init_PostTreatment */ +} + +/** + * @} + */ + +/** + * @} + */ + diff --git a/Src/usbd_cdc_if.c b/Src/usbd_cdc_if.c new file mode 100644 index 0000000..68f2cfb --- /dev/null +++ b/Src/usbd_cdc_if.c @@ -0,0 +1,328 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_cdc_if.c + * @version : v1.0_Cube + * @brief : Usb device for Virtual Com Port. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_cdc_if.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE END PV */ + +/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY + * @brief Usb device library. + * @{ + */ + +/** @addtogroup USBD_CDC_IF + * @{ + */ + +/** @defgroup USBD_CDC_IF_Private_TypesDefinitions USBD_CDC_IF_Private_TypesDefinitions + * @brief Private types. + * @{ + */ + +/* USER CODE BEGIN PRIVATE_TYPES */ + +/* USER CODE END PRIVATE_TYPES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Private_Defines USBD_CDC_IF_Private_Defines + * @brief Private defines. + * @{ + */ + +/* USER CODE BEGIN PRIVATE_DEFINES */ +/* USER CODE END PRIVATE_DEFINES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Private_Macros USBD_CDC_IF_Private_Macros + * @brief Private macros. + * @{ + */ + +/* USER CODE BEGIN PRIVATE_MACRO */ + +/* USER CODE END PRIVATE_MACRO */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Private_Variables USBD_CDC_IF_Private_Variables + * @brief Private variables. + * @{ + */ +/* Create buffer for reception and transmission */ +/* It's up to user to redefine and/or remove those define */ +/** Received data over USB are stored in this buffer */ +uint8_t UserRxBufferFS[APP_RX_DATA_SIZE]; + +/** Data to send over USB CDC are stored in this buffer */ +uint8_t UserTxBufferFS[APP_TX_DATA_SIZE]; + +/* USER CODE BEGIN PRIVATE_VARIABLES */ + +/* USER CODE END PRIVATE_VARIABLES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables + * @brief Public variables. + * @{ + */ + +extern USBD_HandleTypeDef hUsbDeviceFS; + +/* USER CODE BEGIN EXPORTED_VARIABLES */ + +/* USER CODE END EXPORTED_VARIABLES */ + +/** + * @} + */ + +/** @defgroup USBD_CDC_IF_Private_FunctionPrototypes USBD_CDC_IF_Private_FunctionPrototypes + * @brief Private functions declaration. + * @{ + */ + +static int8_t CDC_Init_FS(void); +static int8_t CDC_DeInit_FS(void); +static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length); +static int8_t CDC_Receive_FS(uint8_t* pbuf, uint32_t *Len); +static int8_t CDC_TransmitCplt_FS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum); + +/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ + +/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */ + +/** + * @} + */ + +USBD_CDC_ItfTypeDef USBD_Interface_fops_FS = +{ + CDC_Init_FS, + CDC_DeInit_FS, + CDC_Control_FS, + CDC_Receive_FS, + CDC_TransmitCplt_FS +}; + +/* Private functions ---------------------------------------------------------*/ +/** + * @brief Initializes the CDC media low layer over the FS USB IP + * @retval USBD_OK if all operations are OK else USBD_FAIL + */ +static int8_t CDC_Init_FS(void) +{ + /* USER CODE BEGIN 3 */ + /* Set Application Buffers */ + USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); + USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); + return (USBD_OK); + /* USER CODE END 3 */ +} + +/** + * @brief DeInitializes the CDC media low layer + * @retval USBD_OK if all operations are OK else USBD_FAIL + */ +static int8_t CDC_DeInit_FS(void) +{ + /* USER CODE BEGIN 4 */ + return (USBD_OK); + /* USER CODE END 4 */ +} + +/** + * @brief Manage the CDC class requests + * @param cmd: Command code + * @param pbuf: Buffer containing command data (request parameters) + * @param length: Number of data to be sent (in bytes) + * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL + */ +static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) +{ + /* USER CODE BEGIN 5 */ + switch(cmd) + { + case CDC_SEND_ENCAPSULATED_COMMAND: + + break; + + case CDC_GET_ENCAPSULATED_RESPONSE: + + break; + + case CDC_SET_COMM_FEATURE: + + break; + + case CDC_GET_COMM_FEATURE: + + break; + + case CDC_CLEAR_COMM_FEATURE: + + break; + + /*******************************************************************************/ + /* Line Coding Structure */ + /*-----------------------------------------------------------------------------*/ + /* Offset | Field | Size | Value | Description */ + /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/ + /* 4 | bCharFormat | 1 | Number | Stop bits */ + /* 0 - 1 Stop bit */ + /* 1 - 1.5 Stop bits */ + /* 2 - 2 Stop bits */ + /* 5 | bParityType | 1 | Number | Parity */ + /* 0 - None */ + /* 1 - Odd */ + /* 2 - Even */ + /* 3 - Mark */ + /* 4 - Space */ + /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */ + /*******************************************************************************/ + case CDC_SET_LINE_CODING: + + break; + + case CDC_GET_LINE_CODING: + + break; + + case CDC_SET_CONTROL_LINE_STATE: + + break; + + case CDC_SEND_BREAK: + + break; + + default: + break; + } + + return (USBD_OK); + /* USER CODE END 5 */ +} + +/** + * @brief Data received over USB OUT endpoint are sent over CDC interface + * through this function. + * + * @note + * This function will issue a NAK packet on any OUT packet received on + * USB endpoint until exiting this function. If you exit this function + * before transfer is complete on CDC interface (ie. using DMA controller) + * it will result in receiving more data while previous ones are still + * not sent. + * + * @param Buf: Buffer of data to be received + * @param Len: Number of data received (in bytes) + * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL + */ +static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) +{ + /* USER CODE BEGIN 6 */ + USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); + USBD_CDC_ReceivePacket(&hUsbDeviceFS); + return (USBD_OK); + /* USER CODE END 6 */ +} + +/** + * @brief CDC_Transmit_FS + * Data to send over USB IN endpoint are sent over CDC interface + * through this function. + * @note + * + * + * @param Buf: Buffer of data to be sent + * @param Len: Number of data to be sent (in bytes) + * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY + */ +uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) +{ + uint8_t result = USBD_OK; + /* USER CODE BEGIN 7 */ + USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; + if (hcdc->TxState != 0){ + return USBD_BUSY; + } + USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); + result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); + /* USER CODE END 7 */ + return result; +} + +/** + * @brief CDC_TransmitCplt_FS + * Data transmitted callback + * + * @note + * This function is IN transfer complete callback used to inform user that + * the submitted Data is successfully sent over USB. + * + * @param Buf: Buffer of data to be received + * @param Len: Number of data received (in bytes) + * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL + */ +static int8_t CDC_TransmitCplt_FS(uint8_t *Buf, uint32_t *Len, uint8_t epnum) +{ + uint8_t result = USBD_OK; + /* USER CODE BEGIN 13 */ + UNUSED(Buf); + UNUSED(Len); + UNUSED(epnum); + /* USER CODE END 13 */ + return result; +} + +/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */ + +/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/Src/usbd_conf.c b/Src/usbd_conf.c new file mode 100644 index 0000000..7c5c926 --- /dev/null +++ b/Src/usbd_conf.c @@ -0,0 +1,693 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_conf.c + * @version : v1.0_Cube + * @brief : This file implements the board support package for the USB device library + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32h7xx.h" +#include "stm32h7xx_hal.h" +#include "usbd_def.h" +#include "usbd_core.h" +#include "usbd_cdc.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE END PV */ + +PCD_HandleTypeDef hpcd_USB_OTG_FS; +void Error_Handler(void); + +/* External functions --------------------------------------------------------*/ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* USER CODE BEGIN PFP */ +/* Private function prototypes -----------------------------------------------*/ +USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status); + +/* USER CODE END PFP */ + +/* Private functions ---------------------------------------------------------*/ + +/* USER CODE BEGIN 1 */ +/* USER CODE END 1 */ + +/******************************************************************************* + LL Driver Callbacks (PCD -> USB Device Library) +*******************************************************************************/ +/* MSP Init */ + +void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(pcdHandle->Instance==USB_OTG_FS) + { + /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ + + /* USER CODE END USB_OTG_FS_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Enable USB Voltage detector + */ + HAL_PWREx_EnableUSBVoltageDetector(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USB_OTG_FS GPIO Configuration + PA11 ------> USB_OTG_FS_DM + PA12 ------> USB_OTG_FS_DP + */ + GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + /* Peripheral interrupt init */ + HAL_NVIC_SetPriority(OTG_FS_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(OTG_FS_IRQn); + /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ + + /* USER CODE END USB_OTG_FS_MspInit 1 */ + } +} + +void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle) +{ + if(pcdHandle->Instance==USB_OTG_FS) + { + /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */ + + /* USER CODE END USB_OTG_FS_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); + + /**USB_OTG_FS GPIO Configuration + PA11 ------> USB_OTG_FS_DM + PA12 ------> USB_OTG_FS_DP + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); + + /* Peripheral interrupt Deinit*/ + HAL_NVIC_DisableIRQ(OTG_FS_IRQn); + + /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ + + /* USER CODE END USB_OTG_FS_MspDeInit 1 */ + } +} + +/** + * @brief Setup stage callback + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); +} + +/** + * @brief Data Out stage callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint number + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#else +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); +} + +/** + * @brief Data In stage callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint number + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#else +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief Reset callback. + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_SpeedTypeDef speed = USBD_SPEED_FULL; + + if ( hpcd->Init.speed == PCD_SPEED_HIGH) + { + speed = USBD_SPEED_HIGH; + } + else if ( hpcd->Init.speed == PCD_SPEED_FULL) + { + speed = USBD_SPEED_FULL; + } + else + { + Error_Handler(); + } + /* Set Speed. */ + USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); + + /* Reset Device. */ + USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief Suspend callback. + * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + /* Inform USB library that core enters in suspend Mode. */ + USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); + __HAL_PCD_GATE_PHYCLOCK(hpcd); + /* Enter in STOP mode. */ + /* USER CODE BEGIN 2 */ + if (hpcd->Init.low_power_enable) + { + /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ + SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); + } + /* USER CODE END 2 */ +} + +/** + * @brief Resume callback. + * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + /* USER CODE BEGIN 3 */ + + /* USER CODE END 3 */ + USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief ISOOUTIncomplete callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint number + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#else +void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); +} + +/** + * @brief ISOINIncomplete callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint number + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#else +void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); +} + +/** + * @brief Connect callback. + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief Disconnect callback. + * @param hpcd: PCD handle + * @retval None + */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +#else +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +{ + USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); +} + +/******************************************************************************* + LL Driver Interface (USB Device Library --> PCD) +*******************************************************************************/ + +/** + * @brief Initializes the low level portion of the device driver. + * @param pdev: Device handle + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) +{ + /* Init USB Ip. */ + if (pdev->id == DEVICE_FS) { + /* Link the driver to the stack. */ + hpcd_USB_OTG_FS.pData = pdev; + pdev->pData = &hpcd_USB_OTG_FS; + + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + hpcd_USB_OTG_FS.Init.dev_endpoints = 9; + hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; + hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; + hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; + hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; + hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; + hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE; + hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; + hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; + if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) + { + Error_Handler( ); + } + +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + /* Register USB PCD CallBacks */ + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback); + HAL_PCD_RegisterCallback(&hpcd_USB_OTG_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback); + + HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_OTG_FS, PCD_DataOutStageCallback); + HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_OTG_FS, PCD_DataInStageCallback); + HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback); + HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback); +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + /* USER CODE BEGIN TxRx_Configuration */ + HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80); + HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40); + HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80); + /* USER CODE END TxRx_Configuration */ + } + return USBD_OK; +} + +/** + * @brief De-Initializes the low level portion of the device driver. + * @param pdev: Device handle + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_DeInit(pdev->pData); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Starts the low level portion of the device driver. + * @param pdev: Device handle + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_Start(pdev->pData); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Stops the low level portion of the device driver. + * @param pdev: Device handle + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_Stop(pdev->pData); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Opens an endpoint of the low level driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @param ep_type: Endpoint type + * @param ep_mps: Endpoint max packet size + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Closes an endpoint of the low level driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Flushes an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Sets a Stall condition on an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Clears a Stall condition on an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Returns Stall condition. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval Stall (1: Yes, 0: No) + */ +uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; + + if((ep_addr & 0x80) == 0x80) + { + return hpcd->IN_ep[ep_addr & 0x7F].is_stall; + } + else + { + return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; + } +} + +/** + * @brief Assigns a USB address to the device. + * @param pdev: Device handle + * @param dev_addr: Device address + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Transmits data over an endpoint. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @param pbuf: Pointer to data to be sent + * @param size: Data size + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Prepares an endpoint for reception. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @param pbuf: Pointer to data to be received + * @param size: Data size + * @retval USBD status + */ +USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) +{ + HAL_StatusTypeDef hal_status = HAL_OK; + USBD_StatusTypeDef usb_status = USBD_OK; + + hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); + + usb_status = USBD_Get_USB_Status(hal_status); + + return usb_status; +} + +/** + * @brief Returns the last transferred packet size. + * @param pdev: Device handle + * @param ep_addr: Endpoint number + * @retval Received Data Size + */ +uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); +} + +#ifdef USBD_HS_TESTMODE_ENABLE +/** + * @brief Set High speed Test mode. + * @param pdev: Device handle + * @param testmode: test mode + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_SetTestMode(USBD_HandleTypeDef *pdev, uint8_t testmode) +{ + UNUSED(pdev); + UNUSED(testmode); + + return USBD_OK; +} +#endif /* USBD_HS_TESTMODE_ENABLE */ +/** + * @brief Static single allocation. + * @param size: Size of allocated memory + * @retval None + */ +void *USBD_static_malloc(uint32_t size) +{ + UNUSED(size); + static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ + return mem; +} + +/** + * @brief Dummy memory free + * @param p: Pointer to allocated memory address + * @retval None + */ +void USBD_static_free(void *p) +{ + UNUSED(p); +} + +/** + * @brief Delays routine for the USB device library. + * @param Delay: Delay in ms + * @retval None + */ +void USBD_LL_Delay(uint32_t Delay) +{ + HAL_Delay(Delay); +} + +/** + * @brief Returns the USB status depending on the HAL status: + * @param hal_status: HAL status + * @retval USB status + */ +USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) +{ + USBD_StatusTypeDef usb_status = USBD_OK; + + switch (hal_status) + { + case HAL_OK : + usb_status = USBD_OK; + break; + case HAL_ERROR : + usb_status = USBD_FAIL; + break; + case HAL_BUSY : + usb_status = USBD_BUSY; + break; + case HAL_TIMEOUT : + usb_status = USBD_FAIL; + break; + default : + usb_status = USBD_FAIL; + break; + } + return usb_status; +} diff --git a/Src/usbd_desc.c b/Src/usbd_desc.c new file mode 100644 index 0000000..65692b7 --- /dev/null +++ b/Src/usbd_desc.c @@ -0,0 +1,418 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : usbd_desc.c + * @version : v1.0_Cube + * @brief : This file implements the USB device descriptors. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_core.h" +#include "usbd_desc.h" +#include "usbd_conf.h" + +/* USER CODE BEGIN INCLUDE */ + +/* USER CODE END INCLUDE */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE END PV */ + +/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY + * @{ + */ + +/** @addtogroup USBD_DESC + * @{ + */ + +/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions + * @brief Private types. + * @{ + */ + +/* USER CODE BEGIN PRIVATE_TYPES */ + +/* USER CODE END PRIVATE_TYPES */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines + * @brief Private defines. + * @{ + */ + +#define USBD_VID 1155 +#define USBD_LANGID_STRING 1033 +#define USBD_MANUFACTURER_STRING "STMicroelectronics" +#define USBD_PID_FS 22336 +#define USBD_PRODUCT_STRING_FS "STM32 Virtual ComPort" +#define USBD_CONFIGURATION_STRING_FS "CDC Config" +#define USBD_INTERFACE_STRING_FS "CDC Interface" + +#define USB_SIZ_BOS_DESC 0x0C + +/* USER CODE BEGIN PRIVATE_DEFINES */ + +/* USER CODE END PRIVATE_DEFINES */ + +/** + * @} + */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros + * @brief Private macros. + * @{ + */ + +/* USER CODE BEGIN PRIVATE_MACRO */ + +/* USER CODE END PRIVATE_MACRO */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes + * @brief Private functions declaration. + * @{ + */ + +static void Get_SerialNum(void); +static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len); + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes + * @brief Private functions declaration for FS. + * @{ + */ + +uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables + * @brief Private variables. + * @{ + */ + +USBD_DescriptorsTypeDef FS_Desc = +{ + USBD_FS_DeviceDescriptor +, USBD_FS_LangIDStrDescriptor +, USBD_FS_ManufacturerStrDescriptor +, USBD_FS_ProductStrDescriptor +, USBD_FS_SerialStrDescriptor +, USBD_FS_ConfigStrDescriptor +, USBD_FS_InterfaceStrDescriptor +}; + +#if defined ( __ICCARM__ ) /* IAR Compiler */ + #pragma data_alignment=4 +#endif /* defined ( __ICCARM__ ) */ +/** USB standard device descriptor. */ +__ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = +{ + 0x12, /*bLength */ + USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ + 0x00, /*bcdUSB */ + 0x02, + 0x02, /*bDeviceClass*/ + 0x02, /*bDeviceSubClass*/ + 0x00, /*bDeviceProtocol*/ + USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ + LOBYTE(USBD_VID), /*idVendor*/ + HIBYTE(USBD_VID), /*idVendor*/ + LOBYTE(USBD_PID_FS), /*idProduct*/ + HIBYTE(USBD_PID_FS), /*idProduct*/ + 0x00, /*bcdDevice rel. 2.00*/ + 0x02, + USBD_IDX_MFC_STR, /*Index of manufacturer string*/ + USBD_IDX_PRODUCT_STR, /*Index of product string*/ + USBD_IDX_SERIAL_STR, /*Index of serial number string*/ + USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ +}; + +/* USB_DeviceDescriptor */ +/** BOS descriptor. */ +#if (USBD_LPM_ENABLED == 1) +#if defined ( __ICCARM__ ) /* IAR Compiler */ + #pragma data_alignment=4 +#endif /* defined ( __ICCARM__ ) */ +__ALIGN_BEGIN uint8_t USBD_FS_BOSDesc[USB_SIZ_BOS_DESC] __ALIGN_END = +{ + 0x5, + USB_DESC_TYPE_BOS, + 0xC, + 0x0, + 0x1, /* 1 device capability*/ + /* device capability*/ + 0x7, + USB_DEVICE_CAPABITY_TYPE, + 0x2, + 0x2, /* LPM capability bit set*/ + 0x0, + 0x0, + 0x0 +}; +#endif /* (USBD_LPM_ENABLED == 1) */ + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables + * @brief Private variables. + * @{ + */ + +#if defined ( __ICCARM__ ) /* IAR Compiler */ + #pragma data_alignment=4 +#endif /* defined ( __ICCARM__ ) */ + +/** USB lang identifier descriptor. */ +__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = +{ + USB_LEN_LANGID_STR_DESC, + USB_DESC_TYPE_STRING, + LOBYTE(USBD_LANGID_STRING), + HIBYTE(USBD_LANGID_STRING) +}; + +#if defined ( __ICCARM__ ) /* IAR Compiler */ + #pragma data_alignment=4 +#endif /* defined ( __ICCARM__ ) */ +/* Internal string descriptor. */ +__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; + +#if defined ( __ICCARM__ ) /*!< IAR Compiler */ + #pragma data_alignment=4 +#endif +__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = { + USB_SIZ_STRING_SERIAL, + USB_DESC_TYPE_STRING, +}; + +/** + * @} + */ + +/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions + * @brief Private functions. + * @{ + */ + +/** + * @brief Return the device descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + UNUSED(speed); + *length = sizeof(USBD_FS_DeviceDesc); + return USBD_FS_DeviceDesc; +} + +/** + * @brief Return the LangID string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + UNUSED(speed); + *length = sizeof(USBD_LangIDDesc); + return USBD_LangIDDesc; +} + +/** + * @brief Return the product string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == 0) + { + USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Return the manufacturer string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + UNUSED(speed); + USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); + return USBD_StrDesc; +} + +/** + * @brief Return the serial number string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + UNUSED(speed); + *length = USB_SIZ_STRING_SERIAL; + + /* Update the serial number string descriptor with the data from the unique + * ID */ + Get_SerialNum(); + /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ + + /* USER CODE END USBD_FS_SerialStrDescriptor */ + return (uint8_t *) USBD_StringSerial; +} + +/** + * @brief Return the configuration string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == USBD_SPEED_HIGH) + { + USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Return the interface string descriptor + * @param speed : Current device speed + * @param length : Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == 0) + { + USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Create the serial number string descriptor + * @param None + * @retval None + */ +static void Get_SerialNum(void) +{ + uint32_t deviceserial0; + uint32_t deviceserial1; + uint32_t deviceserial2; + + deviceserial0 = *(uint32_t *) DEVICE_ID1; + deviceserial1 = *(uint32_t *) DEVICE_ID2; + deviceserial2 = *(uint32_t *) DEVICE_ID3; + + deviceserial0 += deviceserial2; + + if (deviceserial0 != 0) + { + IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); + IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); + } +} + +/** + * @brief Convert Hex 32Bits value into char + * @param value: value to convert + * @param pbuf: pointer to the buffer + * @param len: buffer length + * @retval None + */ +static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) +{ + uint8_t idx = 0; + + for (idx = 0; idx < len; idx++) + { + if (((value >> 28)) < 0xA) + { + pbuf[2 * idx] = (value >> 28) + '0'; + } + else + { + pbuf[2 * idx] = (value >> 28) + 'A' - 10; + } + + value = value << 4; + + pbuf[2 * idx + 1] = 0; + } +} +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + diff --git a/WTZS32-2.ioc b/WTZS32-2.ioc new file mode 100644 index 0000000..5ed3a25 --- /dev/null +++ b/WTZS32-2.ioc @@ -0,0 +1,549 @@ +#MicroXplorer Configuration settings - do not modify +ADC3.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_0 +ADC3.Channel-10\#ChannelRegularConversion=ADC_CHANNEL_16 +ADC3.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_1 +ADC3.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_5 +ADC3.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_5 +ADC3.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_10 +ADC3.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_11 +ADC3.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_13 +ADC3.Channel-8\#ChannelRegularConversion=ADC_CHANNEL_14 +ADC3.Channel-9\#ChannelRegularConversion=ADC_CHANNEL_15 +ADC3.ClockPrescaler=ADC_CLOCK_ASYNC_DIV4 +ADC3.ClockPrescalerADC3=ADC_CLOCK_ASYNC_DIV4 +ADC3.ContinuousConvMode=DISABLE +ADC3.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_CIRCULAR +ADC3.EOCSelection=ADC_EOC_SEQ_CONV +ADC3.EnableRegularConversion=ENABLE +ADC3.ExternalTrigConv=ADC_EXTERNALTRIG_T4_TRGO +ADC3.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING +ADC3.IPParameters=ClockPrescaler,ClockPrescalerADC3,ConversionDataManagement,ContinuousConvMode,Overrun,EnableRegularConversion,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,NbrOfConversionFlag,OversamplingMode,ExternalTrigConv,EOCSelection,NbrOfConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,OffsetSignedSaturation-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,OffsetSignedSaturation-5\#ChannelRegularConversion,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,OffsetSignedSaturation-6\#ChannelRegularConversion,Rank-7\#ChannelRegularConversion,Channel-7\#ChannelRegularConversion,SamplingTime-7\#ChannelRegularConversion,OffsetNumber-7\#ChannelRegularConversion,OffsetSignedSaturation-7\#ChannelRegularConversion,Rank-8\#ChannelRegularConversion,Channel-8\#ChannelRegularConversion,SamplingTime-8\#ChannelRegularConversion,OffsetNumber-8\#ChannelRegularConversion,OffsetSignedSaturation-8\#ChannelRegularConversion,Rank-9\#ChannelRegularConversion,Channel-9\#ChannelRegularConversion,SamplingTime-9\#ChannelRegularConversion,OffsetNumber-9\#ChannelRegularConversion,OffsetSignedSaturation-9\#ChannelRegularConversion,ExternalTrigConvEdge,Rank-10\#ChannelRegularConversion,Channel-10\#ChannelRegularConversion,SamplingTime-10\#ChannelRegularConversion,OffsetNumber-10\#ChannelRegularConversion,OffsetSignedSaturation-10\#ChannelRegularConversion +ADC3.NbrOfConversion=10 +ADC3.NbrOfConversionFlag=1 +ADC3.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-10\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-6\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-7\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-8\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetNumber-9\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC3.OffsetSignedSaturation-1\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-10\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-2\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-3\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-4\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-5\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-6\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-7\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-8\#ChannelRegularConversion=DISABLE +ADC3.OffsetSignedSaturation-9\#ChannelRegularConversion=DISABLE +ADC3.Overrun=ADC_OVR_DATA_OVERWRITTEN +ADC3.OversamplingMode=DISABLE +ADC3.Rank-1\#ChannelRegularConversion=1 +ADC3.Rank-10\#ChannelRegularConversion=10 +ADC3.Rank-2\#ChannelRegularConversion=2 +ADC3.Rank-3\#ChannelRegularConversion=3 +ADC3.Rank-4\#ChannelRegularConversion=4 +ADC3.Rank-5\#ChannelRegularConversion=5 +ADC3.Rank-6\#ChannelRegularConversion=6 +ADC3.Rank-7\#ChannelRegularConversion=7 +ADC3.Rank-8\#ChannelRegularConversion=8 +ADC3.Rank-9\#ChannelRegularConversion=9 +ADC3.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-10\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-8\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC3.SamplingTime-9\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +Bdma.ADC3.0.Direction=DMA_PERIPH_TO_MEMORY +Bdma.ADC3.0.EventEnable=ENABLE +Bdma.ADC3.0.Instance=BDMA_Channel0 +Bdma.ADC3.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD +Bdma.ADC3.0.MemInc=DMA_MINC_ENABLE +Bdma.ADC3.0.Mode=DMA_CIRCULAR +Bdma.ADC3.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD +Bdma.ADC3.0.PeriphInc=DMA_PINC_DISABLE +Bdma.ADC3.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Bdma.ADC3.0.Priority=DMA_PRIORITY_LOW +Bdma.ADC3.0.RequestNumber=1 +Bdma.ADC3.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Bdma.ADC3.0.SignalID=NONE +Bdma.ADC3.0.SyncEnable=DISABLE +Bdma.ADC3.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Bdma.ADC3.0.SyncRequestNumber=1 +Bdma.ADC3.0.SyncSignalID=NONE +Bdma.Request0=ADC3 +Bdma.RequestsNb=1 +CAD.formats= +CAD.pinconfig= +CAD.provider= +CORTEX_M7.BaseAddress_Spec=0x24000000 +CORTEX_M7.CPU_DCache=Disabled +CORTEX_M7.CPU_ICache=Disabled +CORTEX_M7.DisableExec_Spec=MPU_INSTRUCTION_ACCESS_ENABLE +CORTEX_M7.IPParameters=default_mode_Activation,CPU_ICache,CPU_DCache,BaseAddress_Spec,Size_Spec,TypeExtField_Spec,DisableExec_Spec,IsShareable_Spec +CORTEX_M7.IsShareable_Spec=MPU_ACCESS_NOT_SHAREABLE +CORTEX_M7.Size_Spec=MPU_REGION_SIZE_512KB +CORTEX_M7.TypeExtField_Spec=MPU_TEX_LEVEL1 +CORTEX_M7.default_mode_Activation=0 +Dma.MEMTOMEM.0.Direction=DMA_MEMORY_TO_MEMORY +Dma.MEMTOMEM.0.EventEnable=DISABLE +Dma.MEMTOMEM.0.FIFOMode=DMA_FIFOMODE_ENABLE +Dma.MEMTOMEM.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL +Dma.MEMTOMEM.0.Instance=DMA2_Stream0 +Dma.MEMTOMEM.0.MemBurst=DMA_MBURST_SINGLE +Dma.MEMTOMEM.0.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.MEMTOMEM.0.MemInc=DMA_MINC_ENABLE +Dma.MEMTOMEM.0.Mode=DMA_NORMAL +Dma.MEMTOMEM.0.PeriphBurst=DMA_PBURST_SINGLE +Dma.MEMTOMEM.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.MEMTOMEM.0.PeriphInc=DMA_PINC_ENABLE +Dma.MEMTOMEM.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.MEMTOMEM.0.Priority=DMA_PRIORITY_LOW +Dma.MEMTOMEM.0.RequestNumber=1 +Dma.MEMTOMEM.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.MEMTOMEM.0.SignalID=NONE +Dma.MEMTOMEM.0.SyncEnable=DISABLE +Dma.MEMTOMEM.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.MEMTOMEM.0.SyncRequestNumber=1 +Dma.MEMTOMEM.0.SyncSignalID=NONE +Dma.Request0=MEMTOMEM +Dma.Request1=USART1_RX +Dma.RequestsNb=2 +Dma.USART1_RX.1.Direction=DMA_PERIPH_TO_MEMORY +Dma.USART1_RX.1.EventEnable=DISABLE +Dma.USART1_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.USART1_RX.1.Instance=DMA1_Stream5 +Dma.USART1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART1_RX.1.MemInc=DMA_MINC_ENABLE +Dma.USART1_RX.1.Mode=DMA_NORMAL +Dma.USART1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART1_RX.1.PeriphInc=DMA_PINC_DISABLE +Dma.USART1_RX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.USART1_RX.1.Priority=DMA_PRIORITY_LOW +Dma.USART1_RX.1.RequestNumber=1 +Dma.USART1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.USART1_RX.1.SignalID=NONE +Dma.USART1_RX.1.SyncEnable=DISABLE +Dma.USART1_RX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.USART1_RX.1.SyncRequestNumber=1 +Dma.USART1_RX.1.SyncSignalID=NONE +FREERTOS.FootprintOK=true +FREERTOS.IPParameters=Tasks01,FootprintOK +FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +MMTAppReg1.MEMORYMAP.AppRegionName=DTCMRAM +MMTAppReg1.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg1.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name +MMTAppReg1.MEMORYMAP.Name=DTCMRAM +MMTAppReg1.MEMORYMAP.Size=131072 +MMTAppReg1.MEMORYMAP.StartAddress=0x20000000 +MMTAppReg2.MEMORYMAP.AppRegionName=RAM +MMTAppReg2.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg2.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg2.MEMORYMAP.DefaultDataRegion=true +MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,DefaultDataRegion +MMTAppReg2.MEMORYMAP.Name=RAM +MMTAppReg2.MEMORYMAP.Size=524288 +MMTAppReg2.MEMORYMAP.StartAddress=0x24000000 +MMTAppReg3.MEMORYMAP.AppRegionName=RAM_D2 +MMTAppReg3.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg3.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name +MMTAppReg3.MEMORYMAP.Name=RAM_D2 +MMTAppReg3.MEMORYMAP.Size=294912 +MMTAppReg3.MEMORYMAP.StartAddress=0x30000000 +MMTAppReg4.MEMORYMAP.AppRegionName=RAM_D3 +MMTAppReg4.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg4.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg4.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name +MMTAppReg4.MEMORYMAP.Name=RAM_D3 +MMTAppReg4.MEMORYMAP.Size=65536 +MMTAppReg4.MEMORYMAP.StartAddress=0x38000000 +MMTAppReg5.MEMORYMAP.AppRegionName=ITCMRAM +MMTAppReg5.MEMORYMAP.Cacheability=WTRA +MMTAppReg5.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg5.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg5.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,Cacheability +MMTAppReg5.MEMORYMAP.Name=ITCMRAM +MMTAppReg5.MEMORYMAP.Size=65536 +MMTAppReg5.MEMORYMAP.StartAddress=0x00000000 +MMTAppReg6.MEMORYMAP.AP=RO_priv_only +MMTAppReg6.MEMORYMAP.AppRegionName=FLASH +MMTAppReg6.MEMORYMAP.Cacheability=WTRA +MMTAppReg6.MEMORYMAP.ContextName=Cortex-M7NS +MMTAppReg6.MEMORYMAP.CoreName=ARM Cortex-M7 +MMTAppReg6.MEMORYMAP.DefaultCodeRegion=true +MMTAppReg6.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion,ISRRegion,RootBootRegion +MMTAppReg6.MEMORYMAP.ISRRegion=true +MMTAppReg6.MEMORYMAP.MemType=ROM +MMTAppReg6.MEMORYMAP.Name=FLASH +MMTAppReg6.MEMORYMAP.RootBootRegion=true +MMTAppReg6.MEMORYMAP.Size=131072 +MMTAppReg6.MEMORYMAP.StartAddress=0x08000000 +MMTAppRegionsCount=6 +MMTConfigApplied=false +Mcu.CPN=STM32H750IBT6 +Mcu.Family=STM32H7 +Mcu.IP0=ADC3 +Mcu.IP1=BDMA +Mcu.IP10=TIM2 +Mcu.IP11=TIM4 +Mcu.IP12=USART1 +Mcu.IP13=USB_DEVICE +Mcu.IP14=USB_OTG_FS +Mcu.IP2=CORTEX_M7 +Mcu.IP3=DMA +Mcu.IP4=FREERTOS +Mcu.IP5=MEMORYMAP +Mcu.IP6=NVIC +Mcu.IP7=RCC +Mcu.IP8=SYS +Mcu.IP9=TIM1 +Mcu.IPNb=15 +Mcu.Name=STM32H750IBTx +Mcu.Package=LQFP176 +Mcu.Pin0=PF3 +Mcu.Pin1=PH0-OSC_IN (PH0) +Mcu.Pin10=PH5 +Mcu.Pin11=PA8 +Mcu.Pin12=PA9 +Mcu.Pin13=PA10 +Mcu.Pin14=PA11 +Mcu.Pin15=PA12 +Mcu.Pin16=PA15 (JTDI) +Mcu.Pin17=PC11 +Mcu.Pin18=PD0 +Mcu.Pin19=PD1 +Mcu.Pin2=PH1-OSC_OUT (PH1) +Mcu.Pin20=PD2 +Mcu.Pin21=PD3 +Mcu.Pin22=PD4 +Mcu.Pin23=PD5 +Mcu.Pin24=PD7 +Mcu.Pin25=PG9 +Mcu.Pin26=PG10 +Mcu.Pin27=PG11 +Mcu.Pin28=PG12 +Mcu.Pin29=PG13 +Mcu.Pin3=PC0 +Mcu.Pin30=PG14 +Mcu.Pin31=PI7 +Mcu.Pin32=VP_FREERTOS_VS_CMSIS_V2 +Mcu.Pin33=VP_SYS_VS_tim7 +Mcu.Pin34=VP_TIM1_VS_ClockSourceINT +Mcu.Pin35=VP_TIM1_VS_no_output1 +Mcu.Pin36=VP_TIM2_VS_ClockSourceINT +Mcu.Pin37=VP_TIM4_VS_ClockSourceINT +Mcu.Pin38=VP_TIM4_VS_no_output1 +Mcu.Pin39=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS +Mcu.Pin4=PC1 +Mcu.Pin40=VP_MEMORYMAP_VS_MEMORYMAP +Mcu.Pin5=PC2_C +Mcu.Pin6=PC3_C +Mcu.Pin7=PH2 +Mcu.Pin8=PH3 +Mcu.Pin9=PH4 +Mcu.PinsNb=41 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32H750IBTx +MxCube.Version=6.15.0 +MxDb.Version=DB.6.0.150 +NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMAMUX2_OVR_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.OTG_FS_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false +NVIC.SavedPendsvIrqHandlerGenerated=true +NVIC.SavedSvcallIrqHandlerGenerated=true +NVIC.SavedSystickIrqHandlerGenerated=true +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false +NVIC.TIM7_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true +NVIC.TimeBase=TIM7_IRQn +NVIC.TimeBaseIP=TIM7 +NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +PA10.Locked=true +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA11.Mode=Device_Only +PA11.Signal=USB_OTG_FS_DM +PA12.Mode=Device_Only +PA12.Signal=USB_OTG_FS_DP +PA15\ (JTDI).GPIOParameters=GPIO_ModeDefaultPP +PA15\ (JTDI).GPIO_ModeDefaultPP=GPIO_MODE_AF_OD +PA15\ (JTDI).Locked=true +PA15\ (JTDI).Signal=S_TIM2_CH1_ETR +PA8.Locked=true +PA8.Signal=GPIO_Output +PA9.Locked=true +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PC0.Signal=ADCx_INP10 +PC1.Signal=ADCx_INP11 +PC11.GPIOParameters=PinState,GPIO_PuPd,GPIO_ModeDefaultOutputPP +PC11.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PC11.GPIO_PuPd=GPIO_NOPULL +PC11.Locked=true +PC11.PinState=GPIO_PIN_RESET +PC11.Signal=GPIO_Output +PC2_C.Mode=IN0-Single-Ended +PC2_C.Signal=ADC3_INP0 +PC3_C.Mode=IN1-Single-Ended +PC3_C.Signal=ADC3_INP1 +PD0.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultOutputPP +PD0.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PD0.GPIO_PuPd=GPIO_NOPULL +PD0.Locked=true +PD0.Signal=GPIO_Output +PD1.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultOutputPP +PD1.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PD1.GPIO_PuPd=GPIO_NOPULL +PD1.Locked=true +PD1.Signal=GPIO_Output +PD2.Locked=true +PD2.Signal=GPIO_Output +PD3.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultOutputPP +PD3.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PD3.GPIO_PuPd=GPIO_NOPULL +PD3.Locked=true +PD3.Signal=GPIO_Output +PD4.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultOutputPP +PD4.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PD4.GPIO_PuPd=GPIO_NOPULL +PD4.Locked=true +PD4.Signal=GPIO_Output +PD5.GPIOParameters=GPIO_PuPd,GPIO_ModeDefaultOutputPP +PD5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PD5.GPIO_PuPd=GPIO_NOPULL +PD5.Locked=true +PD5.Signal=GPIO_Output +PD7.Locked=true +PD7.Signal=GPIO_Output +PF3.Mode=IN5-Single-Ended +PF3.Signal=ADC3_INP5 +PG10.Locked=true +PG10.Signal=GPIO_Output +PG11.Locked=true +PG11.Signal=GPIO_Output +PG12.Locked=true +PG12.Signal=GPIO_Output +PG13.Locked=true +PG13.Signal=GPIO_Output +PG14.Locked=true +PG14.Signal=GPIO_Output +PG9.Locked=true +PG9.Signal=GPIO_Output +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Locked=true +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PH2.Mode=IN13-Single-Ended +PH2.Signal=ADC3_INP13 +PH3.Mode=IN14-Single-Ended +PH3.Signal=ADC3_INP14 +PH4.Mode=IN15-Single-Ended +PH4.Signal=ADC3_INP15 +PH5.Mode=IN16-Single-Ended +PH5.Signal=ADC3_INP16 +PI7.GPIOParameters=PinState +PI7.Locked=true +PI7.PinState=GPIO_PIN_SET +PI7.Signal=GPIO_Output +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerLinker=GCC +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32H750IBTx +ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.12.1 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=2 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=WTZS32-2.ioc +ProjectManager.ProjectName=WTZS32-2 +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=CMake +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_BDMA_Init-BDMA-false-HAL-true,4-MX_DMA_Init-DMA-false-HAL-true,5-MX_ADC3_Init-ADC3-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-HAL-true,7-MX_TIM2_Init-TIM2-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_TIM4_Init-TIM4-false-HAL-true,10-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true +RCC.ADCFreq_Value=72000000 +RCC.AHB12Freq_Value=240000000 +RCC.AHB4Freq_Value=240000000 +RCC.APB1Freq_Value=120000000 +RCC.APB2Freq_Value=120000000 +RCC.APB3Freq_Value=120000000 +RCC.APB4Freq_Value=120000000 +RCC.AXIClockFreq_Value=240000000 +RCC.CECFreq_Value=32000 +RCC.CKPERFreq_Value=25000000 +RCC.CKPERSourceSelection=RCC_CLKPSOURCE_HSE +RCC.CortexFreq_Value=480000000 +RCC.CpuClockFreq_Value=480000000 +RCC.D1CPREFreq_Value=480000000 +RCC.D1PPRE=RCC_APB3_DIV2 +RCC.D2PPRE1=RCC_APB1_DIV2 +RCC.D2PPRE2=RCC_APB2_DIV2 +RCC.D3PPRE=RCC_APB4_DIV2 +RCC.DFSDMACLkFreq_Value=64000000 +RCC.DFSDMFreq_Value=120000000 +RCC.DIVM1=5 +RCC.DIVM2=5 +RCC.DIVM3=5 +RCC.DIVN1=192 +RCC.DIVN2=144 +RCC.DIVN3=192 +RCC.DIVP1Freq_Value=480000000 +RCC.DIVP2=10 +RCC.DIVP2Freq_Value=72000000 +RCC.DIVP3Freq_Value=480000000 +RCC.DIVQ1=15 +RCC.DIVQ1Freq_Value=64000000 +RCC.DIVQ2Freq_Value=360000000 +RCC.DIVQ3Freq_Value=480000000 +RCC.DIVR1Freq_Value=480000000 +RCC.DIVR2Freq_Value=360000000 +RCC.DIVR3Freq_Value=480000000 +RCC.FDCANFreq_Value=64000000 +RCC.FMCFreq_Value=240000000 +RCC.FamilyName=M +RCC.HCLK3ClockFreq_Value=240000000 +RCC.HCLKFreq_Value=240000000 +RCC.HPRE=RCC_HCLK_DIV2 +RCC.HRTIMFreq_Value=240000000 +RCC.HSE_VALUE=25000000 +RCC.I2C123Freq_Value=120000000 +RCC.I2C4Freq_Value=120000000 +RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CKPERSourceSelection,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value +RCC.LPTIM1Freq_Value=120000000 +RCC.LPTIM2Freq_Value=120000000 +RCC.LPTIM345Freq_Value=120000000 +RCC.LPUART1Freq_Value=120000000 +RCC.LTDCFreq_Value=480000000 +RCC.MCO1PinFreq_Value=64000000 +RCC.MCO2PinFreq_Value=480000000 +RCC.PLL2FRACN=0 +RCC.PLLFRACN=0 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.QSPIFreq_Value=240000000 +RCC.RNGFreq_Value=48000000 +RCC.RTCFreq_Value=32000 +RCC.SAI1Freq_Value=64000000 +RCC.SAI23Freq_Value=64000000 +RCC.SAI4AFreq_Value=64000000 +RCC.SAI4BFreq_Value=64000000 +RCC.SDMMCFreq_Value=64000000 +RCC.SPDIFRXFreq_Value=64000000 +RCC.SPI123Freq_Value=64000000 +RCC.SPI45Freq_Value=120000000 +RCC.SPI6Freq_Value=120000000 +RCC.SWPMI1Freq_Value=120000000 +RCC.SYSCLKFreq_VALUE=480000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.Tim1OutputFreq_Value=240000000 +RCC.Tim2OutputFreq_Value=240000000 +RCC.TraceFreq_Value=64000000 +RCC.USART16Freq_Value=120000000 +RCC.USART234578Freq_Value=120000000 +RCC.USBFreq_Value=64000000 +RCC.VCO1OutputFreq_Value=960000000 +RCC.VCO2OutputFreq_Value=720000000 +RCC.VCO3OutputFreq_Value=960000000 +RCC.VCOInput1Freq_Value=5000000 +RCC.VCOInput2Freq_Value=5000000 +RCC.VCOInput3Freq_Value=5000000 +SH.ADCx_INP10.0=ADC3_INP10,IN10-Single-Ended +SH.ADCx_INP10.ConfNb=1 +SH.ADCx_INP11.0=ADC3_INP11,IN11-Single-Ended +SH.ADCx_INP11.ConfNb=1 +SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1 +SH.S_TIM2_CH1_ETR.ConfNb=1 +TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE +TIM1.Channel-PWM\ Generation1\ No\ Output=TIM_CHANNEL_1 +TIM1.IPParameters=Prescaler,Period,AutoReloadPreload,Channel-PWM Generation1 No Output,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,Pulse-PWM Generation1 No Output +TIM1.Period=100-1 +TIM1.Prescaler=240000000 / 1000000-1 +TIM1.Pulse-PWM\ Generation1\ No\ Output=5 +TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE +TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_ENABLE +TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE +TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM2.IPParameters=Prescaler,Period,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,Channel-PWM Generation1 CH1 +TIM2.Period=100-1 +TIM2.Prescaler=240000000 / 1000000-1 +TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE +TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_ENABLE +TIM4.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE +TIM4.Channel-PWM\ Generation1\ No\ Output=TIM_CHANNEL_1 +TIM4.IPParameters=Channel-PWM Generation1 No Output,Prescaler,Period,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,Pulse-PWM Generation1 No Output +TIM4.Period=100-1 +TIM4.Prescaler=240000000 / 1000000-1 +TIM4.Pulse-PWM\ Generation1\ No\ Output=5 +TIM4.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE +TIM4.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_ENABLE +USART1.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR +USART1.IPParameters=VirtualMode-Asynchronous,DMADisableonRxErrorParam,OverrunDisableParam +USART1.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE +USART1.VirtualMode-Asynchronous=VM_ASYNC +USB_DEVICE.CLASS_NAME_FS=CDC +USB_DEVICE.IPParameters=VirtualMode-CDC_FS,VirtualModeFS,CLASS_NAME_FS +USB_DEVICE.VirtualMode-CDC_FS=Cdc +USB_DEVICE.VirtualModeFS=Cdc_FS +USB_OTG_FS.IPParameters=VirtualMode +USB_OTG_FS.VirtualMode=Device_Only +VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 +VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 +VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg +VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP +VP_SYS_VS_tim7.Mode=TIM7 +VP_SYS_VS_tim7.Signal=SYS_VS_tim7 +VP_TIM1_VS_ClockSourceINT.Mode=Internal +VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT +VP_TIM1_VS_no_output1.Mode=PWM Generation1 No Output +VP_TIM1_VS_no_output1.Signal=TIM1_VS_no_output1 +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +VP_TIM4_VS_ClockSourceINT.Mode=Internal +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT +VP_TIM4_VS_no_output1.Mode=PWM Generation1 No Output +VP_TIM4_VS_no_output1.Signal=TIM4_VS_no_output1 +VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS +VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS +board=custom +rtos.0.ip=FREERTOS diff --git a/cmake/gcc-arm-none-eabi.cmake b/cmake/gcc-arm-none-eabi.cmake new file mode 100644 index 0000000..481dbd1 --- /dev/null +++ b/cmake/gcc-arm-none-eabi.cmake @@ -0,0 +1,43 @@ +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR arm) + +set(CMAKE_C_COMPILER_ID GNU) +set(CMAKE_CXX_COMPILER_ID GNU) + +# Some default GCC settings +# arm-none-eabi- must be part of path environment +set(TOOLCHAIN_PREFIX arm-none-eabi-) + +set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}gcc) +set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER}) +set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}g++) +set(CMAKE_LINKER ${TOOLCHAIN_PREFIX}g++) +set(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy) +set(CMAKE_SIZE ${TOOLCHAIN_PREFIX}size) + +set(CMAKE_EXECUTABLE_SUFFIX_ASM ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_C ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_CXX ".elf") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +# MCU specific flags +set(TARGET_FLAGS "-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard ") + +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${TARGET_FLAGS}") +set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp -MMD -MP") +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fdata-sections -ffunction-sections") + +set(CMAKE_C_FLAGS_DEBUG "-O0 -g3") +set(CMAKE_C_FLAGS_RELEASE "-Os -g0") +set(CMAKE_CXX_FLAGS_DEBUG "-O0 -g3") +set(CMAKE_CXX_FLAGS_RELEASE "-Os -g0") + +set(CMAKE_CXX_FLAGS "${CMAKE_C_FLAGS} -fno-rtti -fno-exceptions -fno-threadsafe-statics") + +set(CMAKE_EXE_LINKER_FLAGS "${TARGET_FLAGS}") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -T \"${CMAKE_SOURCE_DIR}/STM32H750XX_FLASH.ld\"") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --specs=nano.specs") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-Map=${CMAKE_PROJECT_NAME}.map -Wl,--gc-sections") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--print-memory-usage") +set(TOOLCHAIN_LINK_LIBRARIES "m") diff --git a/cmake/starm-clang.cmake b/cmake/starm-clang.cmake new file mode 100644 index 0000000..a7698da --- /dev/null +++ b/cmake/starm-clang.cmake @@ -0,0 +1,65 @@ +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR arm) + +set(CMAKE_C_COMPILER_ID Clang) +set(CMAKE_CXX_COMPILER_ID Clang) + +# Some default llvm settings +set(TOOLCHAIN_PREFIX starm-) + +set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}clang) +set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER}) +set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}clang++) +set(CMAKE_LINKER ${TOOLCHAIN_PREFIX}clang) +set(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy) +set(CMAKE_SIZE ${TOOLCHAIN_PREFIX}size) + +set(CMAKE_EXECUTABLE_SUFFIX_ASM ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_C ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_CXX ".elf") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +# STARM_TOOLCHAIN_CONFIG allows you to choose the toolchain configuration. +# Possible values are: +# "STARM_HYBRID" : Hybrid configuration using starm-clang Assemler and Compiler and GNU Linker +# "STARM_NEWLIB" : starm-clang toolchain with NEWLIB C library +# "STARM_PICOLIBC" : starm-clang toolchain with PICOLIBC C library +set(STARM_TOOLCHAIN_CONFIG "STARM_HYBRID") + +if(STARM_TOOLCHAIN_CONFIG STREQUAL "STARM_HYBRID") + set(TOOLCHAIN_MULTILIBS "--multi-lib-config=\"$ENV{CLANG_GCC_CMSIS_COMPILER}/multilib.gnu_tools_for_stm32.yaml\" --gcc-toolchain=\"$ENV{GCC_TOOLCHAIN_ROOT}/..\"") +elseif (STARM_TOOLCHAIN_CONFIG STREQUAL "STARM_NEWLIB") + set(TOOLCHAIN_MULTILIBS "--config=newlib.cfg") +endif() + +# MCU specific flags +set(TARGET_FLAGS "-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard ${TOOLCHAIN_MULTILIBS}") + +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${TARGET_FLAGS}") +set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp -MP") +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fdata-sections -ffunction-sections") + +set(CMAKE_C_FLAGS_DEBUG "-O0 -g3") +set(CMAKE_C_FLAGS_RELEASE "-Os -g0") +set(CMAKE_CXX_FLAGS_DEBUG "-O0 -g3") +set(CMAKE_CXX_FLAGS_RELEASE "-Os -g0") + +set(CMAKE_CXX_FLAGS "${CMAKE_C_FLAGS} -fno-rtti -fno-exceptions -fno-threadsafe-statics") + +set(CMAKE_EXE_LINKER_FLAGS "${TARGET_FLAGS}") + +if (STARM_TOOLCHAIN_CONFIG STREQUAL "STARM_HYBRID") + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --gcc-specs=nano.specs") + set(TOOLCHAIN_LINK_LIBRARIES "m") +elseif(STARM_TOOLCHAIN_CONFIG STREQUAL "STARM_NEWLIB") + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -lcrt0-nosys") +elseif(STARM_TOOLCHAIN_CONFIG STREQUAL "STARM_PICOLIBC") + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -lcrt0-hosted") + +endif() + +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -T \"${CMAKE_SOURCE_DIR}/STM32H750XX_FLASH.ld\"") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-Map=${CMAKE_PROJECT_NAME}.map -Wl,--gc-sections") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -z noexecstack") +set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--print-memory-usage ") diff --git a/cmake/stm32cubemx/CMakeLists.txt b/cmake/stm32cubemx/CMakeLists.txt new file mode 100644 index 0000000..8c654cb --- /dev/null +++ b/cmake/stm32cubemx/CMakeLists.txt @@ -0,0 +1,140 @@ +cmake_minimum_required(VERSION 3.22) +# Enable CMake support for ASM and C languages +enable_language(C ASM) +# STM32CubeMX generated symbols (macros) +set(MX_Defines_Syms + USE_PWR_LDO_SUPPLY + USE_HAL_DRIVER + STM32H750xx + $<$:DEBUG> +) + +# STM32CubeMX generated include paths +set(MX_Include_Dirs + ${CMAKE_CURRENT_SOURCE_DIR}/../../Inc + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Inc + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/include + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Core/Inc + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/CMSIS/Device/ST/STM32H7xx/Include + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/CMSIS/Include +) + +# STM32CubeMX generated application sources +set(MX_Application_Src + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/main.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/freertos.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/usb_device.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/usbd_conf.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/usbd_desc.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/usbd_cdc_if.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/stm32h7xx_it.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/stm32h7xx_hal_msp.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/stm32h7xx_hal_timebase_tim.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/sysmem.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/syscalls.c + ${CMAKE_CURRENT_SOURCE_DIR}/../../startup_stm32h750xx.s +) + +# STM32 HAL/LL Drivers +set(STM32_Drivers_Src + ${CMAKE_CURRENT_SOURCE_DIR}/../../Src/system_stm32h7xx.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pcd.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pcd_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_usb.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc_ex.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c +) + +# Drivers Midllewares + + +set(USB_Device_Library_Src + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c +) +set(FreeRTOS_Src + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/croutine.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/list.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/queue.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/tasks.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/timers.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c + C:/Users/70659/STM32Cube/Repository/STM32Cube_FW_H7_V1.12.1/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +) + +# Link directories setup +set(MX_LINK_DIRS + +) +# Project static libraries +set(MX_LINK_LIBS + STM32_Drivers + ${TOOLCHAIN_LINK_LIBRARIES} + USB_Device_Library FreeRTOS +) +# Interface library for includes and symbols +add_library(stm32cubemx INTERFACE) +target_include_directories(stm32cubemx INTERFACE ${MX_Include_Dirs}) +target_compile_definitions(stm32cubemx INTERFACE ${MX_Defines_Syms}) + +# Create STM32_Drivers static library +add_library(STM32_Drivers OBJECT) +target_sources(STM32_Drivers PRIVATE ${STM32_Drivers_Src}) +target_link_libraries(STM32_Drivers PUBLIC stm32cubemx) + + +# Create USB_Device_Library static library +add_library(USB_Device_Library OBJECT) +target_sources(USB_Device_Library PRIVATE ${USB_Device_Library_Src}) +target_link_libraries(USB_Device_Library PUBLIC stm32cubemx) + +# Create FreeRTOS static library +add_library(FreeRTOS OBJECT) +target_sources(FreeRTOS PRIVATE ${FreeRTOS_Src}) +target_link_libraries(FreeRTOS PUBLIC stm32cubemx) + +# Add STM32CubeMX generated application sources to the project +target_sources(${CMAKE_PROJECT_NAME} PRIVATE ${MX_Application_Src}) + +# Link directories setup +target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE ${MX_LINK_DIRS}) + +# Add libraries to the project +target_link_libraries(${CMAKE_PROJECT_NAME} ${MX_LINK_LIBS}) + +# Add the map file to the list of files to be removed with 'clean' target +set_target_properties(${CMAKE_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES ${CMAKE_PROJECT_NAME}.map) + +# Validate that STM32CubeMX code is compatible with C standard +if((CMAKE_C_STANDARD EQUAL 90) OR (CMAKE_C_STANDARD EQUAL 99)) + message(ERROR "Generated code requires C11 or higher") +endif() diff --git a/startup_stm32h750xx.s b/startup_stm32h750xx.s new file mode 100644 index 0000000..0290118 --- /dev/null +++ b/startup_stm32h750xx.s @@ -0,0 +1,755 @@ +/** + ****************************************************************************** + * @file startup_stm32h750xx.s + * @author MCD Application Team + * @brief STM32H750xx Devices vector table for GCC based toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m7 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Call the ExitRun0Mode function to configure the power supply */ + bl ExitRun0Mode +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */ + .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */ + .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */ + .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */ + .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */ + .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word 0 /* Reserved */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FMC_IRQHandler /* FMC */ + .word SDMMC1_IRQHandler /* SDMMC1 */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word CRYP_IRQHandler /* Crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + .word UART7_IRQHandler /* UART7 */ + .word UART8_IRQHandler /* UART8 */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + .word SPI6_IRQHandler /* SPI6 */ + .word SAI1_IRQHandler /* SAI1 */ + .word LTDC_IRQHandler /* LTDC */ + .word LTDC_ER_IRQHandler /* LTDC error */ + .word DMA2D_IRQHandler /* DMA2D */ + .word SAI2_IRQHandler /* SAI2 */ + .word QUADSPI_IRQHandler /* QUADSPI */ + .word LPTIM1_IRQHandler /* LPTIM1 */ + .word CEC_IRQHandler /* HDMI_CEC */ + .word I2C4_EV_IRQHandler /* I2C4 Event */ + .word I2C4_ER_IRQHandler /* I2C4 Error */ + .word SPDIF_RX_IRQHandler /* SPDIF_RX */ + .word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */ + .word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */ + .word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */ + .word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */ + .word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */ + .word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */ + .word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */ + .word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */ + .word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */ + .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */ + .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */ + .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */ + .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */ + .word SAI3_IRQHandler /* SAI3 global Interrupt */ + .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */ + .word TIM15_IRQHandler /* TIM15 global Interrupt */ + .word TIM16_IRQHandler /* TIM16 global Interrupt */ + .word TIM17_IRQHandler /* TIM17 global Interrupt */ + .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */ + .word MDIOS_IRQHandler /* MDIOS global Interrupt */ + .word JPEG_IRQHandler /* JPEG global Interrupt */ + .word MDMA_IRQHandler /* MDMA global Interrupt */ + .word 0 /* Reserved */ + .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */ + .word HSEM1_IRQHandler /* HSEM1 global Interrupt */ + .word 0 /* Reserved */ + .word ADC3_IRQHandler /* ADC3 global Interrupt */ + .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */ + .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */ + .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */ + .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */ + .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */ + .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */ + .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */ + .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */ + .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */ + .word COMP1_IRQHandler /* COMP1 global Interrupt */ + .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */ + .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */ + .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */ + .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */ + .word LPUART1_IRQHandler /* LP UART1 interrupt */ + .word 0 /* Reserved */ + .word CRS_IRQHandler /* Clock Recovery Global Interrupt */ + .word ECC_IRQHandler /* ECC diagnostic Global Interrupt */ + .word SAI4_IRQHandler /* SAI4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */ + + .size g_pfnVectors, .-g_pfnVectors + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_AVD_IRQHandler + .thumb_set PVD_AVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak FDCAN_CAL_IRQHandler + .thumb_set FDCAN_CAL_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak CRYP_IRQHandler + .thumb_set CRYP_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak DMA2D_IRQHandler + .thumb_set DMA2D_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPDIF_RX_IRQHandler + .thumb_set SPDIF_RX_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_OUT_IRQHandler + .thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_IN_IRQHandler + .thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak HRTIM1_Master_IRQHandler + .thumb_set HRTIM1_Master_IRQHandler,Default_Handler + + .weak HRTIM1_TIMA_IRQHandler + .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler + + .weak HRTIM1_TIMB_IRQHandler + .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler + + .weak HRTIM1_TIMC_IRQHandler + .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler + + .weak HRTIM1_TIMD_IRQHandler + .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler + + .weak HRTIM1_TIME_IRQHandler + .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler + + .weak HRTIM1_FLT_IRQHandler + .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak SAI3_IRQHandler + .thumb_set SAI3_IRQHandler,Default_Handler + + .weak SWPMI1_IRQHandler + .thumb_set SWPMI1_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak MDIOS_WKUP_IRQHandler + .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler + + .weak MDIOS_IRQHandler + .thumb_set MDIOS_IRQHandler,Default_Handler + + .weak JPEG_IRQHandler + .thumb_set JPEG_IRQHandler,Default_Handler + + .weak MDMA_IRQHandler + .thumb_set MDMA_IRQHandler,Default_Handler + + .weak SDMMC2_IRQHandler + .thumb_set SDMMC2_IRQHandler,Default_Handler + + .weak HSEM1_IRQHandler + .thumb_set HSEM1_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak DMAMUX2_OVR_IRQHandler + .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler + + .weak BDMA_Channel0_IRQHandler + .thumb_set BDMA_Channel0_IRQHandler,Default_Handler + + .weak BDMA_Channel1_IRQHandler + .thumb_set BDMA_Channel1_IRQHandler,Default_Handler + + .weak BDMA_Channel2_IRQHandler + .thumb_set BDMA_Channel2_IRQHandler,Default_Handler + + .weak BDMA_Channel3_IRQHandler + .thumb_set BDMA_Channel3_IRQHandler,Default_Handler + + .weak BDMA_Channel4_IRQHandler + .thumb_set BDMA_Channel4_IRQHandler,Default_Handler + + .weak BDMA_Channel5_IRQHandler + .thumb_set BDMA_Channel5_IRQHandler,Default_Handler + + .weak BDMA_Channel6_IRQHandler + .thumb_set BDMA_Channel6_IRQHandler,Default_Handler + + .weak BDMA_Channel7_IRQHandler + .thumb_set BDMA_Channel7_IRQHandler,Default_Handler + + .weak COMP1_IRQHandler + .thumb_set COMP1_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak LPTIM4_IRQHandler + .thumb_set LPTIM4_IRQHandler,Default_Handler + + .weak LPTIM5_IRQHandler + .thumb_set LPTIM5_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak CRS_IRQHandler + .thumb_set CRS_IRQHandler,Default_Handler + + .weak ECC_IRQHandler + .thumb_set ECC_IRQHandler,Default_Handler + + .weak SAI4_IRQHandler + .thumb_set SAI4_IRQHandler,Default_Handler + + .weak WAKEUP_PIN_IRQHandler + .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler + +