262 lines
6.8 KiB
C
262 lines
6.8 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2024 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern DMA_HandleTypeDef hdma_adc3;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern UART_HandleTypeDef huart1;
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extern TIM_HandleTypeDef htim7;
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/* USER CODE BEGIN EV */
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extern uint32_t ADC1DataBuf[1024*14/2];
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extern uint32_t ADC2DataBuf[1024*2/2];
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extern uint32_t ADC3DataBuf[1024*16/2];
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extern uint32_t ADC1DataBufTrans[4096*14/2];
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extern uint32_t ADC2DataBufTrans[4096*2/2];
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extern uint32_t ADC3DataBufTrans[4096*16/2];
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream0;
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extern uint8_t Uart_ReadCache[128];
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream5 global interrupt.
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*/
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void DMA1_Stream5_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
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/* USER CODE END DMA1_Stream5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_rx);
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/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
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/* USER CODE END DMA1_Stream5_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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// HAL_UART_DMAStop(&huart1); // ֹͣDMA<4D><41><EFBFBD><EFBFBD>
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HAL_UARTEx_ReceiveToIdle_DMA(&huart1, Uart_ReadCache, 128); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles TIM7 global interrupt.
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*/
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void TIM7_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM7_IRQn 0 */
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/* USER CODE END TIM7_IRQn 0 */
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HAL_TIM_IRQHandler(&htim7);
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/* USER CODE BEGIN TIM7_IRQn 1 */
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/* USER CODE END TIM7_IRQn 1 */
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}
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/**
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* @brief This function handles USB On The Go FS global interrupt.
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*/
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void OTG_FS_IRQHandler(void)
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{
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/* USER CODE BEGIN OTG_FS_IRQn 0 */
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/* USER CODE END OTG_FS_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
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/* USER CODE BEGIN OTG_FS_IRQn 1 */
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/* USER CODE END OTG_FS_IRQn 1 */
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}
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/**
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* @brief This function handles DMAMUX2 overrun interrupt.
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*/
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void DMAMUX2_OVR_IRQHandler(void)
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{
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/* USER CODE BEGIN DMAMUX2_OVR_IRQn 0 */
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/* USER CODE END DMAMUX2_OVR_IRQn 0 */
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// Handle BDMA_Channel0
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HAL_DMAEx_MUX_IRQHandler(&hdma_adc3);
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/* USER CODE BEGIN DMAMUX2_OVR_IRQn 1 */
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/* USER CODE END DMAMUX2_OVR_IRQn 1 */
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}
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/**
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* @brief This function handles BDMA channel0 global interrupt.
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*/
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void BDMA_Channel0_IRQHandler(void)
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{
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/* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
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/* USER CODE END BDMA_Channel0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc3);
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/* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
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/* USER CODE END BDMA_Channel0_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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