2025-12-30 07:21:11 +00:00
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#include "stdbool.h"
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#include "stm32f10x.h"
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#include "cmsis_os.h"
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2026-03-17 02:35:31 +00:00
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2025-12-30 07:21:11 +00:00
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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2026-03-17 02:35:31 +00:00
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* TIM5->CH3 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-12-30 07:21:11 +00:00
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM5_CH3_CTRL(uint16_t ARRValue, uint16_t CCRValue )
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2025-12-30 07:21:11 +00:00
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{
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2026-03-17 02:35:31 +00:00
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TIM5->ARR = ARRValue; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>
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TIM5->CCR3 = CCRValue; // <09><><EFBFBD>÷<EFBFBD>תֵ
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2025-12-30 07:21:11 +00:00
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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2026-03-17 02:35:31 +00:00
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* TIM5->CH3 PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-12-30 07:21:11 +00:00
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM5_CH3_CMD( _Bool CMD )
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2025-12-30 07:21:11 +00:00
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{
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if( CMD )
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{
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2026-03-17 02:35:31 +00:00
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SET_BIT( TIM5->CR1,TIM_CR1_CEN );
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SET_BIT( TIM5->CCER,TIM_CCER_CC3E );
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2025-12-30 07:21:11 +00:00
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}
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else
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{
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2026-03-17 02:35:31 +00:00
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CLEAR_BIT( TIM5->CCER,TIM_CCER_CC3E );
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CLEAR_BIT( TIM5->CR1,TIM_CR1_CEN );
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* DIR
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*******************************************************************************/
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*
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*******************************************************************************/
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void TIM5_IECMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT(TIM5->DIER, TIM_DIER_CC3IE); // ʹ<><CAB9><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM5->SR, TIM_SR_UIF | TIM_SR_CC3IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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else
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{
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CLEAR_BIT(TIM5->DIER,TIM_DIER_CC3IE); // ʧ<><CAA7><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM5->SR, TIM_SR_UIF | TIM_SR_CC3IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM3->CH1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM3_CH1_CTRL(uint16_t ARRValue, uint16_t CCRValue )
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{
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TIM3->ARR = ARRValue; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>
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TIM3->CCR1 = CCRValue; // <09><><EFBFBD>÷<EFBFBD>תֵ
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM3->CH1 PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM3_CH1_CMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT( TIM3->CR1,TIM_CR1_CEN );
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SET_BIT( TIM3->CCER,TIM_CCER_CC1E );
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}
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else
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{
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CLEAR_BIT( TIM3->CCER,TIM_CCER_CC1E );
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CLEAR_BIT( TIM3->CR1, TIM_CR1_CEN );
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2025-12-30 07:21:11 +00:00
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* DIR
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*******************************************************************************/
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//void TIM4_CH1_DIR( _Bool CMD )
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//{
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// if( CMD )
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// {
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// GPIO_SetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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// else
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// {
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// GPIO_ResetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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//}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM3_IECMD( _Bool CMD )
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2025-12-30 07:21:11 +00:00
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{
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if( CMD )
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{
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2026-03-17 02:35:31 +00:00
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SET_BIT(TIM3->DIER, TIM_DIER_CC1IE); // ʹ<><CAB9><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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2025-12-30 07:21:11 +00:00
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}
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else
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{
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2026-03-17 02:35:31 +00:00
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CLEAR_BIT(TIM3->DIER,TIM_DIER_CC1IE); // ʧ<><CAA7><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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2025-12-30 07:21:11 +00:00
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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2026-03-17 02:35:31 +00:00
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* TIM2->CH2 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-12-30 07:21:11 +00:00
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM2_CH2_CTRL(uint16_t ARRValue, uint16_t CCRValue )
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2025-12-30 07:21:11 +00:00
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{
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2026-03-17 02:35:31 +00:00
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TIM2->ARR = ARRValue; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>
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TIM2->CCR2 = CCRValue; // <09><><EFBFBD>÷<EFBFBD>תֵ
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2025-12-30 07:21:11 +00:00
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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2026-03-17 02:35:31 +00:00
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* TIM2->CH2 PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-12-30 07:21:11 +00:00
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM2_CH2_CMD( _Bool CMD )
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2025-12-30 07:21:11 +00:00
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{
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if( CMD )
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{
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2026-03-17 02:35:31 +00:00
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SET_BIT( TIM2->CR1,TIM_CR1_CEN );
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SET_BIT( TIM2->CCER,TIM_CCER_CC2E );
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2025-12-30 07:21:11 +00:00
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}
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else
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{
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2026-03-17 02:35:31 +00:00
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CLEAR_BIT( TIM2->CCER,TIM_CCER_CC2E );
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CLEAR_BIT( TIM2->CR1, TIM_CR1_CEN );
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2025-12-30 07:21:11 +00:00
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* DIR
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*******************************************************************************/
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//void TIM4_CH1_DIR( _Bool CMD )
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//{
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// if( CMD )
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// {
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// GPIO_SetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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// else
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// {
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// GPIO_ResetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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//}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*
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*******************************************************************************/
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2026-03-17 02:35:31 +00:00
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void TIM2_IECMD( _Bool CMD )
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2025-12-30 07:21:11 +00:00
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{
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if( CMD )
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{
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2026-03-17 02:35:31 +00:00
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SET_BIT(TIM2->DIER, TIM_DIER_CC2IE); // ʹ<><CAB9><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM2->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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2025-12-30 07:21:11 +00:00
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}
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else
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{
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2026-03-17 02:35:31 +00:00
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CLEAR_BIT(TIM2->DIER,TIM_DIER_CC2IE); // ʧ<><CAA7><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM2->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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2025-12-30 07:21:11 +00:00
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}
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}
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