152 lines
4.6 KiB
C
152 lines
4.6 KiB
C
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#include "stdbool.h"
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#include "stm32f10x.h"
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#include "cmsis_os.h"
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///******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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//* TIM4
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//*******************************************************************************/
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//void BIOS_TIM4_Init( void )
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//{
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// SET_BIT( RCC->APB2ENR, RCC_APB2ENR_IOPDEN );
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// MODIFY_REG( GPIOD->CRH, 0x0FF00000u, 0x0B300000u ); // IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PWM_OUT
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// GPIO_PinRemapConfig(GPIO_Remap_TIM4, ENABLE);
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// SET_BIT( RCC->APB1ENR, RCC_APB1ENR_TIM4EN ); // <09><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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// SET_BIT( RCC->APB1ENR, RCC_APB2ENR_AFIOEN ); // <09><EFBFBD><F2BFAAB8><EFBFBD>ʱ<EFBFBD><CAB1>
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// SET_BIT( TIM4->EGR, TIM_EGR_UG ); // <09><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>мĴ<D0BC><C4B4><EFBFBD>
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// TIM4->CR1 = TIM_CR1_ARPE| TIM_CR1_URS; // <09>Զ<EFBFBD>װ<EFBFBD><D7B0> <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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// TIM4->PSC = SystemCoreClock / 1000000u - 1u; // <09><><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>Ƶֵ
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// TIM4->ARR = 100u - 1; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>ֵ
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// TIM4->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3PE; // <09><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ժ<D4BA><CDB9><EFBFBD>ģʽ
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//// TIM4->CCER = TIM_CCER_CC3E; // ʹ<><CAB9>ͨ<EFBFBD><CDA8>
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// TIM4->CCR3 = 100/2u; // <09><><EFBFBD>÷<EFBFBD>תֵ
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// NVIC_EnableIRQ(TIM4_IRQn);
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// SET_BIT( TIM4->CR1, TIM_CR1_CEN ); // ʹ<>ܼ<EFBFBD><DCBC><EFBFBD><EFBFBD><EFBFBD>
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//}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM4->CH3 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM4_CH1_CTRL(uint16_t ARRValue, uint16_t CCRValue )
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{
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TIM4->ARR = ARRValue; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>
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TIM4->CCR1 = CCRValue; // <09><><EFBFBD>÷<EFBFBD>תֵ
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM4->CH3 PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM4_CH1_CMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT( TIM4->CR1,TIM_CR1_CEN );
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SET_BIT( TIM4->CCER,TIM_CCER_CC1E );
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}
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else
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{
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CLEAR_BIT( TIM4->CCER,TIM_CCER_CC1E );
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CLEAR_BIT( TIM4->CR1,TIM_CR1_CEN );
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* DIR
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*******************************************************************************/
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//void TIM4_CH1_DIR( _Bool CMD )
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//{
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// if( CMD )
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// {
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// GPIO_SetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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// else
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// {
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// GPIO_ResetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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//}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*
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*******************************************************************************/
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void TIM4_IECMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT(TIM4->DIER, TIM_DIER_CC1IE); // ʹ<><CAB9><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM4->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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else
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{
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CLEAR_BIT(TIM4->DIER,TIM_DIER_CC1IE); // ʧ<><CAA7><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM4->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM3->CH2 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM3_CH2_CTRL(uint16_t ARRValue, uint16_t CCRValue )
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{
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TIM3->ARR = ARRValue; // <09><><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>
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TIM3->CCR2 = CCRValue; // <09><><EFBFBD>÷<EFBFBD>תֵ
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* TIM4->CH3 PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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void TIM3_CH2_CMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT( TIM3->CR1,TIM_CR1_CEN );
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SET_BIT( TIM3->CCER,TIM_CCER_CC2E );
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}
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else
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{
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CLEAR_BIT( TIM3->CCER,TIM_CCER_CC2E );
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CLEAR_BIT( TIM3->CR1, TIM_CR1_CEN );
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}
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}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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* DIR
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*******************************************************************************/
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//void TIM4_CH1_DIR( _Bool CMD )
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//{
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// if( CMD )
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// {
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// GPIO_SetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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// else
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// {
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// GPIO_ResetBits( GPIOD, GPIO_ODR_ODR13 );
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// }
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//}
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/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*
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*******************************************************************************/
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void TIM3_IECMD( _Bool CMD )
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{
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if( CMD )
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{
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SET_BIT(TIM3->DIER, TIM_DIER_CC2IE); // ʹ<><CAB9><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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else
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{
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CLEAR_BIT(TIM3->DIER,TIM_DIER_CC1IE); // ʧ<><CAA7><EFBFBD>ж<EFBFBD>
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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}
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}
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