246 lines
6.5 KiB
C
246 lines
6.5 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f1xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f1xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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extern volatile uint32_t SetPluseCount[7u]; // <09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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extern volatile uint32_t PluseCount[7u]; // ʵ<><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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extern volatile _Bool CountOver[7u]; // <09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
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extern void TIM3_CH2_CMD( _Bool CMD );
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extern void TIM4_CH1_CMD( _Bool CMD );
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_adc1;
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extern TIM_HandleTypeDef htim3;
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extern TIM_HandleTypeDef htim4;
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extern TIM_HandleTypeDef htim1;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M3 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F1xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f1xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel1 global interrupt.
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*/
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void DMA1_Channel1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
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/* USER CODE END DMA1_Channel1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc1);
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/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
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/* USER CODE END DMA1_Channel1_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 update interrupt.
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*/
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void TIM1_UP_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_UP_IRQn 0 */
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/* USER CODE END TIM1_UP_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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/* USER CODE BEGIN TIM1_UP_IRQn 1 */
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/* USER CODE END TIM1_UP_IRQn 1 */
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}
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/**
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* @brief This function handles TIM3 global interrupt.
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*/
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void TIM3_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM3_IRQn 0 */
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/* USER CODE END TIM3_IRQn 0 */
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HAL_TIM_IRQHandler(&htim3);
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/* USER CODE BEGIN TIM3_IRQn 1 */
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD>жϱ<D0B6><CFB1>
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if( PluseCount[1u] < SetPluseCount[1u] )
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PluseCount[1u] ++;
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else
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{
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TIM3_CH2_CMD( 0 );
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CountOver[1u] = 1;
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CLEAR_BIT( TIM3->SR, TIM_SR_UIF | TIM_SR_CC2IF ); // <09><><EFBFBD><EFBFBD>жϱ<D0B6><CFB1>
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}
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/* USER CODE END TIM3_IRQn 1 */
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}
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/**
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* @brief This function handles TIM4 global interrupt.
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*/
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void TIM4_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM4_IRQn 0 */
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/* USER CODE END TIM4_IRQn 0 */
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HAL_TIM_IRQHandler(&htim4);
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/* USER CODE BEGIN TIM4_IRQn 1 */
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CLEAR_BIT( TIM4->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD>жϱ<D0B6><CFB1>
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if( PluseCount[0u] < SetPluseCount[0u] )
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PluseCount[0u] ++;
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else
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{
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TIM4_CH1_CMD( 0 );
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CountOver[0u] = 1;
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CLEAR_BIT( TIM4->SR, TIM_SR_UIF | TIM_SR_CC1IF ); // <09><><EFBFBD><EFBFBD>жϱ<D0B6><CFB1>
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}
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/* USER CODE END TIM4_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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