commit c009e58201be65cc3253e7a77f24e93b725d9b46 Author: gengyalei <915253211@qq.com> Date: Tue Oct 14 20:19:55 2025 +0800 123 diff --git a/COMM.SchDoc b/COMM.SchDoc new file mode 100644 index 0000000..79d1430 Binary files /dev/null and b/COMM.SchDoc differ diff --git a/ENCODER.SchDoc b/ENCODER.SchDoc new file mode 100644 index 0000000..0173f8d Binary files /dev/null and b/ENCODER.SchDoc differ diff --git a/History/MAIN-BOARD.~(1).PcbDoc.Zip b/History/MAIN-BOARD.~(1).PcbDoc.Zip new file mode 100644 index 0000000..8d37f42 Binary files /dev/null and b/History/MAIN-BOARD.~(1).PcbDoc.Zip differ diff --git a/History/MAIN-BOARD.~(2).PcbDoc.Zip b/History/MAIN-BOARD.~(2).PcbDoc.Zip new file mode 100644 index 0000000..bbbc75f Binary files /dev/null and b/History/MAIN-BOARD.~(2).PcbDoc.Zip differ diff --git a/MAIN-BOARD.PcbDoc b/MAIN-BOARD.PcbDoc new file mode 100644 index 0000000..73d545b Binary files /dev/null and b/MAIN-BOARD.PcbDoc differ diff --git a/MAIN.SchDoc b/MAIN.SchDoc new file mode 100644 index 0000000..0647ea0 Binary files /dev/null and b/MAIN.SchDoc differ diff --git a/MOTOR.SchDoc b/MOTOR.SchDoc new file mode 100644 index 0000000..952459e Binary files /dev/null and b/MOTOR.SchDoc differ diff --git a/OTHER.SchDoc b/OTHER.SchDoc new file mode 100644 index 0000000..6fe9dd7 Binary files /dev/null and b/OTHER.SchDoc differ diff --git a/POWER.SchDoc b/POWER.SchDoc new file mode 100644 index 0000000..a37286f Binary files /dev/null and b/POWER.SchDoc differ diff --git a/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-14 9-47-16.LOG b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-14 9-47-16.LOG new file mode 100644 index 0000000..3c5c0ec --- /dev/null +++ b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-14 9-47-16.LOG @@ -0,0 +1 @@ +Change Component Designator: Old Designator=R? New Designator=R1 diff --git a/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..6df0c9f --- /dev/null +++ b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,14 @@ +Change Component Designator: Old Designator=C1 New Designator=C? +Change Component Designator: Old Designator=C2 New Designator=C? +Change Component Designator: Old Designator=C3 New Designator=C? +Change Component Designator: Old Designator=C4 New Designator=C? +Change Component Designator: Old Designator=C5 New Designator=C? +Change Component Designator: Old Designator=CN1 New Designator=CN? +Change Component Designator: Old Designator=CN2 New Designator=CN? +Change Component Designator: Old Designator=CN3 New Designator=CN? +Change Component Designator: Old Designator=CN4 New Designator=CN? +Change Component Designator: Old Designator=R1 New Designator=R? +Change Component Designator: Old Designator=R2 New Designator=R? +Change Component Designator: Old Designator=R3 New Designator=R? +Change Component Designator: Old Designator=R4 New Designator=R? +Change Component Designator: Old Designator=U1 New Designator=U? diff --git a/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..a458b78 --- /dev/null +++ b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,14 @@ +Change Component Designator: Old Designator=C? New Designator=C1 +Change Component Designator: Old Designator=C? New Designator=C2 +Change Component Designator: Old Designator=C? New Designator=C3 +Change Component Designator: Old Designator=C? New Designator=C4 +Change Component Designator: Old Designator=C? New Designator=C5 +Change Component Designator: Old Designator=CN? New Designator=CN1 +Change Component Designator: Old Designator=CN? New Designator=CN2 +Change Component Designator: Old Designator=CN? New Designator=CN3 +Change Component Designator: Old Designator=CN? New Designator=CN4 +Change Component Designator: Old Designator=R? New Designator=R1 +Change Component Designator: Old Designator=R? New Designator=R2 +Change Component Designator: Old Designator=R? New Designator=R3 +Change Component Designator: Old Designator=R? New Designator=R4 +Change Component Designator: Old Designator=U? New Designator=U1 diff --git a/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-26 17-25-33.LOG b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-26 17-25-33.LOG new file mode 100644 index 0000000..a274626 --- /dev/null +++ b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-26 17-25-33.LOG @@ -0,0 +1,14 @@ +Change Component Designator: Old Designator=C? New Designator=C1 +Change Component Designator: Old Designator=C? New Designator=C2 +Change Component Designator: Old Designator=C? New Designator=C3 +Change Component Designator: Old Designator=C? New Designator=C4 +Change Component Designator: Old Designator=C? New Designator=C5 +Change Component Designator: Old Designator=CY? New Designator=CY1 +Change Component Designator: Old Designator=J? New Designator=J1 +Change Component Designator: Old Designator=R? New Designator=R1 +Change Component Designator: Old Designator=R? New Designator=R2 +Change Component Designator: Old Designator=R? New Designator=R3 +Change Component Designator: Old Designator=TVS? New Designator=TVS1 +Change Component Designator: Old Designator=TVS? New Designator=TVS2 +Change Component Designator: Old Designator=TVS? New Designator=TVS3 +Change Component Designator: Old Designator=U? New Designator=U1 diff --git a/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..d0a2b6c --- /dev/null +++ b/Project Logs for 熔体流速仪/COMM SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,5 @@ +Change Component Designator: Old Designator=CN? New Designator=CN1 +Change Component Designator: Old Designator=CN? New Designator=CN2 +Change Component Designator: Old Designator=CN? New Designator=CN3 +Change Component Designator: Old Designator=CN? New Designator=CN4 +Change Component Designator: Old Designator=R? New Designator=R4 diff --git a/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..cfd98c9 --- /dev/null +++ b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=C6 New Designator=C? +Change Component Designator: Old Designator=C7 New Designator=C? +Change Component Designator: Old Designator=C8 New Designator=C? +Change Component Designator: Old Designator=CN5 New Designator=CN? +Change Component Designator: Old Designator=R5 New Designator=R? +Change Component Designator: Old Designator=R6 New Designator=R? +Change Component Designator: Old Designator=R7 New Designator=R? +Change Component Designator: Old Designator=R8 New Designator=R? +Change Component Designator: Old Designator=U2 New Designator=U? diff --git a/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..9087bcc --- /dev/null +++ b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=C? New Designator=C6 +Change Component Designator: Old Designator=C? New Designator=C7 +Change Component Designator: Old Designator=C? New Designator=C8 +Change Component Designator: Old Designator=CN? New Designator=CN5 +Change Component Designator: Old Designator=R? New Designator=R5 +Change Component Designator: Old Designator=R? New Designator=R6 +Change Component Designator: Old Designator=R? New Designator=R7 +Change Component Designator: Old Designator=R? New Designator=R8 +Change Component Designator: Old Designator=U? New Designator=U2 diff --git a/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..9087bcc --- /dev/null +++ b/Project Logs for 熔体流速仪/ENCODER SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=C? New Designator=C6 +Change Component Designator: Old Designator=C? New Designator=C7 +Change Component Designator: Old Designator=C? New Designator=C8 +Change Component Designator: Old Designator=CN? New Designator=CN5 +Change Component Designator: Old Designator=R? New Designator=R5 +Change Component Designator: Old Designator=R? New Designator=R6 +Change Component Designator: Old Designator=R? New Designator=R7 +Change Component Designator: Old Designator=R? New Designator=R8 +Change Component Designator: Old Designator=U? New Designator=U2 diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 11-09-16.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 11-09-16.LOG new file mode 100644 index 0000000..6655853 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 11-09-16.LOG @@ -0,0 +1 @@ +Change Component Designator: Old Designator=CN? New Designator=CN14 diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 9-06-47.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 9-06-47.LOG new file mode 100644 index 0000000..0f9dfa6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-13 9-06-47.LOG @@ -0,0 +1 @@ +Change Component Designator: Old Designator=CN? New Designator=CN13 diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..ae9152c --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,23 @@ +Change Component Designator: Old Designator=C9 New Designator=C? +Change Component Designator: Old Designator=C10 New Designator=C? +Change Component Designator: Old Designator=C11 New Designator=C? +Change Component Designator: Old Designator=C12 New Designator=C? +Change Component Designator: Old Designator=C13 New Designator=C? +Change Component Designator: Old Designator=C14 New Designator=C? +Change Component Designator: Old Designator=C15 New Designator=C? +Change Component Designator: Old Designator=C16 New Designator=C? +Change Component Designator: Old Designator=C17 New Designator=C? +Change Component Designator: Old Designator=C18 New Designator=C? +Change Component Designator: Old Designator=C19 New Designator=C? +Change Component Designator: Old Designator=C20 New Designator=C? +Change Component Designator: Old Designator=P1 New Designator=P? +Change Component Designator: Old Designator=R9 New Designator=R? +Change Component Designator: Old Designator=R10 New Designator=R? +Change Component Designator: Old Designator=R11 New Designator=R? +Change Component Designator: Old Designator=R12 New Designator=R? +Change Component Designator: Old Designator=SW1 New Designator=SW? +Change Component Designator: Old Designator=SW2 New Designator=SW? +Change Component Designator: Old Designator=U3 New Designator=U? +Change Component Designator: Old Designator=U3 New Designator=U? +Change Component Designator: Old Designator=X1 New Designator=X? +Change Component Designator: Old Designator=X2 New Designator=X? diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..e8850d7 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,23 @@ +Change Component Designator: Old Designator=C? New Designator=C9 +Change Component Designator: Old Designator=C? New Designator=C10 +Change Component Designator: Old Designator=C? New Designator=C11 +Change Component Designator: Old Designator=C? New Designator=C12 +Change Component Designator: Old Designator=C? New Designator=C13 +Change Component Designator: Old Designator=C? New Designator=C14 +Change Component Designator: Old Designator=C? New Designator=C15 +Change Component Designator: Old Designator=C? New Designator=C16 +Change Component Designator: Old Designator=C? New Designator=C17 +Change Component Designator: Old Designator=C? New Designator=C18 +Change Component Designator: Old Designator=C? New Designator=C19 +Change Component Designator: Old Designator=C? New Designator=C20 +Change Component Designator: Old Designator=P? New Designator=P1 +Change Component Designator: Old Designator=R? New Designator=R9 +Change Component Designator: Old Designator=R? New Designator=R10 +Change Component Designator: Old Designator=R? New Designator=R11 +Change Component Designator: Old Designator=R? New Designator=R12 +Change Component Designator: Old Designator=SW? New Designator=SW1 +Change Component Designator: Old Designator=SW? New Designator=SW2 +Change Component Designator: Old Designator=U? New Designator=U3 +Change Component Designator: Old Designator=U? New Designator=U3 +Change Component Designator: Old Designator=X? New Designator=X1 +Change Component Designator: Old Designator=X? New Designator=X2 diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-26 17-25-33.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-26 17-25-33.LOG new file mode 100644 index 0000000..0abf2b2 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-26 17-25-33.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=C? New Designator=C6 +Change Component Designator: Old Designator=C? New Designator=C7 +Change Component Designator: Old Designator=C? New Designator=C8 +Change Component Designator: Old Designator=C? New Designator=C9 +Change Component Designator: Old Designator=C? New Designator=C10 +Change Component Designator: Old Designator=P? New Designator=P1 +Change Component Designator: Old Designator=R? New Designator=R4 +Change Component Designator: Old Designator=X? New Designator=X1 +Change Component Designator: Old Designator=X? New Designator=X2 diff --git a/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..4117782 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,22 @@ +Change Component Designator: Old Designator=C6 New Designator=C19 +Change Component Designator: Old Designator=C7 New Designator=C20 +Change Component Designator: Old Designator=C8 New Designator=C15 +Change Component Designator: Old Designator=C9 New Designator=C16 +Change Component Designator: Old Designator=C10 New Designator=C17 +Change Component Designator: Old Designator=C? New Designator=C9 +Change Component Designator: Old Designator=C? New Designator=C10 +Change Component Designator: Old Designator=C? New Designator=C11 +Change Component Designator: Old Designator=C? New Designator=C12 +Change Component Designator: Old Designator=C? New Designator=C13 +Change Component Designator: Old Designator=C? New Designator=C14 +Change Component Designator: Old Designator=C? New Designator=C18 +Change Component Designator: Old Designator=R4 New Designator=R11 +Change Component Designator: Old Designator=R? New Designator=R9 +Change Component Designator: Old Designator=R? New Designator=R10 +Change Component Designator: Old Designator=R? New Designator=R12 +Change Component Designator: Old Designator=SW? New Designator=SW1 +Change Component Designator: Old Designator=SW? New Designator=SW2 +Change Component Designator: Old Designator=U? New Designator=U3 +Change Component Designator: Old Designator=U? New Designator=U3 +Change Component Designator: Old Designator=X1 New Designator=X2 +Change Component Designator: Old Designator=X2 New Designator=X1 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-11-48.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-11-48.LOG new file mode 100644 index 0000000..a9b2463 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-11-48.LOG @@ -0,0 +1,167 @@ +Removed Pin From Net: NetName=V5V Pin=CN7-3 +Removed Pin From Net: NetName=GND Pin=D1-2 +Removed Pin From Net: NetName=NetCN7_2 Pin=R19-1 +Change Component Footprint: Designator=CN7 Old Footprint=CONN-TH_3P-P2.54_2501S-3P New Footprint=CONN-TH_2P-P2.50_HX25003-2A +Change Component Comment : Designator=CN7 Old Comment=ZX-XH2.54-3PZZ New Comment=ZX-XH2.54-2PZZ +Change Component Designator: OldDesignator=C44 NewDesignator=C43 +Change Component Designator: OldDesignator=C45 NewDesignator=C44 +Change Component Designator: OldDesignator=C46 NewDesignator=C45 +Change Component Designator: OldDesignator=C47 NewDesignator=C46 +Change Component Designator: OldDesignator=C48 NewDesignator=C47 +Change Component Designator: OldDesignator=C49 NewDesignator=C48 +Change Component Designator: OldDesignator=C50 NewDesignator=C49 +Change Component Designator: OldDesignator=C51 NewDesignator=C50 +Change Component Designator: OldDesignator=C52 NewDesignator=C51 +Change Component Designator: OldDesignator=C53 NewDesignator=C52 +Change Component Designator: OldDesignator=C54 NewDesignator=C53 +Change Component Designator: OldDesignator=C55 NewDesignator=C54 +Change Component Designator: OldDesignator=C56 NewDesignator=C55 +Change Component Designator: OldDesignator=C57 NewDesignator=C56 +Change Component Designator: OldDesignator=CN8 NewDesignator=CN9 +Change Component Designator: OldDesignator=CN9 NewDesignator=CN10 +Change Component Designator: OldDesignator=CN10 NewDesignator=CN11 +Change Component Designator: OldDesignator=CN11 NewDesignator=CN12 +Change Component Designator: OldDesignator=D2 NewDesignator=D3 +Change Component Designator: OldDesignator=D3 NewDesignator=D4 +Change Component Designator: OldDesignator=D4 NewDesignator=D5 +Change Component Designator: OldDesignator=D5 NewDesignator=D6 +Change Component Designator: OldDesignator=D6 NewDesignator=D7 +Change Component Designator: OldDesignator=R18 NewDesignator=R20 +Change Component Designator: OldDesignator=R20 NewDesignator=R24 +Change Component Designator: OldDesignator=R21 NewDesignator=R25 +Change Component Designator: OldDesignator=R22 NewDesignator=R26 +Change Component Designator: OldDesignator=R23 NewDesignator=R27 +Change Component Designator: OldDesignator=R24 NewDesignator=R28 +Change Component Designator: OldDesignator=R25 NewDesignator=R29 +Change Component Designator: OldDesignator=R26 NewDesignator=R30 +Change Component Designator: OldDesignator=R27 NewDesignator=R31 +Change Component Designator: OldDesignator=R28 NewDesignator=R32 +Change Component Designator: OldDesignator=R29 NewDesignator=R33 +Change Component Designator: OldDesignator=R31 NewDesignator=R34 +Change Component Designator: OldDesignator=R32 NewDesignator=R35 +Change Component Designator: OldDesignator=R33 NewDesignator=R36 +Change Component Designator: OldDesignator=R34 NewDesignator=R37 +Change Component Designator: OldDesignator=R35 NewDesignator=R38 +Change Component Designator: OldDesignator=R36 NewDesignator=R39 +Change Component Designator: OldDesignator=R37 NewDesignator=R40 +Change Component Designator: OldDesignator=R38 NewDesignator=R41 +Change Component Designator: OldDesignator=R39 NewDesignator=R42 +Change Component Designator: OldDesignator=R40 NewDesignator=R43 +Change Component Designator: OldDesignator=R41 NewDesignator=R44 +Change Component Designator: OldDesignator=R42 NewDesignator=R45 +Change Component Designator: OldDesignator=R43 NewDesignator=R46 +Change Component Designator: OldDesignator=R44 NewDesignator=R47 +Change Component Designator: OldDesignator=R45 NewDesignator=R48 +Change Component Designator: OldDesignator=R46 NewDesignator=R49 +Change Component Designator: OldDesignator=R47 NewDesignator=R50 +Change Component Designator: OldDesignator=R48 NewDesignator=R51 +Change Component Designator: OldDesignator=R49 NewDesignator=R52 +Change Component Designator: OldDesignator=R50 NewDesignator=R53 +Change Component Designator: OldDesignator=R51 NewDesignator=R54 +Change Component Designator: OldDesignator=R52 NewDesignator=R55 +Change Component Designator: OldDesignator=R53 NewDesignator=R56 +Change Component Designator: OldDesignator=R54 NewDesignator=R57 +Change Component Designator: OldDesignator=R55 NewDesignator=R58 +Change Component Designator: OldDesignator=R56 NewDesignator=R59 +Change Component Designator: OldDesignator=R57 NewDesignator=R60 +Change Component Designator: OldDesignator=R58 NewDesignator=R61 +Change Component Designator: OldDesignator=R59 NewDesignator=R62 +Change Component Designator: OldDesignator=R60 NewDesignator=R63 +Change Component Designator: OldDesignator=R61 NewDesignator=R64 +Change Component Designator: OldDesignator=R62 NewDesignator=R65 +Change Component Designator: OldDesignator=R63 NewDesignator=R66 +Change Component Designator: OldDesignator=R64 NewDesignator=R67 +Change Component Designator: OldDesignator=R65 NewDesignator=R68 +Change Component Designator: OldDesignator=R66 NewDesignator=R69 +Change Component Designator: OldDesignator=R67 NewDesignator=R70 +Change Component Designator: OldDesignator=V2 NewDesignator=V3 +Added Component: Designator=CN8(CONN-TH_2P-P2.50_HX25003-2A) +Added Component: Designator=D2(D0805) +Added Component: Designator=R18(EIA0603) +Added Component: Designator=R21(EIA0603) +Added Component: Designator=R22(EIA0603) +Added Component: Designator=R23(EIA0603) +Added Component: Designator=V2(SOD-323) +Added Pin To Net: NetName=GND Pin=CN8-1 +Added Pin To Net: NetName=NetCN7_2 Pin=D1-2 +Added Pin To Net: NetName=NetCN7_2 Pin=R18-1 +Added Pin To Net: NetName=D3V3 Pin=R18-2 +Added Pin To Net: NetName=D3V3 Pin=R19-1 +Added Pin To Net: NetName=D3V3 Pin=R21-2 +Added Pin To Net: NetName=D3V3 Pin=R22-1 +Added Pin To Net: NetName=GND Pin=V2-K +Change Net Name : Old Net Name=NetC46_1 New Net Name=NetC45_1 +Change Net Name : Old Net Name=NetC47_1 New Net Name=NetC46_1 +Change Net Name : Old Net Name=NetC49_1 New Net Name=NetC48_1 +Change Net Name : Old Net Name=NetC50_1 New Net Name=NetC49_1 +Change Net Name : Old Net Name=NetC53_1 New Net Name=NetC52_1 +Change Net Name : Old Net Name=NetC55_1 New Net Name=NetC54_1 +Change Net Name : Old Net Name=NetC56_1 New Net Name=NetC55_1 +Change Net Name : Old Net Name=NetCN10_1 New Net Name=NetCN11_1 +Change Net Name : Old Net Name=NetCN10_2 New Net Name=NetCN11_2 +Change Net Name : Old Net Name=NetCN10_3 New Net Name=NetCN11_3 +Change Net Name : Old Net Name=NetCN11_1 New Net Name=NetCN12_1 +Change Net Name : Old Net Name=NetCN11_2 New Net Name=NetCN12_2 +Change Net Name : Old Net Name=NetCN11_3 New Net Name=NetCN12_3 +Change Net Name : Old Net Name=NetD5_2 New Net Name=NetD6_2 +Change Net Name : Old Net Name=NetD6_1 New Net Name=NetD7_1 +Change Net Name : Old Net Name=NetD6_2 New Net Name=NetD7_2 +Change Net Name : Old Net Name=NetD6_3 New Net Name=NetD7_3 +Change Net Name : Old Net Name=NetD6_4 New Net Name=NetD7_4 +Change Net Name : Old Net Name=NetR18_2 New Net Name=NetR20_2 +Change Net Name : Old Net Name=NetR20_1 New Net Name=NetR24_1 +Change Net Name : Old Net Name=NetR24_1 New Net Name=NetR28_1 +Change Net Name : Old Net Name=NetR26_1 New Net Name=NetR30_1 +Change Net Name : Old Net Name=NetR32_2 New Net Name=NetR35_2 +Change Net Name : Old Net Name=NetR34_2 New Net Name=NetR37_2 +Change Net Name : Old Net Name=NetR35_2 New Net Name=NetR38_2 +Change Net Name : Old Net Name=NetR36_2 New Net Name=NetR39_2 +Change Net Name : Old Net Name=NetR37_2 New Net Name=NetR40_2 +Change Net Name : Old Net Name=NetR38_1 New Net Name=NetR41_1 +Change Net Name : Old Net Name=NetR39_1 New Net Name=NetR42_1 +Change Net Name : Old Net Name=NetR40_1 New Net Name=NetR43_1 +Change Net Name : Old Net Name=NetR42_1 New Net Name=NetR45_1 +Change Net Name : Old Net Name=NetR45_1 New Net Name=NetR48_1 +Change Net Name : Old Net Name=NetR45_2 New Net Name=NetR48_2 +Change Net Name : Old Net Name=NetR49_1 New Net Name=NetR52_1 +Change Net Name : Old Net Name=NetR50_2 New Net Name=NetR53_2 +Change Net Name : Old Net Name=NetR51_1 New Net Name=NetR54_1 +Change Net Name : Old Net Name=NetR55_2 New Net Name=NetR58_2 +Change Net Name : Old Net Name=NetR57_1 New Net Name=NetR60_1 +Change Net Name : Old Net Name=NetR57_2 New Net Name=NetR60_2 +Change Net Name : Old Net Name=NetR58_1 New Net Name=NetR61_1 +Change Net Name : Old Net Name=NetR58_2 New Net Name=NetR61_2 +Change Net Name : Old Net Name=NetR59_1 New Net Name=NetR62_1 +Change Net Name : Old Net Name=NetR59_2 New Net Name=NetR62_2 +Change Net Name : Old Net Name=NetR60_1 New Net Name=NetR63_1 +Change Net Name : Old Net Name=NetR60_2 New Net Name=NetR63_2 +Change Net Name : Old Net Name=NetR62_1 New Net Name=NetR65_1 +Change Net Name : Old Net Name=NetR62_2 New Net Name=NetR65_2 +Change Net Name : Old Net Name=NetR63_1 New Net Name=NetR66_1 +Change Net Name : Old Net Name=NetR64_2 New Net Name=NetR67_2 +Change Net Name : Old Net Name=NetR65_1 New Net Name=NetR68_1 +Added Pin To Net: NetName=NetCN8_2 Pin=CN8-2 +Added Pin To Net: NetName=NetCN8_2 Pin=D2-2 +Added Pin To Net: NetName=NetCN8_2 Pin=R21-1 +Added Pin To Net: NetName=NetCN8_2 Pin=R23-1 +Added Pin To Net: NetName=NetCN8_2 Pin=V2-A +Added Net: Name=NetCN8_2 +Added Pin To Net: NetName=NetD2_1 Pin=D2-1 +Added Pin To Net: NetName=NetD2_1 Pin=R22-2 +Added Net: Name=NetD2_1 +Added Pin To Net: NetName=NetR23_2 Pin=R23-2 +Added Net: Name=NetR23_2 +Added Member To Class: ClassName= Member=Component CN8 ZX-XH2.54-2PZZ +Added Member To Class: ClassName= Member=Component D3 1N4007 +Added Member To Class: ClassName= Member=Component R22 3.3K +Added Member To Class: ClassName= Member=Component R23 1K +Added Member To Class: ClassName= Member=Component R24 100R +Added Member To Class: ClassName= Member=Component R25 100K +Added Member To Class: ClassName= Member=Component V2 SD05C +Added Room: Name=MAIN +Added Room: Name= +Added Room: Name=¿أPT100ɿع裩 +Added Room: Name= +Added Room: Name=Դ8V5V3.3V +Added Room: Name= +Added Room: Name=ͨţ׿ԡӡ diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-41-24.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-41-24.LOG new file mode 100644 index 0000000..f95a83f --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-41-24.LOG @@ -0,0 +1,26 @@ +Removed Member From Class: ClassName= Member=CN11 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=CN11 +Removed Member From Class: ClassName= Member=D4 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=D6 +Removed Member From Class: ClassName= Member=R27 +Removed Member From Class: ClassName= Member=R28 +Removed Member From Class: ClassName= Member=R30 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R30 +Removed Member From Class: ClassName= Member=R33 +Removed Member From Class: ClassName= Member=V3 +Change Component Footprint: Designator=D4 Old Footprint=SMB_L4.6-W3.6-LS5.3-RD New Footprint=SMA_L4.3-W2.5-LS5.0-RD +Change Component Comment : Designator=D4 Old Comment=SS54 New Comment=1N4007 +Added Component: Designator=D8(SMB_L4.6-W3.6-LS5.4-BI) +Added Pin To Net: NetName=GND Pin=D8-1 +Added Pin To Net: NetName=V24V Pin=D8-2 +Added Member To Class: ClassName= Member=Component CN8 ZX-XH2.54-2PZZ +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component CN10 VH3.96-2P ZZ +Added Member To Class: ClassName= Member=Component D2 ORG_LED +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D5 SS54 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D8 SMBJ24CA +Added Member To Class: ClassName= Member=Component R18 10K +Added Member To Class: ClassName= Member=Component R21 10K +Added Member To Class: ClassName= Member=Component R22 3.3K +Added Member To Class: ClassName= Member=Component R23 1K +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R26 10K/1% +Added Member To Class: ClassName= Member=Component V2 SD05C diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-42-39.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-42-39.LOG new file mode 100644 index 0000000..dcc4420 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-42-39.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=GND Pin=CN9-1 +Removed Pin From Net: NetName=V24V Pin=CN9-2 +Added Pin To Net: NetName=V24V Pin=CN9-1 +Added Pin To Net: NetName=GND Pin=CN9-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-45-01.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-45-01.LOG new file mode 100644 index 0000000..6ddfe3c --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 10-45-01.LOG @@ -0,0 +1,8 @@ +Removed Pin From Net: NetName=NetCN12_2 Pin=R57-2 +Removed Pin From Net: NetName=NetCN12_1 Pin=R59-2 +Removed Pin From Net: NetName=NetCN12_2 Pin=U13-6 +Removed Pin From Net: NetName=NetCN12_1 Pin=U13-7 +Added Pin To Net: NetName=NetCN12_1 Pin=R57-2 +Added Pin To Net: NetName=NetCN12_2 Pin=R59-2 +Added Pin To Net: NetName=NetCN12_1 Pin=U13-6 +Added Pin To Net: NetName=NetCN12_2 Pin=U13-7 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 15-29-28.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 15-29-28.LOG new file mode 100644 index 0000000..7f4d2db --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 15-29-28.LOG @@ -0,0 +1,143 @@ +Removed Pin From Net: NetName=A3V3 Pin=C39-1 +Removed Pin From Net: NetName=A3V3 Pin=U8-5 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=D8 +Change Component Designator: OldDesignator=C40 NewDesignator=C41 +Change Component Designator: OldDesignator=C41 NewDesignator=C42 +Change Component Designator: OldDesignator=C42 NewDesignator=C43 +Change Component Designator: OldDesignator=C43 NewDesignator=C44 +Change Component Designator: OldDesignator=C44 NewDesignator=C45 +Change Component Designator: OldDesignator=C45 NewDesignator=C46 +Change Component Designator: OldDesignator=C46 NewDesignator=C47 +Change Component Designator: OldDesignator=C47 NewDesignator=C48 +Change Component Designator: OldDesignator=C48 NewDesignator=C49 +Change Component Designator: OldDesignator=C49 NewDesignator=C50 +Change Component Designator: OldDesignator=C50 NewDesignator=C51 +Change Component Designator: OldDesignator=C51 NewDesignator=C52 +Change Component Designator: OldDesignator=C52 NewDesignator=C53 +Change Component Designator: OldDesignator=C53 NewDesignator=C54 +Change Component Designator: OldDesignator=C54 NewDesignator=C55 +Change Component Designator: OldDesignator=C55 NewDesignator=C56 +Change Component Designator: OldDesignator=C56 NewDesignator=C57 +Change Component Designator: OldDesignator=CN7 NewDesignator=CN8 +Change Component Designator: OldDesignator=CN8 NewDesignator=CN7 +Change Component Designator: OldDesignator=D1 NewDesignator=D2 +Change Component Designator: OldDesignator=D2 NewDesignator=D1 +Change Component Designator: OldDesignator=D5 NewDesignator=D6 +Change Component Designator: OldDesignator=D6 NewDesignator=D7 +Change Component Designator: OldDesignator=D7 NewDesignator=D8 +Change Component Designator: OldDesignator=D8 NewDesignator=D5 +Change Component Designator: OldDesignator=R18 NewDesignator=R20 +Change Component Designator: OldDesignator=R19 NewDesignator=R21 +Change Component Designator: OldDesignator=R20 NewDesignator=R23 +Change Component Designator: OldDesignator=R21 NewDesignator=R18 +Change Component Designator: OldDesignator=R22 NewDesignator=R19 +Change Component Designator: OldDesignator=R23 NewDesignator=R22 +Change Component Designator: OldDesignator=R28 NewDesignator=R29 +Change Component Designator: OldDesignator=R29 NewDesignator=R30 +Change Component Designator: OldDesignator=R30 NewDesignator=R31 +Change Component Designator: OldDesignator=R31 NewDesignator=R32 +Change Component Designator: OldDesignator=R32 NewDesignator=R33 +Change Component Designator: OldDesignator=R33 NewDesignator=R34 +Change Component Designator: OldDesignator=R34 NewDesignator=R35 +Change Component Designator: OldDesignator=R35 NewDesignator=R36 +Change Component Designator: OldDesignator=R36 NewDesignator=R37 +Change Component Designator: OldDesignator=R37 NewDesignator=R38 +Change Component Designator: OldDesignator=R38 NewDesignator=R39 +Change Component Designator: OldDesignator=R39 NewDesignator=R40 +Change Component Designator: OldDesignator=R40 NewDesignator=R41 +Change Component Designator: OldDesignator=R41 NewDesignator=R42 +Change Component Designator: OldDesignator=R42 NewDesignator=R43 +Change Component Designator: OldDesignator=R43 NewDesignator=R44 +Change Component Designator: OldDesignator=R44 NewDesignator=R45 +Change Component Designator: OldDesignator=R45 NewDesignator=R46 +Change Component Designator: OldDesignator=R46 NewDesignator=R47 +Change Component Designator: OldDesignator=R47 NewDesignator=R48 +Change Component Designator: OldDesignator=R48 NewDesignator=R49 +Change Component Designator: OldDesignator=R49 NewDesignator=R50 +Change Component Designator: OldDesignator=R50 NewDesignator=R51 +Change Component Designator: OldDesignator=R51 NewDesignator=R52 +Change Component Designator: OldDesignator=R52 NewDesignator=R53 +Change Component Designator: OldDesignator=R53 NewDesignator=R54 +Change Component Designator: OldDesignator=R54 NewDesignator=R55 +Change Component Designator: OldDesignator=R55 NewDesignator=R56 +Change Component Designator: OldDesignator=R56 NewDesignator=R57 +Change Component Designator: OldDesignator=R57 NewDesignator=R58 +Change Component Designator: OldDesignator=R58 NewDesignator=R59 +Change Component Designator: OldDesignator=R59 NewDesignator=R60 +Change Component Designator: OldDesignator=R60 NewDesignator=R61 +Change Component Designator: OldDesignator=R61 NewDesignator=R62 +Change Component Designator: OldDesignator=R62 NewDesignator=R63 +Change Component Designator: OldDesignator=R63 NewDesignator=R64 +Change Component Designator: OldDesignator=R64 NewDesignator=R65 +Change Component Designator: OldDesignator=R65 NewDesignator=R66 +Change Component Designator: OldDesignator=R66 NewDesignator=R67 +Change Component Designator: OldDesignator=R67 NewDesignator=R68 +Change Component Designator: OldDesignator=R68 NewDesignator=R69 +Change Component Designator: OldDesignator=R69 NewDesignator=R70 +Change Component Designator: OldDesignator=R70 NewDesignator=R71 +Change Component Designator: OldDesignator=V1 NewDesignator=V2 +Change Component Designator: OldDesignator=V2 NewDesignator=V1 +Added Component: Designator=C40(EIA0603) +Added Component: Designator=D?(SOD-123_L2.7-W1.6-LS3.7-FD) +Added Component: Designator=R28(EIA0603) +Added Pin To Net: NetName=A3V3 Pin=C40-1 +Added Pin To Net: NetName=GND Pin=C40-2 +Added Pin To Net: NetName=A3V3 Pin=R28-1 +Change Net Name : Old Net Name=NetC40_1 New Net Name=NetC41_1 +Change Net Name : Old Net Name=NetC41_1 New Net Name=NetC42_1 +Change Net Name : Old Net Name=NetC45_1 New Net Name=NetC46_1 +Change Net Name : Old Net Name=NetC46_1 New Net Name=NetC47_1 +Change Net Name : Old Net Name=NetC48_1 New Net Name=NetC49_1 +Change Net Name : Old Net Name=NetC49_1 New Net Name=NetC50_1 +Change Net Name : Old Net Name=NetC52_1 New Net Name=NetC53_1 +Change Net Name : Old Net Name=NetC54_1 New Net Name=NetC55_1 +Change Net Name : Old Net Name=NetC55_1 New Net Name=NetC56_1 +Change Net Name : Old Net Name=NetCN7_2 New Net Name=NetCN8_2 +Change Net Name : Old Net Name=NetCN8_2 New Net Name=NetCN7_2 +Change Net Name : Old Net Name=NetD1_1 New Net Name=NetD2_1 +Change Net Name : Old Net Name=NetD2_1 New Net Name=NetD1_1 +Change Net Name : Old Net Name=NetD6_2 New Net Name=NetD7_2 +Change Net Name : Old Net Name=NetD7_1 New Net Name=NetD8_1 +Change Net Name : Old Net Name=NetD7_2 New Net Name=NetD8_2 +Change Net Name : Old Net Name=NetD7_3 New Net Name=NetD8_3 +Change Net Name : Old Net Name=NetD7_4 New Net Name=NetD8_4 +Change Net Name : Old Net Name=NetR20_2 New Net Name=NetR23_2 +Change Net Name : Old Net Name=NetR23_2 New Net Name=NetR22_2 +Change Net Name : Old Net Name=NetR28_1 New Net Name=NetR29_1 +Change Net Name : Old Net Name=NetR30_1 New Net Name=NetR31_1 +Change Net Name : Old Net Name=NetR35_2 New Net Name=NetR36_2 +Change Net Name : Old Net Name=NetR37_2 New Net Name=NetR38_2 +Change Net Name : Old Net Name=NetR38_2 New Net Name=NetR39_2 +Change Net Name : Old Net Name=NetR39_2 New Net Name=NetR40_2 +Change Net Name : Old Net Name=NetR40_2 New Net Name=NetR41_2 +Change Net Name : Old Net Name=NetR41_1 New Net Name=NetR42_1 +Change Net Name : Old Net Name=NetR42_1 New Net Name=NetR43_1 +Change Net Name : Old Net Name=NetR43_1 New Net Name=NetR44_1 +Change Net Name : Old Net Name=NetR45_1 New Net Name=NetR46_1 +Change Net Name : Old Net Name=NetR48_1 New Net Name=NetR49_1 +Change Net Name : Old Net Name=NetR48_2 New Net Name=NetR49_2 +Change Net Name : Old Net Name=NetR52_1 New Net Name=NetR53_1 +Change Net Name : Old Net Name=NetR53_2 New Net Name=NetR54_2 +Change Net Name : Old Net Name=NetR54_1 New Net Name=NetR55_1 +Change Net Name : Old Net Name=NetR58_2 New Net Name=NetR59_2 +Change Net Name : Old Net Name=NetR60_1 New Net Name=NetR61_1 +Change Net Name : Old Net Name=NetR60_2 New Net Name=NetR61_2 +Change Net Name : Old Net Name=NetR61_1 New Net Name=NetR62_1 +Change Net Name : Old Net Name=NetR61_2 New Net Name=NetR62_2 +Change Net Name : Old Net Name=NetR62_1 New Net Name=NetR63_1 +Change Net Name : Old Net Name=NetR62_2 New Net Name=NetR63_2 +Change Net Name : Old Net Name=NetR63_1 New Net Name=NetR64_1 +Change Net Name : Old Net Name=NetR63_2 New Net Name=NetR64_2 +Change Net Name : Old Net Name=NetR65_1 New Net Name=NetR66_1 +Change Net Name : Old Net Name=NetR65_2 New Net Name=NetR66_2 +Change Net Name : Old Net Name=NetR66_1 New Net Name=NetR67_1 +Change Net Name : Old Net Name=NetR67_2 New Net Name=NetR68_2 +Change Net Name : Old Net Name=NetR68_1 New Net Name=NetR69_1 +Added Pin To Net: NetName=NetC39_1 Pin=C39-1 +Added Pin To Net: NetName=NetC39_1 Pin=R28-2 +Added Pin To Net: NetName=NetC39_1 Pin=U8-5 +Added Net: Name=NetC39_1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component C40 1uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D6 SS54 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component D? 1N5819W +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R29 10K diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-15-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-15-17.LOG new file mode 100644 index 0000000..bd13416 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-15-17.LOG @@ -0,0 +1,19 @@ +Removed Pin From Net: NetName=A3V3 Pin=C52-1 +Removed Pin From Net: NetName=AGND Pin=C52-2 +Removed Pin From Net: NetName=A3V3 Pin=R56-2 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=C44 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C52 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=D5 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=D7 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R31 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=R56 +Added Component: Designator=D?(SOD-123_L2.7-W1.6-LS3.7-FD) +Added Pin To Net: NetName=A3V3 Pin=C53-1 +Added Pin To Net: NetName=A3V3 Pin=U13-12 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component C40 1uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D5 SMBJ24CA +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component D8 HDL10S +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component D? 1N5819W +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R28 0R +Change Room Name: Old Name=RoomDefinition_1 New Name=Դ8V5V3.3V +Change Room Scope: Old Scope=InComponentClass('Room Definition 4') New Scope=InComponentClass('Դ8V5V3.3V') diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-28-12.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-28-12.LOG new file mode 100644 index 0000000..84c26a0 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-28-12.LOG @@ -0,0 +1,2 @@ +Change Room Name: Old Name=RoomDefinition_1 New Name=Դ8V5V3.3V +Change Room Scope: Old Scope=InComponentClass('Room Definition 2') New Scope=InComponentClass('Դ8V5V3.3V') diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-29-05.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-29-05.LOG new file mode 100644 index 0000000..28d1aed --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-29-05.LOG @@ -0,0 +1,2 @@ +Change Component Footprint: Designator=R54 Old Footprint=EIA0603 New Footprint=R2512 +Change Component Footprint: Designator=R68 Old Footprint=EIA0603 New Footprint=R2512 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-34-20.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-34-20.LOG new file mode 100644 index 0000000..438e99b --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-34-20.LOG @@ -0,0 +1,27 @@ +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=U12 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=U15 +Change Component Designator: OldDesignator=D? NewDesignator=D9 +Added Component: Designator=C52(EIA1206) +Added Component: Designator=C58(EIA1206) +Added Component: Designator=C59(EIA1206) +Added Component: Designator=C60(EIA1206) +Added Pin To Net: NetName=NetC52_1 Pin=C52-1 +Added Pin To Net: NetName=NetC52_1 Pin=C58-1 +Added Pin To Net: NetName=NetC52_1 Pin=R54-2 +Added Net: Name=NetC52_1 +Added Pin To Net: NetName=NetC52_2 Pin=C52-2 +Added Pin To Net: NetName=NetC52_2 Pin=C58-2 +Added Pin To Net: NetName=NetC52_2 Pin=Q3-1 +Added Net: Name=NetC52_2 +Added Pin To Net: NetName=NetC59_1 Pin=C59-1 +Added Pin To Net: NetName=NetC59_1 Pin=C60-1 +Added Pin To Net: NetName=NetC59_1 Pin=R68-2 +Added Net: Name=NetC59_1 +Added Pin To Net: NetName=NetC59_2 Pin=C59-2 +Added Pin To Net: NetName=NetC59_2 Pin=C60-2 +Added Pin To Net: NetName=NetC59_2 Pin=Q5-1 +Added Net: Name=NetC59_2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C52 10nF/1KV +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C58 10nF/1KV +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C59 10nF/1KV +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C60 10nF/1KV diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-46-54.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-46-54.LOG new file mode 100644 index 0000000..287ff2a --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-46-54.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=L Pin=P2-1 +Removed Pin From Net: NetName=N Pin=P2-2 +Added Pin To Net: NetName=N Pin=P2-1 +Added Pin To Net: NetName=L Pin=P2-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-49-59.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-49-59.LOG new file mode 100644 index 0000000..c4201e2 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 16-49-59.LOG @@ -0,0 +1,4 @@ +Added Pin To Net: NetName=NetC52_2 Pin=P4-2 +Added Pin To Net: NetName=NetC59_2 Pin=P6-2 +Change Net Name : Old Net Name=NetC52_2 New Net Name=N1S +Change Net Name : Old Net Name=NetC59_2 New Net Name=N2S diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 17-04-03.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 17-04-03.LOG new file mode 100644 index 0000000..d64f40e --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-10 17-04-03.LOG @@ -0,0 +1,4 @@ +Added Component: Designator=P?(HEATSINK-TH_L23.5-W16.0-P18.0_XSD2156-067) +Added Component: Designator=Q?(TO-3P-3_L15.8-W4.8-P5.45-L) +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P? XSD2156-067 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA41-800BW diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-20-14.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-20-14.LOG new file mode 100644 index 0000000..c1ed930 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-20-14.LOG @@ -0,0 +1,3 @@ +Removed Pin From Net: NetName=N1S Pin=Q?1-1 +Added Component: Designator=P?(HEATSINK-TH_L35.0-W25.0_C4708) +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P? 30*25*25 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-39-51.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-39-51.LOG new file mode 100644 index 0000000..fcd50d5 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 10-39-51.LOG @@ -0,0 +1,3 @@ +Added Component: Designator=C?(CAP-TH_L12.0-W4.5-P10.00-D0.6) +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C? 0.1uF +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P? 30*25*25 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-49-41.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-49-41.LOG new file mode 100644 index 0000000..d5c7f5f --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-49-41.LOG @@ -0,0 +1,16 @@ +Removed Pin From Net: NetName=PA13/JTMS Pin=P1-1 +Removed Pin From Net: NetName=PA14/JTCK Pin=P1-2 +Removed Pin From Net: NetName=PB4/JRST Pin=P1-3 +Removed Pin From Net: NetName=3V3 Pin=P1-4 +Removed Pin From Net: NetName=GND Pin=P1-5 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C? +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=D9 +Removed Member From Class: ClassName=MAIN Member=P1 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=P? +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=Q? +Added Component: Designator=CN?(CONN-TH_4P-P2.50_4PIN) +Added Pin To Net: NetName=3V3 Pin=CN?-1 +Added Pin To Net: NetName=PA14/JTCK Pin=CN?-2 +Added Pin To Net: NetName=PA13/JTMS Pin=CN?-3 +Added Pin To Net: NetName=GND Pin=CN?-4 +Added Member To Class: ClassName=MAIN Member=Component CN? ZX-XH2.54-4PZZ diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-59-24.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-59-24.LOG new file mode 100644 index 0000000..2bc41f4 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 11-59-24.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=V5V Pin=RLY1-1 +Removed Pin From Net: NetName=NetD7_2 Pin=RLY1-2 +Added Pin To Net: NetName=NetD7_2 Pin=RLY1-1 +Added Pin To Net: NetName=V5V Pin=RLY1-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-22-08.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-22-08.LOG new file mode 100644 index 0000000..34548f3 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-22-08.LOG @@ -0,0 +1,12 @@ +Added Pin To Net: NetName=PA4/ADS1220-RDY Pin=R41-1 +Added Pin To Net: NetName=PA4/ADS1220-RDY Pin=U3-20 +Added Net: Name=PA4/ADS1220-RDY +Added Pin To Net: NetName=PA5/SPI1-SCK Pin=R38-1 +Added Pin To Net: NetName=PA5/SPI1-SCK Pin=U3-21 +Added Net: Name=PA5/SPI1-SCK +Added Pin To Net: NetName=PA6/SPI1-MOSI Pin=R39-1 +Added Pin To Net: NetName=PA6/SPI1-MOSI Pin=U3-22 +Added Net: Name=PA6/SPI1-MOSI +Added Pin To Net: NetName=PA7/SPI1-MISO Pin=R40-1 +Added Pin To Net: NetName=PA7/SPI1-MISO Pin=U3-23 +Added Net: Name=PA7/SPI1-MISO diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-29-54.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-29-54.LOG new file mode 100644 index 0000000..3232c41 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-29-54.LOG @@ -0,0 +1,12 @@ +Added Pin To Net: NetName=PB12/ADS1220-RDY Pin=R66-1 +Added Pin To Net: NetName=PB12/ADS1220-RDY Pin=U3-33 +Added Net: Name=PB12/ADS1220-RDY +Added Pin To Net: NetName=PB13/SPI1-SCK Pin=R61-1 +Added Pin To Net: NetName=PB13/SPI1-SCK Pin=U3-34 +Added Net: Name=PB13/SPI1-SCK +Added Pin To Net: NetName=PB14/SPI1-MISO Pin=R63-1 +Added Pin To Net: NetName=PB14/SPI1-MISO Pin=U3-35 +Added Net: Name=PB14/SPI1-MISO +Added Pin To Net: NetName=PB15/SPI1-MOSI Pin=R62-1 +Added Pin To Net: NetName=PB15/SPI1-MOSI Pin=U3-36 +Added Net: Name=PB15/SPI1-MOSI diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-46-16.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-46-16.LOG new file mode 100644 index 0000000..ebf6699 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 13-46-16.LOG @@ -0,0 +1,16 @@ +Added Component: Designator=R?(EIA0603) +Added Pin To Net: NetName=PA0/TIM2-CH1 Pin=U3-14 +Added Pin To Net: NetName=PA0/TIM2-CH1 Pin=U4-16 +Added Net: Name=PA0/TIM2-CH1 +Added Pin To Net: NetName=PA1 Pin=R13-1 +Added Pin To Net: NetName=PA1 Pin=U3-15 +Added Pin To Net: NetName=PA1 Pin=U4-2 +Added Net: Name=PA1 +Added Pin To Net: NetName=PA2/UART2-TX Pin=R?-2 +Added Pin To Net: NetName=PA2/UART2-TX Pin=U3-16 +Added Net: Name=PA2/UART2-TX +Added Pin To Net: NetName=PA3/UART2-RX Pin=R?-1 +Added Pin To Net: NetName=PA3/UART2-RX Pin=U3-17 +Added Pin To Net: NetName=PA3/UART2-RX Pin=U4-14 +Added Net: Name=PA3/UART2-RX +Added Member To Class: ClassName= Member=Component R? 1K diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-13-04.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-13-04.LOG new file mode 100644 index 0000000..59c7082 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-13-04.LOG @@ -0,0 +1,6 @@ +Added Pin To Net: NetName=PB6/TIM4-CH1 Pin=U2-2 +Added Pin To Net: NetName=PB6/TIM4-CH1 Pin=U3-58 +Added Net: Name=PB6/TIM4-CH1 +Added Pin To Net: NetName=PB7/TIM4-CH2 Pin=U2-4 +Added Pin To Net: NetName=PB7/TIM4-CH2 Pin=U3-59 +Added Net: Name=PB7/TIM4-CH2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-18-50.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-18-50.LOG new file mode 100644 index 0000000..6597e64 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-18-50.LOG @@ -0,0 +1,9 @@ +Added Pin To Net: NetName=PA9/UART1_TX Pin=U3-42 +Added Net: Name=PA9/UART1_TX +Added Pin To Net: NetName=PA10/UART1_RX Pin=R3-2 +Added Pin To Net: NetName=PA10/UART1_RX Pin=U3-43 +Added Net: Name=PA10/UART1_RX +Added Pin To Net: NetName=PA11/UART6_TX Pin=U3-44 +Added Net: Name=PA11/UART6_TX +Added Pin To Net: NetName=PA12/UART6_RX Pin=U3-45 +Added Net: Name=PA12/UART6_RX diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-19-58.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-19-58.LOG new file mode 100644 index 0000000..45e4048 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-19-58.LOG @@ -0,0 +1,3 @@ +Added Pin To Net: NetName=PA9/UART1_TX Pin=R1-2 +Added Pin To Net: NetName=PA11/UART6_TX Pin=R2-2 +Added Pin To Net: NetName=PA12/UART6_RX Pin=R4-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-34-36.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-34-36.LOG new file mode 100644 index 0000000..2444c70 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-34-36.LOG @@ -0,0 +1,6 @@ +Added Pin To Net: NetName=PB4/TIM3-CH1 Pin=R55-1 +Added Pin To Net: NetName=PB4/TIM3-CH1 Pin=U3-56 +Added Net: Name=PB4/TIM3-CH1 +Added Pin To Net: NetName=PB5/TIM3-CH2 Pin=R69-1 +Added Pin To Net: NetName=PB5/TIM3-CH2 Pin=U3-57 +Added Net: Name=PB5/TIM3-CH2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-38-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-38-17.LOG new file mode 100644 index 0000000..b2e20e3 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-38-17.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=PB4/TIM3-CH1 Pin=R55-1 +Removed Pin From Net: NetName=PB5/TIM3-CH2 Pin=R69-1 +Added Pin To Net: NetName=PB5/TIM3-CH2 Pin=R55-1 +Added Pin To Net: NetName=PB4/TIM3-CH1 Pin=R69-1 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-51-40.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-51-40.LOG new file mode 100644 index 0000000..4c77af8 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-51-40.LOG @@ -0,0 +1,12 @@ +Removed Pin From Net: NetName=PB5/TIM3-CH2 Pin=R55-1 +Removed Pin From Net: NetName=PB4/TIM3-CH1 Pin=R69-1 +Added Pin To Net: NetName=PC4 Pin=R23-2 +Added Pin To Net: NetName=PC4 Pin=U3-24 +Added Net: Name=PC4 +Added Pin To Net: NetName=PC5 Pin=R22-2 +Added Pin To Net: NetName=PC5 Pin=U3-25 +Added Net: Name=PC5 +Added Pin To Net: NetName=PC6/TIM3-CH1 Pin=R69-1 +Added Net: Name=PC6/TIM3-CH1 +Added Pin To Net: NetName=PC7/TIM3-CH2 Pin=R55-1 +Added Net: Name=PC7/TIM3-CH2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-56-15.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-56-15.LOG new file mode 100644 index 0000000..f9d9bb5 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 14-56-15.LOG @@ -0,0 +1,6 @@ +Added Pin To Net: NetName=PB0 Pin=R22-2 +Added Pin To Net: NetName=PB0 Pin=U3-26 +Added Net: Name=PB0 +Added Pin To Net: NetName=PB1 Pin=R23-2 +Added Pin To Net: NetName=PB1 Pin=U3-27 +Added Net: Name=PB1 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-01-43.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-01-43.LOG new file mode 100644 index 0000000..6cb76bd --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-01-43.LOG @@ -0,0 +1,8 @@ +Removed Pin From Net: NetName=PB0 Pin=R22-2 +Removed Pin From Net: NetName=PB1 Pin=R23-2 +Added Pin To Net: NetName=PC7/TIM3-CH2 Pin=U3-37 +Added Pin To Net: NetName=PC6/TIM3-CH1 Pin=U3-38 +Added Pin To Net: NetName=PC4 Pin=R23-2 +Added Net: Name=PC4 +Added Pin To Net: NetName=PC5 Pin=R22-2 +Added Net: Name=PC5 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-13-19.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-13-19.LOG new file mode 100644 index 0000000..96f7a8e --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-13-19.LOG @@ -0,0 +1,9 @@ +Added Pin To Net: NetName=PC11 Pin=R24-1 +Added Pin To Net: NetName=PC11 Pin=U3-52 +Added Net: Name=PC11 +Added Pin To Net: NetName=PC12 Pin=R31-1 +Added Pin To Net: NetName=PC12 Pin=U3-53 +Added Net: Name=PC12 +Added Pin To Net: NetName=PD2 Pin=R43-1 +Added Pin To Net: NetName=PD2 Pin=U3-54 +Added Net: Name=PD2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-17-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-17-17.LOG new file mode 100644 index 0000000..ce2b84a --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-17-17.LOG @@ -0,0 +1,6 @@ +Removed Pin From Net: NetName=PC11 Pin=R24-1 +Removed Pin From Net: NetName=PC12 Pin=R31-1 +Removed Pin From Net: NetName=PD2 Pin=R43-1 +Added Pin To Net: NetName=PD2 Pin=R24-1 +Added Pin To Net: NetName=PC11 Pin=R31-1 +Added Pin To Net: NetName=PC12 Pin=R43-1 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-18-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-18-17.LOG new file mode 100644 index 0000000..e28336f --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-18-17.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=PC11 Pin=R31-1 +Removed Pin From Net: NetName=PC12 Pin=R43-1 +Added Pin To Net: NetName=PC12 Pin=R31-1 +Added Pin To Net: NetName=PC11 Pin=R43-1 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-25-25.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-25-25.LOG new file mode 100644 index 0000000..13c7caa --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 15-25-25.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=GND Pin=CN10-1 +Removed Pin From Net: NetName=V24V Pin=CN10-2 +Added Pin To Net: NetName=V24V Pin=CN10-1 +Added Pin To Net: NetName=GND Pin=CN10-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 16-26-55.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 16-26-55.LOG new file mode 100644 index 0000000..db058e6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-11 16-26-55.LOG @@ -0,0 +1,12 @@ +Removed Pin From Net: NetName=BOUT1 Pin=CN6-1 +Removed Pin From Net: NetName=AOUT2 Pin=CN6-2 +Removed Pin From Net: NetName=BOUT2 Pin=CN6-3 +Removed Pin From Net: NetName=AOUT1 Pin=CN6-4 +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Pin To Net: NetName=BOUT2 Pin=CN6-1 +Added Pin To Net: NetName=BOUT1 Pin=CN6-2 +Added Pin To Net: NetName=AOUT1 Pin=CN6-3 +Added Pin To Net: NetName=AOUT2 Pin=CN6-4 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-45-43.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-45-43.LOG new file mode 100644 index 0000000..71ec498 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-45-43.LOG @@ -0,0 +1,14 @@ +Added Component: Designator=2(Test_Point) +Added Component: Designator=A1(Test_Point) +Added Component: Designator=D6(SMB_L4.6-W3.6-LS5.3-RD) +Added Component: Designator=V3(Test_Point) +Added Pin To Net: NetName=3V3 Pin=2-1 +Added Pin To Net: NetName=A3V3 Pin=A1-1 +Added Pin To Net: NetName=NetC25_2 Pin=D6-1 +Added Pin To Net: NetName=GND Pin=D6-2 +Added Pin To Net: NetName=V5V Pin=V3-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 2 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component A1 TestPoint +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C? 10nF/630V/CBB +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D6 SS54 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V3 TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-49-36.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-49-36.LOG new file mode 100644 index 0000000..e3cd412 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 10-49-36.LOG @@ -0,0 +1 @@ +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C? 10nF/630V/CBB diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-00-06.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-00-06.LOG new file mode 100644 index 0000000..d5d8b51 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-00-06.LOG @@ -0,0 +1,7 @@ +Removed Pin From Net: NetName=PA9/UART1_TX Pin=R1-2 +Removed Pin From Net: NetName=PA11/UART6_TX Pin=R2-2 +Removed Member From Class: ClassName=ͨţ׿ԡӡ Member=R1 +Removed Member From Class: ClassName=ͨţ׿ԡӡ Member=R2 +Added Pin To Net: NetName=ANDROID_RXD Pin=CN4-1 +Added Pin To Net: NetName=ANDROID_TXD Pin=CN4-2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C? 10nF/630V/CBB diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-09-26.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-09-26.LOG new file mode 100644 index 0000000..a779dce --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-09-26.LOG @@ -0,0 +1,11 @@ +Change Component Designator: OldDesignator=C? NewDesignator=C18 +Change Component Designator: OldDesignator=C? NewDesignator=C52 +Added Pin To Net: NetName=GND Pin=CN14-1 +Added Pin To Net: NetName=PA12/UART6_RX Pin=CN14-2 +Added Pin To Net: NetName=PA11/UART6_TX Pin=CN14-3 +Change Net Name : Old Net Name=NetC?_2 New Net Name=NetC18_2 +Added Pin To Net: NetName=NetC52_2 Pin=C52-2 +Added Pin To Net: NetName=NetC52_2 Pin=R68-2 +Added Net: Name=NetC52_2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C52 10nF/630V/CBB +Added Member To Class: ClassName=MAIN Member=Component CN14 ZX-XH2.54-3PZZ diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-13-44.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-13-44.LOG new file mode 100644 index 0000000..e937a40 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 11-13-44.LOG @@ -0,0 +1,10 @@ +Added Component: Designator=Q3(TO-3P-3_L15.8-W4.8-P5.45-L) +Added Component: Designator=Q5(TO-3P-3_L15.8-W4.8-P5.45-L) +Added Pin To Net: NetName=N1S Pin=Q3-1 +Added Pin To Net: NetName=N Pin=Q3-2 +Added Pin To Net: NetName=NetQ3_3 Pin=Q3-3 +Added Pin To Net: NetName=N2S Pin=Q5-1 +Added Pin To Net: NetName=N Pin=Q5-2 +Added Pin To Net: NetName=NetQ5_3 Pin=Q5-3 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q3 BTA41-800BW +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q5 BTA41-800BW diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-07-33.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-07-33.LOG new file mode 100644 index 0000000..2530b8f --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-07-33.LOG @@ -0,0 +1,19 @@ +Removed Pin From Net: NetName=PA12/UART6_RX Pin=R4-2 +Removed Member From Class: ClassName=ͨţ׿ԡӡ Member=R4 +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=R?(EIA0603) +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=PA9/UART1_TX Pin=R?-2 +Added Pin To Net: NetName=NetR?_1 Pin=R?-1 +Added Pin To Net: NetName=NetR?_1 Pin=U1-11 +Added Net: Name=NetR?_1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=ͨţ׿ԡӡ Member=Component R? 100R +Added Room: Name=MAIN +Added Room: Name= +Added Room: Name=¿أPT100ɿع裩 +Added Room: Name= +Added Room: Name=Դ8V5V3.3V +Added Room: Name= +Added Room: Name=ͨţ׿ԡӡ diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-13-14.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-13-14.LOG new file mode 100644 index 0000000..5df5f55 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-13-14.LOG @@ -0,0 +1,21 @@ +Removed Pin From Net: NetName=D3V3 Pin=C45-2 +Removed Pin From Net: NetName=D3V3 Pin=C54-2 +Removed Pin From Net: NetName=D3V3 Pin=U9-13 +Removed Pin From Net: NetName=D3V3 Pin=U13-13 +Added Component: Designator=2(Test_Point) +Added Component: Designator=A1(Test_Point) +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=V3(Test_Point) +Added Pin To Net: NetName=3V3 Pin=2-1 +Added Pin To Net: NetName=A3V3 Pin=A1-1 +Added Pin To Net: NetName=3V3 Pin=C45-2 +Added Pin To Net: NetName=3V3 Pin=C54-2 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=3V3 Pin=U9-13 +Added Pin To Net: NetName=3V3 Pin=U13-13 +Added Pin To Net: NetName=V5V Pin=V3-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 2 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component A1 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V3 TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-17-02.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-17-02.LOG new file mode 100644 index 0000000..173cc03 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 13-17-02.LOG @@ -0,0 +1,11 @@ +Removed Pin From Net: NetName=A3V3 Pin=R28-1 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R28 +Removed Member From Class: ClassName=ͨţ׿ԡӡ Member=R56 +Change Component Comment : Designator=C40 Old Comment=1uF New Comment=0.1F +Change Component Designator: OldDesignator=1 NewDesignator=8V +Change Component Designator: OldDesignator=2 NewDesignator=3V3 +Change Component Designator: OldDesignator=A1 NewDesignator=A3V3 +Change Component Designator: OldDesignator=V3 NewDesignator=V5V +Added Pin To Net: NetName=A3V3 Pin=C39-1 +Added Pin To Net: NetName=A3V3 Pin=U8-5 +Added Member To Class: ClassName=ͨţ׿ԡӡ Member=Component R? 100R diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-35-34.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-35-34.LOG new file mode 100644 index 0000000..66f7d16 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-35-34.LOG @@ -0,0 +1,18 @@ +Added Component: Designator=3V3(Test_Point) +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=GND1(Test_Point) +Added Component: Designator=V5V(Test_Point) +Added Pin To Net: NetName=3V3 Pin=3V3-1 +Added Pin To Net: NetName=3V3 Pin=C24-1 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=GND Pin=GND1-1 +Added Pin To Net: NetName=3V3 Pin=R13-2 +Added Pin To Net: NetName=3V3 Pin=R56-2 +Added Pin To Net: NetName=3V3 Pin=R72-2 +Added Pin To Net: NetName=3V3 Pin=U4-15 +Added Pin To Net: NetName=V5V Pin=V5V-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 3V3 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component GND1 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V5V TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-42-35.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-42-35.LOG new file mode 100644 index 0000000..41d70a6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 14-42-35.LOG @@ -0,0 +1,17 @@ +Added Component: Designator=3V3(Test_Point) +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=GND1(Test_Point) +Added Component: Designator=V5V(Test_Point) +Added Pin To Net: NetName=3V3 Pin=3V3-1 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=GND Pin=GND1-1 +Added Pin To Net: NetName=3V3 Pin=R18-2 +Added Pin To Net: NetName=3V3 Pin=R19-1 +Added Pin To Net: NetName=3V3 Pin=R20-2 +Added Pin To Net: NetName=3V3 Pin=R21-1 +Added Pin To Net: NetName=V5V Pin=V5V-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 3V3 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component GND1 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V5V TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 16-26-52.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 16-26-52.LOG new file mode 100644 index 0000000..5555da4 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 16-26-52.LOG @@ -0,0 +1,17 @@ +Removed Pin From Net: NetName=V5V Pin=D7-1 +Removed Pin From Net: NetName=V5V Pin=RLY1-2 +Added Component: Designator=3V3(Test_Point) +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=GND1(Test_Point) +Added Component: Designator=V5V(Test_Point) +Added Pin To Net: NetName=3V3 Pin=3V3-1 +Added Pin To Net: NetName=V8V Pin=D7-1 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=GND Pin=GND1-1 +Added Pin To Net: NetName=V8V Pin=RLY1-2 +Added Pin To Net: NetName=V5V Pin=V5V-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 3V3 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component GND1 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V5V TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-19-38.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-19-38.LOG new file mode 100644 index 0000000..b5d5bb6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-19-38.LOG @@ -0,0 +1,25 @@ +Change Component Comment : Designator=RLY1 Old Comment=HF32F-G/005-HS New Comment=HRS3-S-DC9V-A +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=GND1(Test_Point) +Added Pin To Net: NetName=GND Pin=C41-2 +Added Pin To Net: NetName=GND Pin=C43-1 +Added Pin To Net: NetName=GND Pin=C44-2 +Added Pin To Net: NetName=GND Pin=C46-2 +Added Pin To Net: NetName=GND Pin=C48-1 +Added Pin To Net: NetName=GND Pin=C49-2 +Added Pin To Net: NetName=GND Pin=C51-1 +Added Pin To Net: NetName=GND Pin=C53-2 +Added Pin To Net: NetName=GND Pin=C55-2 +Added Pin To Net: NetName=GND Pin=C57-1 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=GND Pin=GND1-1 +Added Pin To Net: NetName=GND Pin=R30-1 +Added Pin To Net: NetName=GND Pin=R33-1 +Added Pin To Net: NetName=GND Pin=R48-1 +Added Pin To Net: NetName=GND Pin=R52-1 +Added Pin To Net: NetName=GND Pin=U9-5 +Added Pin To Net: NetName=GND Pin=U13-5 +Change Net Name : Old Net Name=GND New Net Name=AGND +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component GND1 TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-30-40.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-30-40.LOG new file mode 100644 index 0000000..38ca67b --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-30-40.LOG @@ -0,0 +1 @@ +Change Net Name : Old Net Name=AGND New Net Name=GND diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-31-33.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-31-33.LOG new file mode 100644 index 0000000..92926d7 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 17-31-33.LOG @@ -0,0 +1,3 @@ +Added Component: Designator=A3V3(Test_Point) +Added Pin To Net: NetName=A3V3 Pin=A3V3-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component A3V3 TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-51-47.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-51-47.LOG new file mode 100644 index 0000000..2a23735 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-51-47.LOG @@ -0,0 +1,21 @@ +Removed Pin From Net: NetName=N1S Pin=Q3-1 +Removed Pin From Net: NetName=N Pin=Q3-2 +Removed Pin From Net: NetName=N2S Pin=Q5-1 +Removed Pin From Net: NetName=N Pin=Q5-2 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=Q3 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=Q5 +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=Q?(TO-220-3_L10.0-W4.5-P2.54-L) +Added Component: Designator=Q?(TO-220-3_L10.0-W4.5-P2.54-L) +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=N1S Pin=Q?-1 +Added Pin To Net: NetName=N2S Pin=Q?-1 +Added Pin To Net: NetName=N Pin=Q?-2 +Added Pin To Net: NetName=N Pin=Q?-2 +Added Pin To Net: NetName=NetQ?_3 Pin=Q?-3 +Added Pin To Net: NetName=NetQ?_3 Pin=U11-4 +Added Net: Name=NetQ?_3 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA24-800BWRG +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA24-800BWRG diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-53-25.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-53-25.LOG new file mode 100644 index 0000000..bd5d5c6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 18-53-25.LOG @@ -0,0 +1,9 @@ +Added Component: Designator=Q?(TO-220-3_L10.0-W4.5-P2.54-L) +Added Component: Designator=Q?(TO-220-3_L10.0-W4.5-P2.54-L) +Added Pin To Net: NetName=N1S Pin=Q?-1 +Added Pin To Net: NetName=N2S Pin=Q?-1 +Added Pin To Net: NetName=N Pin=Q?-2 +Added Pin To Net: NetName=N Pin=Q?-2 +Added Pin To Net: NetName=NetQ?_3 Pin=Q?-3 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA24-800BWRG +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA24-800BWRG diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 8-39-05.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 8-39-05.LOG new file mode 100644 index 0000000..3435bab --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 8-39-05.LOG @@ -0,0 +1,27 @@ +Removed Pin From Net: NetName=GND Pin=R71-1 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=R71 +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=R28(EIA0603) +Added Pin To Net: NetName=GND Pin=C41-2 +Added Pin To Net: NetName=GND Pin=C43-1 +Added Pin To Net: NetName=GND Pin=C44-2 +Added Pin To Net: NetName=GND Pin=C46-2 +Added Pin To Net: NetName=GND Pin=C48-1 +Added Pin To Net: NetName=GND Pin=C49-2 +Added Pin To Net: NetName=GND Pin=C51-1 +Added Pin To Net: NetName=GND Pin=C53-2 +Added Pin To Net: NetName=GND Pin=C55-2 +Added Pin To Net: NetName=GND Pin=C57-1 +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=A3V3 Pin=R28-1 +Added Pin To Net: NetName=NetC39_1 Pin=R28-2 +Added Pin To Net: NetName=GND Pin=R30-1 +Added Pin To Net: NetName=GND Pin=R33-1 +Added Pin To Net: NetName=GND Pin=R48-1 +Added Pin To Net: NetName=GND Pin=R52-1 +Added Pin To Net: NetName=GND Pin=U9-5 +Added Pin To Net: NetName=GND Pin=U13-5 +Change Net Name : Old Net Name=GND New Net Name=AGND +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R28 0R diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-03-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-03-17.LOG new file mode 100644 index 0000000..51580e6 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-03-17.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=AGND Pin=C41-2 +Removed Pin From Net: NetName=AGND Pin=C43-1 +Removed Pin From Net: NetName=AGND Pin=C44-2 +Removed Pin From Net: NetName=AGND Pin=C46-2 +Removed Pin From Net: NetName=AGND Pin=C48-1 +Removed Pin From Net: NetName=AGND Pin=C49-2 +Removed Pin From Net: NetName=AGND Pin=C51-1 +Removed Pin From Net: NetName=AGND Pin=C53-2 +Removed Pin From Net: NetName=AGND Pin=C55-2 +Removed Pin From Net: NetName=AGND Pin=C57-1 +Removed Pin From Net: NetName=AGND Pin=R30-1 +Removed Pin From Net: NetName=AGND Pin=R33-1 +Removed Pin From Net: NetName=AGND Pin=R48-1 +Removed Pin From Net: NetName=AGND Pin=R52-1 +Removed Pin From Net: NetName=AGND Pin=U9-5 +Removed Pin From Net: NetName=AGND Pin=U13-5 +Added Component: Designator=P3(SINK-TH_L15.0-W10.5-H21.0) +Added Component: Designator=P5(SINK-TH_L15.0-W10.5-H21.0) +Added Component: Designator=R71(EIA0603) +Added Component: Designator=R?(EIA0603) +Added Component: Designator=R?(EIA0603) +Added Pin To Net: NetName=AGND Pin=R71-1 +Added Pin To Net: NetName=V3.3V Pin=R?-2 +Added Pin To Net: NetName=V3.3V Pin=R?-2 +Change Net Name : Old Net Name=AGND New Net Name=GND +Added Pin To Net: NetName=AGND Pin=C41-2 +Added Pin To Net: NetName=AGND Pin=C43-1 +Added Pin To Net: NetName=AGND Pin=C44-2 +Added Pin To Net: NetName=AGND Pin=C46-2 +Added Pin To Net: NetName=AGND Pin=C48-1 +Added Pin To Net: NetName=AGND Pin=C49-2 +Added Pin To Net: NetName=AGND Pin=C51-1 +Added Pin To Net: NetName=AGND Pin=C53-2 +Added Pin To Net: NetName=AGND Pin=C55-2 +Added Pin To Net: NetName=AGND Pin=C57-1 +Added Pin To Net: NetName=AGND Pin=R30-1 +Added Pin To Net: NetName=AGND Pin=R33-1 +Added Pin To Net: NetName=AGND Pin=R48-1 +Added Pin To Net: NetName=AGND Pin=R52-1 +Added Pin To Net: NetName=AGND Pin=R71-2 +Added Pin To Net: NetName=AGND Pin=U9-5 +Added Pin To Net: NetName=AGND Pin=U13-5 +Added Net: Name=AGND +Added Pin To Net: NetName=NetR?_1 Pin=R?-1 +Added Pin To Net: NetName=NetR?_1 Pin=U4-10 +Added Net: Name=NetR?_1 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P3 15.5*10.5*21 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P5 15.5*10.5*21 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R71 0R +Added Member To Class: ClassName= Member=Component R? 1K +Added Member To Class: ClassName= Member=Component R? 1K diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-07-01.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-07-01.LOG new file mode 100644 index 0000000..1a9b503 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-07-01.LOG @@ -0,0 +1,25 @@ +Removed Pin From Net: NetName=N1S Pin=C52-2 +Removed Pin From Net: NetName=N1S Pin=C58-2 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C52 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C58 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=P5 +Change Component Footprint: Designator=P3 Old Footprint=SINK-TH_L15.0-W10.5-H21.0 New Footprint=HEATSINK-TH_L35.0-W25.0_C4708 +Change Component Comment : Designator=P3 Old Comment=15.5*10.5*21 New Comment=30*25*25 +Change Component Designator: OldDesignator=CN? NewDesignator=CN13 +Change Component Designator: OldDesignator=R? NewDesignator=R56 +Change Component Designator: OldDesignator=R? NewDesignator=R72 +Change Component Designator: OldDesignator=R? NewDesignator=R73 +Added Component: Designator=P1(HEATSINK-TH_L35.0-W25.0_C4708) +Added Component: Designator=U12(CAP-TH_L12.0-W5.0-P10.00-D0.6-1) +Added Pin To Net: NetName=N1S Pin=U12-1 +Change Net Name : Old Net Name=NetR?_1 New Net Name=NetR72_1 +Added Pin To Net: NetName=NetR54_2 Pin=R54-2 +Added Pin To Net: NetName=NetR54_2 Pin=U12-2 +Added Net: Name=NetR54_2 +Added Pin To Net: NetName=NetR56_1 Pin=R56-1 +Added Pin To Net: NetName=NetR56_1 Pin=U4-9 +Added Net: Name=NetR56_1 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P1 30*25*25 +Added Member To Class: ClassName= Member=Component R56 1K +Added Member To Class: ClassName= Member=Component R72 1K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component U12 10nF diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-10-30.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-10-30.LOG new file mode 100644 index 0000000..18feb23 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-10-30.LOG @@ -0,0 +1,5 @@ +Added Component: Designator=Q3(TO-220-3_L10.0-W4.5-P2.54-L) +Added Pin To Net: NetName=N1S Pin=Q3-1 +Added Pin To Net: NetName=N Pin=Q3-2 +Added Pin To Net: NetName=NetQ3_3 Pin=Q3-3 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q3 BTA24-800BWRG diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-18-34.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-18-34.LOG new file mode 100644 index 0000000..5c032d4 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-18-34.LOG @@ -0,0 +1,4 @@ +Added Component: Designator=R54(R2512) +Added Pin To Net: NetName=N Pin=R54-1 +Added Pin To Net: NetName=NetR54_2 Pin=R54-2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R54 360R diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-56-41.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-56-41.LOG new file mode 100644 index 0000000..c065d2f --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-13 9-56-41.LOG @@ -0,0 +1,14 @@ +Removed Pin From Net: NetName=N2S Pin=C59-2 +Removed Pin From Net: NetName=N2S Pin=C60-2 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C59 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C60 +Change Component Comment : Designator=U12 Old Comment=10nF New Comment=10nF/630V/CBB +Change Component Designator: OldDesignator=U12 NewDesignator=C? +Added Component: Designator=C?(CAP-TH_L12.0-W5.0-P10.00-D0.6-1) +Added Component: Designator=P1(HEATSINK-TH_L35.0-W25.0_C4708) +Added Component: Designator=P3(HEATSINK-TH_L35.0-W25.0_C4708) +Added Pin To Net: NetName=N2S Pin=C?-1 +Change Net Name : Old Net Name=NetR54_2 New Net Name=NetC?_2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component C? 10nF/630V/CBB +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P1 30*25*25 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component P3 30*25*25 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-21-50.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-21-50.LOG new file mode 100644 index 0000000..e0334c9 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-21-50.LOG @@ -0,0 +1,16 @@ +Removed Pin From Net: NetName=V5V Pin=U11-1 +Removed Pin From Net: NetName=V5V Pin=U14-1 +Change Component Comment : Designator=R38 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R39 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R40 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R41 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R61 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R62 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R63 Old Comment=47R New Comment=100R +Change Component Comment : Designator=R66 Old Comment=47R New Comment=100R +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=3V3 Pin=U11-1 +Added Pin To Net: NetName=3V3 Pin=U14-1 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-10.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-10.LOG new file mode 100644 index 0000000..7ea3efa --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-10.LOG @@ -0,0 +1,6 @@ +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=PC4 Pin=U3-24 +Added Pin To Net: NetName=PC5 Pin=U3-25 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-45.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-45.LOG new file mode 100644 index 0000000..6ad3508 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-27-45.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=PC5 Pin=R22-2 +Removed Pin From Net: NetName=PC4 Pin=R23-2 +Added Pin To Net: NetName=PC4 Pin=R22-2 +Added Pin To Net: NetName=PC5 Pin=R23-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-29-19.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-29-19.LOG new file mode 100644 index 0000000..755d068 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 14-29-19.LOG @@ -0,0 +1,4 @@ +Removed Pin From Net: NetName=PC4 Pin=R22-2 +Removed Pin From Net: NetName=PC5 Pin=R23-2 +Added Pin To Net: NetName=PC5 Pin=R22-2 +Added Pin To Net: NetName=PC4 Pin=R23-2 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-37-56.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-37-56.LOG new file mode 100644 index 0000000..4760a3a --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-37-56.LOG @@ -0,0 +1,14 @@ +Removed Pin From Net: NetName=L_C Pin=P6-1 +Removed Pin From Net: NetName=N2S Pin=P6-2 +Added Component: Designator=E2(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Component: Designator=R54(R2512) +Added Pin To Net: NetName=V24V Pin=E2-1 +Added Pin To Net: NetName=GND Pin=E2-2 +Added Pin To Net: NetName=N2S Pin=P6-1 +Added Pin To Net: NetName=L_C Pin=P6-2 +Added Pin To Net: NetName=N Pin=R54-1 +Added Pin To Net: NetName=NetC18_2 Pin=R54-2 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E2 100uF +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q? BTA24-800BWRG +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R54 360R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R68 360R diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-47-31.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-47-31.LOG new file mode 100644 index 0000000..9822a36 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-14 9-47-31.LOG @@ -0,0 +1,13 @@ +Removed Pin From Net: NetName=N2S Pin=P6-1 +Removed Pin From Net: NetName=L_C Pin=P6-2 +Change Component Designator: OldDesignator=Q? NewDesignator=Q3 +Change Component Designator: OldDesignator=Q? NewDesignator=Q5 +Change Component Designator: OldDesignator=R? NewDesignator=R1 +Added Pin To Net: NetName=L_C Pin=P6-1 +Added Pin To Net: NetName=N2S Pin=P6-2 +Change Net Name : Old Net Name=NetQ?_3 New Net Name=NetQ3_3 +Change Net Name : Old Net Name=NetR?_1 New Net Name=NetR1_1 +Added Pin To Net: NetName=NetQ5_3 Pin=Q5-3 +Added Pin To Net: NetName=NetQ5_3 Pin=U14-4 +Added Net: Name=NetQ5_3 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q5 BTA24-800BWRG diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 10-39-28.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 10-39-28.LOG new file mode 100644 index 0000000..a3a4a10 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 10-39-28.LOG @@ -0,0 +1,153 @@ +Removed Pin From Net: NetName=GND Pin=CY1-1 +Removed Pin From Net: NetName=N Pin=R34-1 +Removed Pin From Net: NetName=NetQ2_1 Pin=R40-1 +Removed Pin From Net: NetName=NetQ2_3 Pin=R40-2 +Removed Pin From Net: NetName=N Pin=R44-1 +Removed Pin From Net: NetName=NetQ4_1 Pin=R54-1 +Removed Pin From Net: NetName=NetQ4_3 Pin=R54-2 +Removed Member From Class: ClassName=ͨţ׿ԡӡ Member=CY1 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T1 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T2 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T3 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T4 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T5 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=T6 +Change Component Footprint: Designator=R34 Old Footprint=EIA0603 New Footprint=EIA1206 +Change Component Comment : Designator=R26 Old Comment=51K New Comment=100K +Change Component Comment : Designator=R34 Old Comment=360R New Comment=510R +Change Component Designator: OldDesignator=R22 NewDesignator=R23 +Change Component Designator: OldDesignator=R23 NewDesignator=R24 +Change Component Designator: OldDesignator=R24 NewDesignator=R26 +Change Component Designator: OldDesignator=R25 NewDesignator=R22 +Change Component Designator: OldDesignator=R26 NewDesignator=R25 +Change Component Designator: OldDesignator=R34 NewDesignator=R41 +Change Component Designator: OldDesignator=R35 NewDesignator=R45 +Change Component Designator: OldDesignator=R36 NewDesignator=R46 +Change Component Designator: OldDesignator=R37 NewDesignator=R47 +Change Component Designator: OldDesignator=R38 NewDesignator=R40 +Change Component Designator: OldDesignator=R39 NewDesignator=R49 +Change Component Designator: OldDesignator=R41 NewDesignator=R43 +Change Component Designator: OldDesignator=R42 NewDesignator=R44 +Change Component Designator: OldDesignator=R43 NewDesignator=R48 +Change Component Designator: OldDesignator=R45 NewDesignator=R59 +Change Component Designator: OldDesignator=R46 NewDesignator=R60 +Change Component Designator: OldDesignator=R47 NewDesignator=R50 +Change Component Designator: OldDesignator=R48 NewDesignator=R61 +Change Component Designator: OldDesignator=R49 NewDesignator=R51 +Change Component Designator: OldDesignator=R50 NewDesignator=R62 +Change Component Designator: OldDesignator=R51 NewDesignator=R52 +Change Component Designator: OldDesignator=R52 NewDesignator=R53 +Change Component Designator: OldDesignator=R53 NewDesignator=R54 +Change Component Designator: OldDesignator=R56 NewDesignator=R58 +Change Component Designator: OldDesignator=R57 NewDesignator=R63 +Change Component Designator: OldDesignator=U10 NewDesignator=U11 +Change Component Designator: OldDesignator=U11 NewDesignator=U12 +Change Component Designator: OldDesignator=U12 NewDesignator=U14 +Change Component Designator: OldDesignator=U14 NewDesignator=U15 +Added Component: Designator=CN8(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=CN9(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=D4(MBLS_L4.7-W3.8-P2.40-LS6.7-BL) +Added Component: Designator=R34(EIA0603) +Added Component: Designator=R35(EIA0603) +Added Component: Designator=R36(EIA1206) +Added Component: Designator=R37(EIA1206) +Added Component: Designator=R38(EIA1206) +Added Component: Designator=R39(EIA1206) +Added Component: Designator=R42(EIA1206) +Added Component: Designator=R56(EIA1206) +Added Component: Designator=R57(EIA1206) +Added Component: Designator=U10(SOP-4_L7.5-W3.8-P2.54-LS10.2-TL) +Added Pin To Net: NetName=3V3 Pin=R34-2 +Added Pin To Net: NetName=L Pin=R37-1 +Added Pin To Net: NetName=N Pin=R39-1 +Added Pin To Net: NetName=N Pin=R42-1 +Added Pin To Net: NetName=N Pin=R57-1 +Added Pin To Net: NetName=GND Pin=U10-3 +Change Net Name : Old Net Name=NetR25_1 New Net Name=NetR22_1 +Change Net Name : Old Net Name=NetR34_2 New Net Name=NetR41_2 +Change Net Name : Old Net Name=NetR35_1 New Net Name=NetR45_1 +Change Net Name : Old Net Name=NetR36_2 New Net Name=NetR46_2 +Change Net Name : Old Net Name=NetR37_1 New Net Name=NetR47_1 +Change Net Name : Old Net Name=NetR45_1 New Net Name=NetR59_1 +Change Net Name : Old Net Name=NetR46_2 New Net Name=NetR60_2 +Change Net Name : Old Net Name=NetR48_1 New Net Name=NetR61_1 +Change Net Name : Old Net Name=NetR49_2 New Net Name=NetR51_2 +Change Net Name : Old Net Name=NetR52_1 New Net Name=NetR53_1 +Change Net Name : Old Net Name=NetR52_2 New Net Name=NetR53_2 +Change Net Name : Old Net Name=NetR53_1 New Net Name=NetR54_1 +Change Net Name : Old Net Name=NetR53_2 New Net Name=NetR54_2 +Change Net Name : Old Net Name=NetR56_1 New Net Name=NetR58_1 +Change Net Name : Old Net Name=NetR56_2 New Net Name=NetR58_2 +Added Pin To Net: NetName=NetCN8_1 Pin=CN8-1 +Added Pin To Net: NetName=NetCN8_1 Pin=R29-2 +Added Pin To Net: NetName=NetCN8_1 Pin=U9-7 +Added Net: Name=NetCN8_1 +Added Pin To Net: NetName=NetCN8_2 Pin=CN8-2 +Added Pin To Net: NetName=NetCN8_2 Pin=R27-2 +Added Pin To Net: NetName=NetCN8_2 Pin=U9-6 +Added Net: Name=NetCN8_2 +Added Pin To Net: NetName=NetCN8_3 Pin=CN8-3 +Added Pin To Net: NetName=NetCN8_3 Pin=R21-2 +Added Pin To Net: NetName=NetCN8_3 Pin=R23-1 +Added Net: Name=NetCN8_3 +Added Pin To Net: NetName=NetCN9_1 Pin=CN9-1 +Added Pin To Net: NetName=NetCN9_1 Pin=R52-2 +Added Pin To Net: NetName=NetCN9_1 Pin=U13-7 +Added Net: Name=NetCN9_1 +Added Pin To Net: NetName=NetCN9_2 Pin=CN9-2 +Added Pin To Net: NetName=NetCN9_2 Pin=R50-2 +Added Pin To Net: NetName=NetCN9_2 Pin=U13-6 +Added Net: Name=NetCN9_2 +Added Pin To Net: NetName=NetCN9_3 Pin=CN9-3 +Added Pin To Net: NetName=NetCN9_3 Pin=R40-2 +Added Pin To Net: NetName=NetCN9_3 Pin=R43-1 +Added Net: Name=NetCN9_3 +Added Pin To Net: NetName=NetD4_1 Pin=D4-1 +Added Pin To Net: NetName=NetD4_1 Pin=U10-1 +Added Net: Name=NetD4_1 +Added Pin To Net: NetName=NetD4_2 Pin=D4-2 +Added Pin To Net: NetName=NetD4_2 Pin=U10-2 +Added Net: Name=NetD4_2 +Added Pin To Net: NetName=NetD4_3 Pin=D4-3 +Added Pin To Net: NetName=NetD4_3 Pin=R38-2 +Added Net: Name=NetD4_3 +Added Pin To Net: NetName=NetD4_4 Pin=D4-4 +Added Pin To Net: NetName=NetD4_4 Pin=R36-2 +Added Net: Name=NetD4_4 +Added Pin To Net: NetName=NetR34_1 Pin=R34-1 +Added Pin To Net: NetName=NetR34_1 Pin=R35-2 +Added Pin To Net: NetName=NetR34_1 Pin=U10-4 +Added Net: Name=NetR34_1 +Added Pin To Net: NetName=NetR35_1 Pin=R35-1 +Added Net: Name=NetR35_1 +Added Pin To Net: NetName=NetR36_1 Pin=R36-1 +Added Pin To Net: NetName=NetR36_1 Pin=R37-2 +Added Net: Name=NetR36_1 +Added Pin To Net: NetName=NetR38_1 Pin=R38-1 +Added Pin To Net: NetName=NetR38_1 Pin=R39-2 +Added Net: Name=NetR38_1 +Added Pin To Net: NetName=NetR41_1 Pin=R41-1 +Added Pin To Net: NetName=NetR41_1 Pin=R42-2 +Added Net: Name=NetR41_1 +Added Pin To Net: NetName=NetR56_1 Pin=R56-1 +Added Pin To Net: NetName=NetR56_1 Pin=R57-2 +Added Net: Name=NetR56_1 +Added Pin To Net: NetName=NetR56_2 Pin=R56-2 +Added Pin To Net: NetName=NetR56_2 Pin=U14-6 +Added Net: Name=NetR56_2 +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component CN8 ZX-XH2.54-3PZZ +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component CN9 ZX-XH2.54-3PZZ +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component D4 HDL10S +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R58 47R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R59 1K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R60 360R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R61 100R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R62 51K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R63 0R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component U15 10nF/630V +Added Room: Name=MAIN +Added Room: Name=¿أPT100ɿع裩 +Added Room: Name= +Added Room: Name=Դ8V5V3.3V +Added Room: Name= +Added Room: Name=ͨţ׿ԡӡ diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-04-39.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-04-39.LOG new file mode 100644 index 0000000..0e8c0ae --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-04-39.LOG @@ -0,0 +1,14 @@ +Added Component: Designator=CN?(CONN-TH_2P-P3.96_C9900035759) +Added Pin To Net: NetName=GND Pin=CN?-1 +Added Pin To Net: NetName=V24V Pin=CN?-2 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component CN? VH3.96-2P ZZ +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R34 10K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R35 100R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R36 150K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R37 150K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R38 150K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R39 150K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R42 510R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R56 510R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R57 510R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component U10 LTV-1008-TP1-G diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-31-20.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-31-20.LOG new file mode 100644 index 0000000..46aa18a --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 13-31-20.LOG @@ -0,0 +1,5 @@ +Change Component Footprint: Designator=E1 Old Footprint=CAP-TH_BD5.0-P2.00-D0.8-FD New Footprint=CAP-TH_BD6.3-P2.50-D0.6-FD +Added Component: Designator=E?(CAP-TH_BD6.3-P2.50-D0.6-FD) +Added Pin To Net: NetName=V24V Pin=E?-1 +Added Pin To Net: NetName=GND Pin=E?-2 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component E? 100uF diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-06-59.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-06-59.LOG new file mode 100644 index 0000000..718242d --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-06-59.LOG @@ -0,0 +1,162 @@ +Change Component Comment : Designator=R19 Old Comment=3.16K/1% New Comment=1.74K/1% +Change Component Designator: OldDesignator=CN7 NewDesignator=CN8 +Change Component Designator: OldDesignator=CN8 NewDesignator=CN10 +Change Component Designator: OldDesignator=CN9 NewDesignator=CN11 +Change Component Designator: OldDesignator=CN? NewDesignator=CN9 +Change Component Designator: OldDesignator=D3 NewDesignator=D5 +Change Component Designator: OldDesignator=D4 NewDesignator=D6 +Change Component Designator: OldDesignator=E? NewDesignator=E2 +Change Component Designator: OldDesignator=Q1 NewDesignator=Q2 +Change Component Designator: OldDesignator=Q2 NewDesignator=Q3 +Change Component Designator: OldDesignator=Q3 NewDesignator=Q4 +Change Component Designator: OldDesignator=Q4 NewDesignator=Q5 +Change Component Designator: OldDesignator=Q5 NewDesignator=Q6 +Change Component Designator: OldDesignator=R18 NewDesignator=R22 +Change Component Designator: OldDesignator=R19 NewDesignator=R23 +Change Component Designator: OldDesignator=R20 NewDesignator=R24 +Change Component Designator: OldDesignator=R21 NewDesignator=R25 +Change Component Designator: OldDesignator=R22 NewDesignator=R26 +Change Component Designator: OldDesignator=R23 NewDesignator=R27 +Change Component Designator: OldDesignator=R24 NewDesignator=R28 +Change Component Designator: OldDesignator=R25 NewDesignator=R29 +Change Component Designator: OldDesignator=R26 NewDesignator=R30 +Change Component Designator: OldDesignator=R27 NewDesignator=R31 +Change Component Designator: OldDesignator=R28 NewDesignator=R32 +Change Component Designator: OldDesignator=R29 NewDesignator=R33 +Change Component Designator: OldDesignator=R30 NewDesignator=R34 +Change Component Designator: OldDesignator=R31 NewDesignator=R35 +Change Component Designator: OldDesignator=R32 NewDesignator=R36 +Change Component Designator: OldDesignator=R33 NewDesignator=R37 +Change Component Designator: OldDesignator=R34 NewDesignator=R38 +Change Component Designator: OldDesignator=R35 NewDesignator=R39 +Change Component Designator: OldDesignator=R36 NewDesignator=R40 +Change Component Designator: OldDesignator=R37 NewDesignator=R41 +Change Component Designator: OldDesignator=R38 NewDesignator=R42 +Change Component Designator: OldDesignator=R39 NewDesignator=R43 +Change Component Designator: OldDesignator=R40 NewDesignator=R44 +Change Component Designator: OldDesignator=R41 NewDesignator=R45 +Change Component Designator: OldDesignator=R42 NewDesignator=R46 +Change Component Designator: OldDesignator=R43 NewDesignator=R47 +Change Component Designator: OldDesignator=R44 NewDesignator=R48 +Change Component Designator: OldDesignator=R45 NewDesignator=R49 +Change Component Designator: OldDesignator=R46 NewDesignator=R50 +Change Component Designator: OldDesignator=R47 NewDesignator=R51 +Change Component Designator: OldDesignator=R48 NewDesignator=R52 +Change Component Designator: OldDesignator=R49 NewDesignator=R53 +Change Component Designator: OldDesignator=R50 NewDesignator=R54 +Change Component Designator: OldDesignator=R51 NewDesignator=R55 +Change Component Designator: OldDesignator=R52 NewDesignator=R56 +Change Component Designator: OldDesignator=R53 NewDesignator=R57 +Change Component Designator: OldDesignator=R54 NewDesignator=R58 +Change Component Designator: OldDesignator=R55 NewDesignator=R59 +Change Component Designator: OldDesignator=R56 NewDesignator=R60 +Change Component Designator: OldDesignator=R57 NewDesignator=R61 +Change Component Designator: OldDesignator=R58 NewDesignator=R62 +Change Component Designator: OldDesignator=R59 NewDesignator=R63 +Change Component Designator: OldDesignator=R60 NewDesignator=R64 +Change Component Designator: OldDesignator=R61 NewDesignator=R65 +Change Component Designator: OldDesignator=R62 NewDesignator=R66 +Change Component Designator: OldDesignator=R63 NewDesignator=R67 +Change Component Designator: OldDesignator=V1 NewDesignator=1 +Added Component: Designator=2(Test_Point) +Added Component: Designator=A1(Test_Point) +Added Component: Designator=B1(BUZ-TH_BD12.0-P7.60-D0.6-FD) +Added Component: Designator=CN7(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=D1(D0805) +Added Component: Designator=D2(SMA_L4.3-W2.5-LS5.0-RD) +Added Component: Designator=Q1(SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR) +Added Component: Designator=R18(EIA0603) +Added Component: Designator=R19(EIA0603) +Added Component: Designator=R20(EIA0603) +Added Component: Designator=R21(EIA0603) +Added Component: Designator=V1(SOD-323) +Added Component: Designator=V2(Test_Point) +Added Pin To Net: NetName=3V3 Pin=2-1 +Added Pin To Net: NetName=A3V3 Pin=A1-1 +Added Pin To Net: NetName=V5V Pin=B1-1 +Added Pin To Net: NetName=GND Pin=CN7-1 +Added Pin To Net: NetName=V5V Pin=CN7-3 +Added Pin To Net: NetName=GND Pin=D1-2 +Added Pin To Net: NetName=V5V Pin=D2-1 +Added Pin To Net: NetName=GND Pin=Q1-2 +Added Pin To Net: NetName=GND Pin=R21-1 +Added Pin To Net: NetName=GND Pin=V1-K +Added Pin To Net: NetName=V5V Pin=V2-1 +Change Net Name : Old Net Name=NetCN8_1 New Net Name=NetCN10_1 +Change Net Name : Old Net Name=NetCN8_2 New Net Name=NetCN10_2 +Change Net Name : Old Net Name=NetCN8_3 New Net Name=NetCN10_3 +Change Net Name : Old Net Name=NetCN9_1 New Net Name=NetCN11_1 +Change Net Name : Old Net Name=NetCN9_2 New Net Name=NetCN11_2 +Change Net Name : Old Net Name=NetCN9_3 New Net Name=NetCN11_3 +Change Net Name : Old Net Name=NetD3_2 New Net Name=NetD5_2 +Change Net Name : Old Net Name=NetD4_1 New Net Name=NetD6_1 +Change Net Name : Old Net Name=NetD4_2 New Net Name=NetD6_2 +Change Net Name : Old Net Name=NetD4_3 New Net Name=NetD6_3 +Change Net Name : Old Net Name=NetD4_4 New Net Name=NetD6_4 +Change Net Name : Old Net Name=NetQ1_1 New Net Name=NetQ2_1 +Change Net Name : Old Net Name=NetQ2_1 New Net Name=NetQ3_1 +Change Net Name : Old Net Name=NetQ2_3 New Net Name=NetQ3_3 +Change Net Name : Old Net Name=NetQ3_1 New Net Name=NetQ4_1 +Change Net Name : Old Net Name=NetQ3_3 New Net Name=NetQ4_3 +Change Net Name : Old Net Name=NetQ4_1 New Net Name=NetQ5_1 +Change Net Name : Old Net Name=NetQ4_3 New Net Name=NetQ5_3 +Change Net Name : Old Net Name=NetQ5_1 New Net Name=NetQ6_1 +Change Net Name : Old Net Name=NetQ5_3 New Net Name=NetQ6_3 +Change Net Name : Old Net Name=NetR20_1 New Net Name=NetR24_1 +Change Net Name : Old Net Name=NetR22_1 New Net Name=NetR26_1 +Change Net Name : Old Net Name=NetR28_2 New Net Name=NetR32_2 +Change Net Name : Old Net Name=NetR30_1 New Net Name=PC10/SPI3-SCK +Change Net Name : Old Net Name=NetR30_2 New Net Name=NetR34_2 +Change Net Name : Old Net Name=NetR31_1 New Net Name=PC12/SPI3-MOSI +Change Net Name : Old Net Name=NetR31_2 New Net Name=NetR35_2 +Change Net Name : Old Net Name=NetR32_1 New Net Name=PC11/SPI3-MISO +Change Net Name : Old Net Name=NetR32_2 New Net Name=NetR36_2 +Change Net Name : Old Net Name=NetR33_1 New Net Name=PC9/ADS1220-RDY +Change Net Name : Old Net Name=NetR33_2 New Net Name=NetR37_2 +Change Net Name : Old Net Name=NetR34_1 New Net Name=NetR38_1 +Change Net Name : Old Net Name=NetR35_1 New Net Name=NetR39_1 +Change Net Name : Old Net Name=NetR36_1 New Net Name=NetR40_1 +Change Net Name : Old Net Name=NetR38_1 New Net Name=NetR42_1 +Change Net Name : Old Net Name=NetR41_1 New Net Name=NetR45_1 +Change Net Name : Old Net Name=NetR41_2 New Net Name=NetR45_2 +Change Net Name : Old Net Name=NetR45_1 New Net Name=NetR49_1 +Change Net Name : Old Net Name=NetR46_2 New Net Name=NetR50_2 +Change Net Name : Old Net Name=NetR47_1 New Net Name=NetR51_1 +Change Net Name : Old Net Name=NetR51_2 New Net Name=NetR55_2 +Change Net Name : Old Net Name=NetR53_1 New Net Name=NetR57_1 +Change Net Name : Old Net Name=NetR53_2 New Net Name=NetR57_2 +Change Net Name : Old Net Name=NetR54_1 New Net Name=NetR58_1 +Change Net Name : Old Net Name=NetR54_2 New Net Name=NetR58_2 +Change Net Name : Old Net Name=NetR55_1 New Net Name=NetR59_1 +Change Net Name : Old Net Name=NetR55_2 New Net Name=NetR59_2 +Change Net Name : Old Net Name=NetR56_1 New Net Name=NetR60_1 +Change Net Name : Old Net Name=NetR56_2 New Net Name=NetR60_2 +Change Net Name : Old Net Name=NetR58_1 New Net Name=NetR62_1 +Change Net Name : Old Net Name=NetR58_2 New Net Name=NetR62_2 +Change Net Name : Old Net Name=NetR59_1 New Net Name=NetR63_1 +Change Net Name : Old Net Name=NetR60_2 New Net Name=NetR64_2 +Change Net Name : Old Net Name=NetR61_1 New Net Name=NetR65_1 +Added Pin To Net: NetName=NetB1_2 Pin=B1-2 +Added Pin To Net: NetName=NetB1_2 Pin=D2-2 +Added Pin To Net: NetName=NetB1_2 Pin=Q1-3 +Added Net: Name=NetB1_2 +Added Pin To Net: NetName=NetCN7_2 Pin=CN7-2 +Added Pin To Net: NetName=NetCN7_2 Pin=R18-1 +Added Pin To Net: NetName=NetCN7_2 Pin=R19-1 +Added Pin To Net: NetName=NetCN7_2 Pin=V1-A +Added Net: Name=NetCN7_2 +Added Pin To Net: NetName=NetD1_1 Pin=D1-1 +Added Pin To Net: NetName=NetD1_1 Pin=R19-2 +Added Net: Name=NetD1_1 +Added Pin To Net: NetName=NetQ1_1 Pin=Q1-1 +Added Pin To Net: NetName=NetQ1_1 Pin=R20-2 +Added Pin To Net: NetName=NetQ1_1 Pin=R21-2 +Added Net: Name=NetQ1_1 +Added Pin To Net: NetName=NetR18_2 Pin=R18-2 +Added Net: Name=NetR18_2 +Added Pin To Net: NetName=NetR20_1 Pin=R20-1 +Added Net: Name=NetR20_1 +Added Class: Name= +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component 2 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component A1 TestPoint +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component V2 TestPoint diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-30-49.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-30-49.LOG new file mode 100644 index 0000000..b4c4088 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-30-49.LOG @@ -0,0 +1,38 @@ +Removed Pin From Net: NetName=A3V3 Pin=C43-1 +Removed Pin From Net: NetName=AGND Pin=C43-2 +Removed Pin From Net: NetName=A3V3 Pin=R30-2 +Removed Member From Class: ClassName= Member=1 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=C43 +Removed Member From Class: ClassName= Member=CN10 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=CN10 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=CN11 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=D1 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=D2 +Removed Member From Class: ClassName= Member=Q4 +Removed Member From Class: ClassName=¿أPT100ɿع裩 Member=R30 +Removed Member From Class: ClassName= Member=R31 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R31 +Removed Member From Class: ClassName= Member=R32 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R32 +Removed Member From Class: ClassName= Member=R33 +Removed Member From Class: ClassName= Member=R42 +Removed Member From Class: ClassName=Դ8V5V3.3V Member=R42 +Added Pin To Net: NetName=A3V3 Pin=C44-1 +Added Pin To Net: NetName=A3V3 Pin=U9-12 +Added Member To Class: ClassName= Member=Component CN7 ZX-XH2.54-3PZZ +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component CN8 VH3.96-2P ZZ +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component CN9 VH3.96-2P ZZ +Added Member To Class: ClassName= Member=Component Q1 AO3400A +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component Q2 AO3400A +Added Member To Class: ClassName= Member=Component R18 1K +Added Member To Class: ClassName= Member=Component R19 3.3K +Added Member To Class: ClassName= Member=Component R20 100R +Added Member To Class: ClassName= Member=Component R21 100K +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R22 10K/1% +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R23 1.74K/1% +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component R24 10K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R25 1.65K 0.1% 5ppm +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R26 100R +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R27 4.99K +Added Member To Class: ClassName=¿أPT100ɿع裩 Member=Component R28 4.99K +Added Member To Class: ClassName= Member=Component V1 SD05C diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-42-17.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-42-17.LOG new file mode 100644 index 0000000..a7149a4 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 16-42-17.LOG @@ -0,0 +1,8 @@ +Removed Pin From Net: NetName=NetCN10_2 Pin=R31-2 +Removed Pin From Net: NetName=NetCN10_1 Pin=R33-2 +Removed Pin From Net: NetName=NetCN10_2 Pin=U9-6 +Removed Pin From Net: NetName=NetCN10_1 Pin=U9-7 +Added Pin To Net: NetName=NetCN10_1 Pin=R31-2 +Added Pin To Net: NetName=NetCN10_2 Pin=R33-2 +Added Pin To Net: NetName=NetCN10_1 Pin=U9-6 +Added Pin To Net: NetName=NetCN10_2 Pin=U9-7 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-01-50.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-01-50.LOG new file mode 100644 index 0000000..9109c51 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-01-50.LOG @@ -0,0 +1,7 @@ +Added Pin To Net: NetName=GND Pin=CN4-3 +Added Pin To Net: NetName=DEBUG_RXD Pin=CN4-1 +Added Pin To Net: NetName=DEBUG_RXD Pin=U1-7 +Added Net: Name=DEBUG_RXD +Added Pin To Net: NetName=DEBUG_TXD Pin=CN4-2 +Added Pin To Net: NetName=DEBUG_TXD Pin=U1-13 +Added Net: Name=DEBUG_TXD diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-16-09.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-16-09.LOG new file mode 100644 index 0000000..c416119 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-10-9 17-16-09.LOG @@ -0,0 +1,8 @@ +Added Component: Designator=D3(SMB_L4.6-W3.6-LS5.3-RD) +Added Component: Designator=D4(SMB_L4.6-W3.6-LS5.3-RD) +Added Pin To Net: NetName=NetC26_1 Pin=D3-1 +Added Pin To Net: NetName=V24V Pin=D3-2 +Added Pin To Net: NetName=NetC25_2 Pin=D4-1 +Added Pin To Net: NetName=GND Pin=D4-2 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D3 SS54 +Added Member To Class: ClassName=Դ8V5V3.3V Member=Component D4 SS54 diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-37-11.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-37-11.LOG new file mode 100644 index 0000000..3a025c3 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-37-11.LOG @@ -0,0 +1,746 @@ +Added Component: Designator=C1(EIA0603) +Added Component: Designator=C2(EIA0603) +Added Component: Designator=C3(EIA0603) +Added Component: Designator=C4(EIA0603) +Added Component: Designator=C5(EIA0603) +Added Component: Designator=C6(EIA0603) +Added Component: Designator=C7(EIA0603) +Added Component: Designator=C8(EIA0603) +Added Component: Designator=C9(EIA0603) +Added Component: Designator=C10(EIA0603) +Added Component: Designator=C11(EIA0603) +Added Component: Designator=C12(EIA0603) +Added Component: Designator=C13(EIA0603) +Added Component: Designator=C14(EIA0603) +Added Component: Designator=C15(EIA0603) +Added Component: Designator=C16(EIA0603) +Added Component: Designator=C17(EIA0603) +Added Component: Designator=C18(EIA0603) +Added Component: Designator=C19(EIA0603) +Added Component: Designator=C20(EIA0603) +Added Component: Designator=C21(EIA0603) +Added Component: Designator=C22(EIA0603) +Added Component: Designator=C23(EIA0603) +Added Component: Designator=C24(EIA0603) +Added Component: Designator=C25(EIA0603) +Added Component: Designator=C26(EIA1206) +Added Component: Designator=C27(EIA0603) +Added Component: Designator=C28(EIA0805) +Added Component: Designator=C29(EIA0805) +Added Component: Designator=C30(EIA0805) +Added Component: Designator=C31(EIA0603) +Added Component: Designator=C32(CAP-SMD_L3.2-W1.6-RD-C7171) +Added Component: Designator=C33(EIA0603) +Added Component: Designator=C34(EIA0603) +Added Component: Designator=C35(EIA1206) +Added Component: Designator=C36(CAP-SMD_L3.2-W1.6-RD-C7171) +Added Component: Designator=C37(EIA0603) +Added Component: Designator=C38(EIA0603) +Added Component: Designator=C39(EIA0603) +Added Component: Designator=C40(EIA0603) +Added Component: Designator=C41(EIA0603) +Added Component: Designator=C42(EIA0603) +Added Component: Designator=C43(EIA0603) +Added Component: Designator=C44(EIA0603) +Added Component: Designator=C45(EIA0603) +Added Component: Designator=C46(EIA0603) +Added Component: Designator=C47(EIA0603) +Added Component: Designator=C48(EIA0603) +Added Component: Designator=C49(EIA0603) +Added Component: Designator=C50(EIA0603) +Added Component: Designator=C51(EIA0603) +Added Component: Designator=C52(EIA0603) +Added Component: Designator=C53(EIA0603) +Added Component: Designator=C54(EIA0603) +Added Component: Designator=C55(EIA0603) +Added Component: Designator=C56(EIA0603) +Added Component: Designator=C57(EIA0603) +Added Component: Designator=CN1(CONN-SMD_10P-P2.00_2.0-10P-WT) +Added Component: Designator=CN2(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=CN3(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=CN4(CONN-TH_3P-P2.54_2501S-3P) +Added Component: Designator=CN5(CONN-TH_4P-P2.50_4PIN) +Added Component: Designator=CN6(CONN-TH_4P-P2.50_4PIN) +Added Component: Designator=CN7(CONN-TH_2P-P3.96_C9900035759) +Added Component: Designator=CY1(Y_Cap) +Added Component: Designator=D3(SMA_L4.3-W2.5-LS5.0-RD) +Added Component: Designator=E1(CAP-TH_BD5.0-P2.00-D0.8-FD) +Added Component: Designator=GND1(Test_Point) +Added Component: Designator=L1(IND-SMD_L11.6-W10.1) +Added Component: Designator=P1(B5B-XH-AM) +Added Component: Designator=P2(CONN-TH_2P-P9.50_DBT50G-9.5-2P) +Added Component: Designator=P3(SINK-TH_L15.0-W10.5-H21.0) +Added Component: Designator=P4(CONN-TH_2P-P9.50_DBT50G-9.5-2P) +Added Component: Designator=P5(SINK-TH_L15.0-W10.5-H21.0) +Added Component: Designator=P6(CONN-TH_2P-P9.50_DBT50G-9.5-2P) +Added Component: Designator=Q1(SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR) +Added Component: Designator=Q2(TO-220-3_L10.0-W4.5-P2.54-L) +Added Component: Designator=Q3(SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR) +Added Component: Designator=Q4(TO-220-3_L10.0-W4.5-P2.54-L) +Added Component: Designator=Q5(SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR) +Added Component: Designator=R1(EIA0603) +Added Component: Designator=R2(EIA0603) +Added Component: Designator=R3(EIA0603) +Added Component: Designator=R4(EIA0603) +Added Component: Designator=R5(EIA0603) +Added Component: Designator=R6(EIA0603) +Added Component: Designator=R7(EIA0603) +Added Component: Designator=R8(EIA0603) +Added Component: Designator=R9(EIA0603) +Added Component: Designator=R10(EIA0603) +Added Component: Designator=R11(EIA0603) +Added Component: Designator=R12(EIA0603) +Added Component: Designator=R13(EIA0603) +Added Component: Designator=R14(EIA1206) +Added Component: Designator=R15(EIA0603) +Added Component: Designator=R16(EIA1206) +Added Component: Designator=R17(EIA0603) +Added Component: Designator=R18(EIA0603) +Added Component: Designator=R19(EIA0603) +Added Component: Designator=R20(EIA0603) +Added Component: Designator=R21(EIA0603) +Added Component: Designator=R22(EIA0603) +Added Component: Designator=R23(EIA0603) +Added Component: Designator=R24(EIA0603) +Added Component: Designator=R25(EIA0603) +Added Component: Designator=R26(EIA0603) +Added Component: Designator=R27(EIA0603) +Added Component: Designator=R28(EIA0603) +Added Component: Designator=R29(EIA0603) +Added Component: Designator=R30(EIA0603) +Added Component: Designator=R31(EIA0603) +Added Component: Designator=R32(EIA0603) +Added Component: Designator=R33(EIA0603) +Added Component: Designator=R34(EIA0603) +Added Component: Designator=R35(EIA0603) +Added Component: Designator=R36(EIA0603) +Added Component: Designator=R37(EIA0603) +Added Component: Designator=R38(EIA0603) +Added Component: Designator=R39(EIA0603) +Added Component: Designator=R40(EIA0603) +Added Component: Designator=R41(EIA0603) +Added Component: Designator=R42(EIA0603) +Added Component: Designator=R43(EIA0603) +Added Component: Designator=R44(EIA0603) +Added Component: Designator=R45(EIA0603) +Added Component: Designator=R46(EIA0603) +Added Component: Designator=R47(EIA0603) +Added Component: Designator=R48(EIA0603) +Added Component: Designator=R49(EIA0603) +Added Component: Designator=R50(EIA0603) +Added Component: Designator=R51(EIA0603) +Added Component: Designator=R52(EIA0603) +Added Component: Designator=R53(EIA0603) +Added Component: Designator=R54(EIA0603) +Added Component: Designator=R55(EIA0603) +Added Component: Designator=R56(EIA0603) +Added Component: Designator=R57(EIA0603) +Added Component: Designator=RLY1(RELAY-TH_HF32F-X-HXXXX-XXX) +Added Component: Designator=SW1(SW-SMD_4P-L6.0-W6.0-P4.50-LS9.0_H5.0) +Added Component: Designator=SW2(SW-SMD_4P-L6.0-W6.0-P4.50-LS9.0_H5.0) +Added Component: Designator=T1(CONN-TH_T44001) +Added Component: Designator=T2(CONN-TH_T44001) +Added Component: Designator=T3(CONN-TH_T44001) +Added Component: Designator=T4(CONN-TH_T44001) +Added Component: Designator=T5(CONN-TH_T44001) +Added Component: Designator=T6(CONN-TH_T44001) +Added Component: Designator=U1(SOIC16N_N) +Added Component: Designator=U2(SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL) +Added Component: Designator=U3(LQFP-64_L10.0-W10.0-P0.50-LS12.0-BL) +Added Component: Designator=U4(QFN28) +Added Component: Designator=U5(SOP-8_L4.9-W3.9-P1.27-LS6.0-BL-EP) +Added Component: Designator=U6(TO-252-2_L6.5-W6.1-P4.58-LS10.0-TL) +Added Component: Designator=U7(SOT-223-3_L6.5-W3.4-P2.30-LS7.0-BR) +Added Component: Designator=U8(SOT-23-5_L2.9-W1.6-P0.95-LS2.8-BR) +Added Component: Designator=U9(TSSOP-16_L5.0-W4.4-P0.65-LS6.4-BL) +Added Component: Designator=U10(SOP-6_L8.5-W6.4-P2.54-LS9.2-BL) +Added Component: Designator=U11(CAP-TH_L12.0-W5.0-P10.00-D0.6-1) +Added Component: Designator=U12(SOP-6_L8.5-W6.4-P2.54-LS9.2-BL) +Added Component: Designator=U13(TSSOP-16_L5.0-W4.4-P0.65-LS6.4-BL) +Added Component: Designator=U14(CAP-TH_L12.0-W5.0-P10.00-D0.6-1) +Added Component: Designator=V1(Test_Point) +Added Component: Designator=X1(OSC-SMD_L3.2-W1.5) +Added Component: Designator=X2(LC-SMD-5032_2P) +Added Pin To Net: NetName=3V3 Pin=C10-1 +Added Pin To Net: NetName=3V3 Pin=C11-1 +Added Pin To Net: NetName=3V3 Pin=C12-1 +Added Pin To Net: NetName=3V3 Pin=C13-1 +Added Pin To Net: NetName=3V3 Pin=C14-1 +Added Pin To Net: NetName=3V3 Pin=C36-1 +Added Pin To Net: NetName=3V3 Pin=C37-1 +Added Pin To Net: NetName=3V3 Pin=P1-4 +Added Pin To Net: NetName=3V3 Pin=R11-2 +Added Pin To Net: NetName=3V3 Pin=R12-2 +Added Pin To Net: NetName=3V3 Pin=U3-13 +Added Pin To Net: NetName=3V3 Pin=U3-19 +Added Pin To Net: NetName=3V3 Pin=U3-32 +Added Pin To Net: NetName=3V3 Pin=U3-48 +Added Pin To Net: NetName=3V3 Pin=U3-64 +Added Pin To Net: NetName=3V3 Pin=U7-2 +Added Pin To Net: NetName=3V3 Pin=U7-4 +Added Net: Name=3V3 +Added Pin To Net: NetName=A3V3 Pin=C39-1 +Added Pin To Net: NetName=A3V3 Pin=C43-1 +Added Pin To Net: NetName=A3V3 Pin=C52-1 +Added Pin To Net: NetName=A3V3 Pin=R24-2 +Added Pin To Net: NetName=A3V3 Pin=R43-2 +Added Pin To Net: NetName=A3V3 Pin=U8-5 +Added Net: Name=A3V3 +Added Pin To Net: NetName=AGND Pin=C40-2 +Added Pin To Net: NetName=AGND Pin=C42-1 +Added Pin To Net: NetName=AGND Pin=C43-2 +Added Pin To Net: NetName=AGND Pin=C44-2 +Added Pin To Net: NetName=AGND Pin=C46-2 +Added Pin To Net: NetName=AGND Pin=C48-1 +Added Pin To Net: NetName=AGND Pin=C49-2 +Added Pin To Net: NetName=AGND Pin=C51-1 +Added Pin To Net: NetName=AGND Pin=C52-2 +Added Pin To Net: NetName=AGND Pin=C53-2 +Added Pin To Net: NetName=AGND Pin=C55-2 +Added Pin To Net: NetName=AGND Pin=C57-1 +Added Pin To Net: NetName=AGND Pin=R21-1 +Added Pin To Net: NetName=AGND Pin=R23-1 +Added Pin To Net: NetName=AGND Pin=R38-1 +Added Pin To Net: NetName=AGND Pin=R42-1 +Added Pin To Net: NetName=AGND Pin=R57-2 +Added Pin To Net: NetName=AGND Pin=U9-5 +Added Pin To Net: NetName=AGND Pin=U13-5 +Added Net: Name=AGND +Added Pin To Net: NetName=ANDROID_RXD Pin=CN1-3 +Added Pin To Net: NetName=ANDROID_RXD Pin=U1-14 +Added Net: Name=ANDROID_RXD +Added Pin To Net: NetName=ANDROID_TXD Pin=CN1-2 +Added Pin To Net: NetName=ANDROID_TXD Pin=U1-8 +Added Net: Name=ANDROID_TXD +Added Pin To Net: NetName=AOUT1 Pin=CN6-4 +Added Pin To Net: NetName=AOUT1 Pin=U4-24 +Added Net: Name=AOUT1 +Added Pin To Net: NetName=AOUT2 Pin=CN6-2 +Added Pin To Net: NetName=AOUT2 Pin=U4-21 +Added Net: Name=AOUT2 +Added Pin To Net: NetName=BOUT1 Pin=CN6-1 +Added Pin To Net: NetName=BOUT1 Pin=U4-26 +Added Net: Name=BOUT1 +Added Pin To Net: NetName=BOUT2 Pin=CN6-3 +Added Pin To Net: NetName=BOUT2 Pin=U4-1 +Added Net: Name=BOUT2 +Added Pin To Net: NetName=D3V3 Pin=C45-2 +Added Pin To Net: NetName=D3V3 Pin=C54-2 +Added Pin To Net: NetName=D3V3 Pin=U9-13 +Added Pin To Net: NetName=D3V3 Pin=U13-13 +Added Net: Name=D3V3 +Added Pin To Net: NetName=EARTH Pin=CY1-2 +Added Net: Name=EARTH +Added Pin To Net: NetName=GND Pin=C4-2 +Added Pin To Net: NetName=GND Pin=C5-1 +Added Pin To Net: NetName=GND Pin=C6-2 +Added Pin To Net: NetName=GND Pin=C7-2 +Added Pin To Net: NetName=GND Pin=C8-2 +Added Pin To Net: NetName=GND Pin=C9-1 +Added Pin To Net: NetName=GND Pin=C10-2 +Added Pin To Net: NetName=GND Pin=C11-2 +Added Pin To Net: NetName=GND Pin=C12-2 +Added Pin To Net: NetName=GND Pin=C13-2 +Added Pin To Net: NetName=GND Pin=C14-2 +Added Pin To Net: NetName=GND Pin=C15-2 +Added Pin To Net: NetName=GND Pin=C16-2 +Added Pin To Net: NetName=GND Pin=C17-2 +Added Pin To Net: NetName=GND Pin=C18-2 +Added Pin To Net: NetName=GND Pin=C19-2 +Added Pin To Net: NetName=GND Pin=C20-2 +Added Pin To Net: NetName=GND Pin=C23-2 +Added Pin To Net: NetName=GND Pin=C24-2 +Added Pin To Net: NetName=GND Pin=C26-2 +Added Pin To Net: NetName=GND Pin=C27-2 +Added Pin To Net: NetName=GND Pin=C28-2 +Added Pin To Net: NetName=GND Pin=C29-2 +Added Pin To Net: NetName=GND Pin=C30-2 +Added Pin To Net: NetName=GND Pin=C32-2 +Added Pin To Net: NetName=GND Pin=C33-2 +Added Pin To Net: NetName=GND Pin=C34-2 +Added Pin To Net: NetName=GND Pin=C35-2 +Added Pin To Net: NetName=GND Pin=C36-2 +Added Pin To Net: NetName=GND Pin=C37-2 +Added Pin To Net: NetName=GND Pin=C38-2 +Added Pin To Net: NetName=GND Pin=C39-2 +Added Pin To Net: NetName=GND Pin=C45-1 +Added Pin To Net: NetName=GND Pin=C54-1 +Added Pin To Net: NetName=GND Pin=CN1-1 +Added Pin To Net: NetName=GND Pin=CN1-6 +Added Pin To Net: NetName=GND Pin=CN1-11 +Added Pin To Net: NetName=GND Pin=CN1-12 +Added Pin To Net: NetName=GND Pin=CN2-3 +Added Pin To Net: NetName=GND Pin=CN3-3 +Added Pin To Net: NetName=GND Pin=CN5-4 +Added Pin To Net: NetName=GND Pin=CN7-1 +Added Pin To Net: NetName=GND Pin=CY1-1 +Added Pin To Net: NetName=GND Pin=E1-2 +Added Pin To Net: NetName=GND Pin=GND1-1 +Added Pin To Net: NetName=GND Pin=P1-5 +Added Pin To Net: NetName=GND Pin=Q1-2 +Added Pin To Net: NetName=GND Pin=Q3-2 +Added Pin To Net: NetName=GND Pin=Q5-2 +Added Pin To Net: NetName=GND Pin=R9-1 +Added Pin To Net: NetName=GND Pin=R10-1 +Added Pin To Net: NetName=GND Pin=R14-1 +Added Pin To Net: NetName=GND Pin=R16-1 +Added Pin To Net: NetName=GND Pin=R17-1 +Added Pin To Net: NetName=GND Pin=R19-2 +Added Pin To Net: NetName=GND Pin=R26-1 +Added Pin To Net: NetName=GND Pin=R28-1 +Added Pin To Net: NetName=GND Pin=R39-1 +Added Pin To Net: NetName=GND Pin=R49-1 +Added Pin To Net: NetName=GND Pin=R50-1 +Added Pin To Net: NetName=GND Pin=R57-1 +Added Pin To Net: NetName=GND Pin=SW1-3 +Added Pin To Net: NetName=GND Pin=SW2-3 +Added Pin To Net: NetName=GND Pin=U1-15 +Added Pin To Net: NetName=GND Pin=U2-7 +Added Pin To Net: NetName=GND Pin=U3-12 +Added Pin To Net: NetName=GND Pin=U3-18 +Added Pin To Net: NetName=GND Pin=U3-31 +Added Pin To Net: NetName=GND Pin=U3-47 +Added Pin To Net: NetName=GND Pin=U3-63 +Added Pin To Net: NetName=GND Pin=U4-0 +Added Pin To Net: NetName=GND Pin=U4-3 +Added Pin To Net: NetName=GND Pin=U4-7 +Added Pin To Net: NetName=GND Pin=U4-13 +Added Pin To Net: NetName=GND Pin=U4-18 +Added Pin To Net: NetName=GND Pin=U4-25 +Added Pin To Net: NetName=GND Pin=U5-6 +Added Pin To Net: NetName=GND Pin=U5-9 +Added Pin To Net: NetName=GND Pin=U6-4 +Added Pin To Net: NetName=GND Pin=U7-1 +Added Pin To Net: NetName=GND Pin=U8-2 +Added Pin To Net: NetName=GND Pin=U8-4 +Added Pin To Net: NetName=GND Pin=U9-3 +Added Pin To Net: NetName=GND Pin=U9-4 +Added Pin To Net: NetName=GND Pin=U13-3 +Added Pin To Net: NetName=GND Pin=U13-4 +Added Net: Name=GND +Added Pin To Net: NetName=KEY Pin=C18-1 +Added Pin To Net: NetName=KEY Pin=R12-1 +Added Pin To Net: NetName=KEY Pin=SW2-2 +Added Net: Name=KEY +Added Pin To Net: NetName=L_C Pin=P4-1 +Added Pin To Net: NetName=L_C Pin=P6-1 +Added Pin To Net: NetName=L_C Pin=RLY1-3 +Added Net: Name=L_C +Added Pin To Net: NetName=L Pin=P2-1 +Added Pin To Net: NetName=L Pin=RLY1-4 +Added Net: Name=L +Added Pin To Net: NetName=M-5VOUT Pin=C23-1 +Added Pin To Net: NetName=M-5VOUT Pin=R15-2 +Added Pin To Net: NetName=M-5VOUT Pin=U4-8 +Added Net: Name=M-5VOUT +Added Pin To Net: NetName=N1S Pin=P4-2 +Added Net: Name=N1S +Added Pin To Net: NetName=N2S Pin=P6-2 +Added Net: Name=N2S +Added Pin To Net: NetName=NetC1_1 Pin=C1-1 +Added Pin To Net: NetName=NetC1_1 Pin=U1-3 +Added Net: Name=NetC1_1 +Added Pin To Net: NetName=NetC1_2 Pin=C1-2 +Added Pin To Net: NetName=NetC1_2 Pin=U1-1 +Added Net: Name=NetC1_2 +Added Pin To Net: NetName=NetC2_1 Pin=C2-1 +Added Pin To Net: NetName=NetC2_1 Pin=U1-2 +Added Net: Name=NetC2_1 +Added Pin To Net: NetName=NetC3_1 Pin=C3-1 +Added Pin To Net: NetName=NetC3_1 Pin=U1-5 +Added Net: Name=NetC3_1 +Added Pin To Net: NetName=NetC3_2 Pin=C3-2 +Added Pin To Net: NetName=NetC3_2 Pin=U1-4 +Added Net: Name=NetC3_2 +Added Pin To Net: NetName=NetC5_2 Pin=C5-2 +Added Pin To Net: NetName=NetC5_2 Pin=U1-6 +Added Net: Name=NetC5_2 +Added Pin To Net: NetName=NetC6_1 Pin=C6-1 +Added Pin To Net: NetName=NetC6_1 Pin=R7-2 +Added Pin To Net: NetName=NetC6_1 Pin=U2-3 +Added Net: Name=NetC6_1 +Added Pin To Net: NetName=NetC7_1 Pin=C7-1 +Added Pin To Net: NetName=NetC7_1 Pin=R8-2 +Added Pin To Net: NetName=NetC7_1 Pin=U2-1 +Added Net: Name=NetC7_1 +Added Pin To Net: NetName=NetC9_2 Pin=C9-2 +Added Pin To Net: NetName=NetC9_2 Pin=U3-30 +Added Net: Name=NetC9_2 +Added Pin To Net: NetName=NetC21_2 Pin=C21-2 +Added Pin To Net: NetName=NetC21_2 Pin=U4-6 +Added Net: Name=NetC21_2 +Added Pin To Net: NetName=NetC22_1 Pin=C22-1 +Added Pin To Net: NetName=NetC22_1 Pin=U4-4 +Added Net: Name=NetC22_1 +Added Pin To Net: NetName=NetC22_2 Pin=C22-2 +Added Pin To Net: NetName=NetC22_2 Pin=U4-5 +Added Net: Name=NetC22_2 +Added Pin To Net: NetName=NetC25_1 Pin=C25-1 +Added Pin To Net: NetName=NetC25_1 Pin=U5-1 +Added Net: Name=NetC25_1 +Added Pin To Net: NetName=NetC25_2 Pin=C25-2 +Added Pin To Net: NetName=NetC25_2 Pin=L1-1 +Added Pin To Net: NetName=NetC25_2 Pin=U5-8 +Added Net: Name=NetC25_2 +Added Pin To Net: NetName=NetC26_1 Pin=C26-1 +Added Pin To Net: NetName=NetC26_1 Pin=C27-1 +Added Pin To Net: NetName=NetC26_1 Pin=U5-7 +Added Net: Name=NetC26_1 +Added Pin To Net: NetName=NetC31_1 Pin=C31-1 +Added Pin To Net: NetName=NetC31_1 Pin=R18-2 +Added Pin To Net: NetName=NetC31_1 Pin=R19-1 +Added Pin To Net: NetName=NetC31_1 Pin=U5-4 +Added Net: Name=NetC31_1 +Added Pin To Net: NetName=NetC40_1 Pin=C40-1 +Added Pin To Net: NetName=NetC40_1 Pin=C41-2 +Added Pin To Net: NetName=NetC40_1 Pin=R22-2 +Added Pin To Net: NetName=NetC40_1 Pin=U9-9 +Added Net: Name=NetC40_1 +Added Pin To Net: NetName=NetC41_1 Pin=C41-1 +Added Pin To Net: NetName=NetC41_1 Pin=C42-2 +Added Pin To Net: NetName=NetC41_1 Pin=R23-2 +Added Pin To Net: NetName=NetC41_1 Pin=U9-8 +Added Net: Name=NetC41_1 +Added Pin To Net: NetName=NetC44_1 Pin=C44-1 +Added Pin To Net: NetName=NetC44_1 Pin=R24-1 +Added Pin To Net: NetName=NetC44_1 Pin=U9-12 +Added Net: Name=NetC44_1 +Added Pin To Net: NetName=NetC46_1 Pin=C46-1 +Added Pin To Net: NetName=NetC46_1 Pin=C47-2 +Added Pin To Net: NetName=NetC46_1 Pin=R27-1 +Added Pin To Net: NetName=NetC46_1 Pin=U9-11 +Added Net: Name=NetC46_1 +Added Pin To Net: NetName=NetC47_1 Pin=C47-1 +Added Pin To Net: NetName=NetC47_1 Pin=C48-2 +Added Pin To Net: NetName=NetC47_1 Pin=R29-1 +Added Pin To Net: NetName=NetC47_1 Pin=U9-10 +Added Net: Name=NetC47_1 +Added Pin To Net: NetName=NetC49_1 Pin=C49-1 +Added Pin To Net: NetName=NetC49_1 Pin=C50-2 +Added Pin To Net: NetName=NetC49_1 Pin=R41-2 +Added Pin To Net: NetName=NetC49_1 Pin=U13-9 +Added Net: Name=NetC49_1 +Added Pin To Net: NetName=NetC50_1 Pin=C50-1 +Added Pin To Net: NetName=NetC50_1 Pin=C51-2 +Added Pin To Net: NetName=NetC50_1 Pin=R42-2 +Added Pin To Net: NetName=NetC50_1 Pin=U13-8 +Added Net: Name=NetC50_1 +Added Pin To Net: NetName=NetC53_1 Pin=C53-1 +Added Pin To Net: NetName=NetC53_1 Pin=R43-1 +Added Pin To Net: NetName=NetC53_1 Pin=U13-12 +Added Net: Name=NetC53_1 +Added Pin To Net: NetName=NetC55_1 Pin=C55-1 +Added Pin To Net: NetName=NetC55_1 Pin=C56-2 +Added Pin To Net: NetName=NetC55_1 Pin=R47-1 +Added Pin To Net: NetName=NetC55_1 Pin=U13-11 +Added Net: Name=NetC55_1 +Added Pin To Net: NetName=NetC56_1 Pin=C56-1 +Added Pin To Net: NetName=NetC56_1 Pin=C57-2 +Added Pin To Net: NetName=NetC56_1 Pin=R51-1 +Added Pin To Net: NetName=NetC56_1 Pin=U13-10 +Added Net: Name=NetC56_1 +Added Pin To Net: NetName=NetCN5_2 Pin=CN5-2 +Added Pin To Net: NetName=NetCN5_2 Pin=R5-1 +Added Pin To Net: NetName=NetCN5_2 Pin=R7-1 +Added Net: Name=NetCN5_2 +Added Pin To Net: NetName=NetCN5_3 Pin=CN5-3 +Added Pin To Net: NetName=NetCN5_3 Pin=R6-1 +Added Pin To Net: NetName=NetCN5_3 Pin=R8-1 +Added Net: Name=NetCN5_3 +Added Pin To Net: NetName=NetD3_2 Pin=D3-2 +Added Pin To Net: NetName=NetD3_2 Pin=Q1-3 +Added Pin To Net: NetName=NetD3_2 Pin=RLY1-2 +Added Net: Name=NetD3_2 +Added Pin To Net: NetName=NetQ1_1 Pin=Q1-1 +Added Pin To Net: NetName=NetQ1_1 Pin=R25-2 +Added Pin To Net: NetName=NetQ1_1 Pin=R26-2 +Added Net: Name=NetQ1_1 +Added Pin To Net: NetName=NetQ2_1 Pin=Q2-1 +Added Pin To Net: NetName=NetQ2_1 Pin=R40-1 +Added Pin To Net: NetName=NetQ2_1 Pin=U11-1 +Added Net: Name=NetQ2_1 +Added Pin To Net: NetName=NetQ2_3 Pin=Q2-3 +Added Pin To Net: NetName=NetQ2_3 Pin=R40-2 +Added Pin To Net: NetName=NetQ2_3 Pin=U10-4 +Added Net: Name=NetQ2_3 +Added Pin To Net: NetName=NetQ3_1 Pin=Q3-1 +Added Pin To Net: NetName=NetQ3_1 Pin=R37-2 +Added Pin To Net: NetName=NetQ3_1 Pin=R39-2 +Added Net: Name=NetQ3_1 +Added Pin To Net: NetName=NetQ3_3 Pin=Q3-3 +Added Pin To Net: NetName=NetQ3_3 Pin=R35-2 +Added Net: Name=NetQ3_3 +Added Pin To Net: NetName=NetQ4_1 Pin=Q4-1 +Added Pin To Net: NetName=NetQ4_1 Pin=R54-1 +Added Pin To Net: NetName=NetQ4_1 Pin=U14-1 +Added Net: Name=NetQ4_1 +Added Pin To Net: NetName=NetQ4_3 Pin=Q4-3 +Added Pin To Net: NetName=NetQ4_3 Pin=R54-2 +Added Pin To Net: NetName=NetQ4_3 Pin=U12-4 +Added Net: Name=NetQ4_3 +Added Pin To Net: NetName=NetQ5_1 Pin=Q5-1 +Added Pin To Net: NetName=NetQ5_1 Pin=R48-2 +Added Pin To Net: NetName=NetQ5_1 Pin=R50-2 +Added Net: Name=NetQ5_1 +Added Pin To Net: NetName=NetQ5_3 Pin=Q5-3 +Added Pin To Net: NetName=NetQ5_3 Pin=R45-2 +Added Net: Name=NetQ5_3 +Added Pin To Net: NetName=NetR1_1 Pin=R1-1 +Added Pin To Net: NetName=NetR1_1 Pin=U1-11 +Added Net: Name=NetR1_1 +Added Pin To Net: NetName=NetR1_2 Pin=R1-2 +Added Net: Name=NetR1_2 +Added Pin To Net: NetName=NetR2_1 Pin=R2-1 +Added Pin To Net: NetName=NetR2_1 Pin=U1-10 +Added Net: Name=NetR2_1 +Added Pin To Net: NetName=NetR2_2 Pin=R2-2 +Added Net: Name=NetR2_2 +Added Pin To Net: NetName=NetR3_1 Pin=R3-1 +Added Pin To Net: NetName=NetR3_1 Pin=U1-12 +Added Net: Name=NetR3_1 +Added Pin To Net: NetName=NetR3_2 Pin=R3-2 +Added Net: Name=NetR3_2 +Added Pin To Net: NetName=NetR4_1 Pin=R4-1 +Added Pin To Net: NetName=NetR4_1 Pin=U1-9 +Added Net: Name=NetR4_1 +Added Pin To Net: NetName=NetR4_2 Pin=R4-2 +Added Net: Name=NetR4_2 +Added Pin To Net: NetName=NetR9_2 Pin=R9-2 +Added Pin To Net: NetName=NetR9_2 Pin=U3-28 +Added Net: Name=NetR9_2 +Added Pin To Net: NetName=NetR10_2 Pin=R10-2 +Added Pin To Net: NetName=NetR10_2 Pin=U3-60 +Added Net: Name=NetR10_2 +Added Pin To Net: NetName=NetR13_1 Pin=R13-1 +Added Pin To Net: NetName=NetR13_1 Pin=U4-2 +Added Net: Name=NetR13_1 +Added Pin To Net: NetName=NetR14_2 Pin=R14-2 +Added Pin To Net: NetName=NetR14_2 Pin=U4-23 +Added Net: Name=NetR14_2 +Added Pin To Net: NetName=NetR15_1 Pin=R15-1 +Added Pin To Net: NetName=NetR15_1 Pin=U4-17 +Added Net: Name=NetR15_1 +Added Pin To Net: NetName=NetR16_2 Pin=R16-2 +Added Pin To Net: NetName=NetR16_2 Pin=U4-27 +Added Net: Name=NetR16_2 +Added Pin To Net: NetName=NetR17_2 Pin=R17-2 +Added Pin To Net: NetName=NetR17_2 Pin=U4-20 +Added Net: Name=NetR17_2 +Added Pin To Net: NetName=NetR20_1 Pin=R20-1 +Added Pin To Net: NetName=NetR20_1 Pin=U8-3 +Added Net: Name=NetR20_1 +Added Pin To Net: NetName=NetR21_2 Pin=R21-2 +Added Pin To Net: NetName=NetR21_2 Pin=R22-1 +Added Pin To Net: NetName=NetR21_2 Pin=T1-1 +Added Pin To Net: NetName=NetR21_2 Pin=T1-2 +Added Pin To Net: NetName=NetR21_2 Pin=T1-3 +Added Pin To Net: NetName=NetR21_2 Pin=T1-4 +Added Net: Name=NetR21_2 +Added Pin To Net: NetName=NetR25_1 Pin=R25-1 +Added Pin To Net: NetName=NetR25_1 Pin=R37-1 +Added Pin To Net: NetName=NetR25_1 Pin=R48-1 +Added Net: Name=NetR25_1 +Added Pin To Net: NetName=NetR27_2 Pin=R27-2 +Added Pin To Net: NetName=NetR27_2 Pin=T2-1 +Added Pin To Net: NetName=NetR27_2 Pin=T2-2 +Added Pin To Net: NetName=NetR27_2 Pin=T2-3 +Added Pin To Net: NetName=NetR27_2 Pin=T2-4 +Added Pin To Net: NetName=NetR27_2 Pin=U9-6 +Added Net: Name=NetR27_2 +Added Pin To Net: NetName=NetR28_2 Pin=R28-2 +Added Pin To Net: NetName=NetR28_2 Pin=U9-2 +Added Net: Name=NetR28_2 +Added Pin To Net: NetName=NetR29_2 Pin=R29-2 +Added Pin To Net: NetName=NetR29_2 Pin=T3-4 +Added Pin To Net: NetName=NetR29_2 Pin=U9-7 +Added Net: Name=NetR29_2 +Added Pin To Net: NetName=NetR30_1 Pin=R30-1 +Added Net: Name=NetR30_1 +Added Pin To Net: NetName=NetR30_2 Pin=R30-2 +Added Pin To Net: NetName=NetR30_2 Pin=U9-1 +Added Net: Name=NetR30_2 +Added Pin To Net: NetName=NetR31_1 Pin=R31-1 +Added Net: Name=NetR31_1 +Added Pin To Net: NetName=NetR31_2 Pin=R31-2 +Added Pin To Net: NetName=NetR31_2 Pin=U9-16 +Added Net: Name=NetR31_2 +Added Pin To Net: NetName=NetR32_1 Pin=R32-1 +Added Net: Name=NetR32_1 +Added Pin To Net: NetName=NetR32_2 Pin=R32-2 +Added Pin To Net: NetName=NetR32_2 Pin=U9-15 +Added Net: Name=NetR32_2 +Added Pin To Net: NetName=NetR33_1 Pin=R33-1 +Added Net: Name=NetR33_1 +Added Pin To Net: NetName=NetR33_2 Pin=R33-2 +Added Pin To Net: NetName=NetR33_2 Pin=U9-14 +Added Net: Name=NetR33_2 +Added Pin To Net: NetName=NetR34_2 Pin=R34-2 +Added Pin To Net: NetName=NetR34_2 Pin=U10-6 +Added Net: Name=NetR34_2 +Added Pin To Net: NetName=NetR35_1 Pin=R35-1 +Added Pin To Net: NetName=NetR35_1 Pin=U10-2 +Added Net: Name=NetR35_1 +Added Pin To Net: NetName=NetR36_2 Pin=R36-2 +Added Pin To Net: NetName=NetR36_2 Pin=U11-2 +Added Net: Name=NetR36_2 +Added Pin To Net: NetName=NetR38_2 Pin=R38-2 +Added Pin To Net: NetName=NetR38_2 Pin=R41-1 +Added Pin To Net: NetName=NetR38_2 Pin=T4-1 +Added Pin To Net: NetName=NetR38_2 Pin=T4-2 +Added Pin To Net: NetName=NetR38_2 Pin=T4-3 +Added Pin To Net: NetName=NetR38_2 Pin=T4-4 +Added Net: Name=NetR38_2 +Added Pin To Net: NetName=NetR44_2 Pin=R44-2 +Added Pin To Net: NetName=NetR44_2 Pin=U12-6 +Added Net: Name=NetR44_2 +Added Pin To Net: NetName=NetR45_1 Pin=R45-1 +Added Pin To Net: NetName=NetR45_1 Pin=U12-2 +Added Net: Name=NetR45_1 +Added Pin To Net: NetName=NetR46_2 Pin=R46-2 +Added Pin To Net: NetName=NetR46_2 Pin=U14-2 +Added Net: Name=NetR46_2 +Added Pin To Net: NetName=NetR47_2 Pin=R47-2 +Added Pin To Net: NetName=NetR47_2 Pin=T5-1 +Added Pin To Net: NetName=NetR47_2 Pin=T5-2 +Added Pin To Net: NetName=NetR47_2 Pin=T5-3 +Added Pin To Net: NetName=NetR47_2 Pin=T5-4 +Added Pin To Net: NetName=NetR47_2 Pin=U13-6 +Added Net: Name=NetR47_2 +Added Pin To Net: NetName=NetR49_2 Pin=R49-2 +Added Pin To Net: NetName=NetR49_2 Pin=U13-2 +Added Net: Name=NetR49_2 +Added Pin To Net: NetName=NetR51_2 Pin=R51-2 +Added Pin To Net: NetName=NetR51_2 Pin=T6-4 +Added Pin To Net: NetName=NetR51_2 Pin=U13-7 +Added Net: Name=NetR51_2 +Added Pin To Net: NetName=NetR52_1 Pin=R52-1 +Added Net: Name=NetR52_1 +Added Pin To Net: NetName=NetR52_2 Pin=R52-2 +Added Pin To Net: NetName=NetR52_2 Pin=U13-1 +Added Net: Name=NetR52_2 +Added Pin To Net: NetName=NetR53_1 Pin=R53-1 +Added Net: Name=NetR53_1 +Added Pin To Net: NetName=NetR53_2 Pin=R53-2 +Added Pin To Net: NetName=NetR53_2 Pin=U13-16 +Added Net: Name=NetR53_2 +Added Pin To Net: NetName=NetR55_1 Pin=R55-1 +Added Net: Name=NetR55_1 +Added Pin To Net: NetName=NetR55_2 Pin=R55-2 +Added Pin To Net: NetName=NetR55_2 Pin=U13-15 +Added Net: Name=NetR55_2 +Added Pin To Net: NetName=NetR56_1 Pin=R56-1 +Added Net: Name=NetR56_1 +Added Pin To Net: NetName=NetR56_2 Pin=R56-2 +Added Pin To Net: NetName=NetR56_2 Pin=U13-14 +Added Net: Name=NetR56_2 +Added Pin To Net: NetName=NetT3_1 Pin=T3-1 +Added Pin To Net: NetName=NetT3_1 Pin=T3-2 +Added Pin To Net: NetName=NetT3_1 Pin=T3-3 +Added Net: Name=NetT3_1 +Added Pin To Net: NetName=NetT6_1 Pin=T6-1 +Added Pin To Net: NetName=NetT6_1 Pin=T6-2 +Added Pin To Net: NetName=NetT6_1 Pin=T6-3 +Added Net: Name=NetT6_1 +Added Pin To Net: NetName=NetU2_2 Pin=U2-2 +Added Net: Name=NetU2_2 +Added Pin To Net: NetName=NetU2_4 Pin=U2-4 +Added Net: Name=NetU2_4 +Added Pin To Net: NetName=NetU4_14 Pin=U4-14 +Added Net: Name=NetU4_14 +Added Pin To Net: NetName=NetU4_16 Pin=U4-16 +Added Net: Name=NetU4_16 +Added Pin To Net: NetName=NetU4_19 Pin=U4-19 +Added Net: Name=NetU4_19 +Added Pin To Net: NetName=NRST Pin=C17-1 +Added Pin To Net: NetName=NRST Pin=R11-1 +Added Pin To Net: NetName=NRST Pin=SW1-2 +Added Pin To Net: NetName=NRST Pin=U3-7 +Added Net: Name=NRST +Added Pin To Net: NetName=N Pin=P2-2 +Added Pin To Net: NetName=N Pin=Q2-2 +Added Pin To Net: NetName=N Pin=Q4-2 +Added Pin To Net: NetName=N Pin=R34-1 +Added Pin To Net: NetName=N Pin=R36-1 +Added Pin To Net: NetName=N Pin=R44-1 +Added Pin To Net: NetName=N Pin=R46-1 +Added Net: Name=N +Added Pin To Net: NetName=PA13/JTMS Pin=P1-1 +Added Pin To Net: NetName=PA13/JTMS Pin=U3-46 +Added Net: Name=PA13/JTMS +Added Pin To Net: NetName=PA14/JTCK Pin=P1-2 +Added Pin To Net: NetName=PA14/JTCK Pin=U3-49 +Added Net: Name=PA14/JTCK +Added Pin To Net: NetName=PB4/JRST Pin=P1-3 +Added Pin To Net: NetName=PB4/JRST Pin=U3-56 +Added Net: Name=PB4/JRST +Added Pin To Net: NetName=PC14/OSC32_IN Pin=C15-1 +Added Pin To Net: NetName=PC14/OSC32_IN Pin=U3-3 +Added Pin To Net: NetName=PC14/OSC32_IN Pin=X1-2 +Added Net: Name=PC14/OSC32_IN +Added Pin To Net: NetName=PC15/OSC32_OUT Pin=C16-1 +Added Pin To Net: NetName=PC15/OSC32_OUT Pin=U3-4 +Added Pin To Net: NetName=PC15/OSC32_OUT Pin=X1-1 +Added Net: Name=PC15/OSC32_OUT +Added Pin To Net: NetName=PC_RXD Pin=CN1-5 +Added Pin To Net: NetName=PC_RXD Pin=CN3-1 +Added Net: Name=PC_RXD +Added Pin To Net: NetName=PC_TXD Pin=CN1-4 +Added Pin To Net: NetName=PC_TXD Pin=CN3-2 +Added Net: Name=PC_TXD +Added Pin To Net: NetName=PH0/OSC_IN Pin=C19-1 +Added Pin To Net: NetName=PH0/OSC_IN Pin=U3-5 +Added Pin To Net: NetName=PH0/OSC_IN Pin=X2-2 +Added Net: Name=PH0/OSC_IN +Added Pin To Net: NetName=PH1/OSC_OUT Pin=C20-1 +Added Pin To Net: NetName=PH1/OSC_OUT Pin=U3-6 +Added Pin To Net: NetName=PH1/OSC_OUT Pin=X2-1 +Added Net: Name=PH1/OSC_OUT +Added Pin To Net: NetName=PRINT_R XD Pin=CN1-8 +Added Net: Name=PRINT_R XD +Added Pin To Net: NetName=PRINT_TXD Pin=CN1-7 +Added Pin To Net: NetName=PRINT_TXD Pin=CN2-2 +Added Net: Name=PRINT_TXD +Added Pin To Net: NetName=V3.3V Pin=C24-1 +Added Pin To Net: NetName=V3.3V Pin=R13-2 +Added Pin To Net: NetName=V3.3V Pin=U4-15 +Added Net: Name=V3.3V +Added Pin To Net: NetName=V5V Pin=C2-2 +Added Pin To Net: NetName=V5V Pin=C4-1 +Added Pin To Net: NetName=V5V Pin=C8-1 +Added Pin To Net: NetName=V5V Pin=C32-1 +Added Pin To Net: NetName=V5V Pin=C34-1 +Added Pin To Net: NetName=V5V Pin=C35-1 +Added Pin To Net: NetName=V5V Pin=C38-1 +Added Pin To Net: NetName=V5V Pin=CN5-1 +Added Pin To Net: NetName=V5V Pin=D3-1 +Added Pin To Net: NetName=V5V Pin=R5-2 +Added Pin To Net: NetName=V5V Pin=R6-2 +Added Pin To Net: NetName=V5V Pin=R20-2 +Added Pin To Net: NetName=V5V Pin=RLY1-1 +Added Pin To Net: NetName=V5V Pin=U1-16 +Added Pin To Net: NetName=V5V Pin=U2-14 +Added Pin To Net: NetName=V5V Pin=U6-3 +Added Pin To Net: NetName=V5V Pin=U7-3 +Added Pin To Net: NetName=V5V Pin=U8-1 +Added Pin To Net: NetName=V5V Pin=U10-1 +Added Pin To Net: NetName=V5V Pin=U12-1 +Added Net: Name=V5V +Added Pin To Net: NetName=V8V Pin=C28-1 +Added Pin To Net: NetName=V8V Pin=C29-1 +Added Pin To Net: NetName=V8V Pin=C30-1 +Added Pin To Net: NetName=V8V Pin=C31-2 +Added Pin To Net: NetName=V8V Pin=C33-1 +Added Pin To Net: NetName=V8V Pin=CN2-1 +Added Pin To Net: NetName=V8V Pin=L1-2 +Added Pin To Net: NetName=V8V Pin=R18-1 +Added Pin To Net: NetName=V8V Pin=U6-1 +Added Pin To Net: NetName=V8V Pin=V1-1 +Added Net: Name=V8V +Added Pin To Net: NetName=V24V Pin=C21-1 +Added Pin To Net: NetName=V24V Pin=CN7-2 +Added Pin To Net: NetName=V24V Pin=E1-1 +Added Pin To Net: NetName=V24V Pin=U4-22 +Added Pin To Net: NetName=V24V Pin=U4-28 +Added Net: Name=V24V +Added Class: Name=Designator +Added Class: Name=MAIN diff --git a/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-51-09.LOG b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-51-09.LOG new file mode 100644 index 0000000..99da843 --- /dev/null +++ b/Project Logs for 熔体流速仪/MAIN-BOARD PCB ECO 2025-9-30 16-51-09.LOG @@ -0,0 +1,13 @@ +Removed Pin From Net: NetName=NetR25_1 Pin=R37-1 +Removed Pin From Net: NetName=NetR25_1 Pin=R48-1 +Change Component Comment : Designator=R7 Old Comment=330R New Comment=100R +Change Component Comment : Designator=R8 Old Comment=330R New Comment=100R +Added Pin To Net: NetName=NetR37_1 Pin=R37-1 +Added Net: Name=NetR37_1 +Added Pin To Net: NetName=NetR48_1 Pin=R48-1 +Added Net: Name=NetR48_1 +Change Class Name : Old Net Name=Designator New Net Name=¿أPT100ɿع裩 +Added Class: Name= +Added Class: Name=Դ8V5V3.3V +Added Class: Name= +Added Class: Name=ͨţ׿ԡӡ diff --git a/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-13 9-06-47.LOG b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-13 9-06-47.LOG new file mode 100644 index 0000000..e7bb0a2 --- /dev/null +++ b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-13 9-06-47.LOG @@ -0,0 +1,3 @@ +Change Component Designator: Old Designator=R? New Designator=R56 +Change Component Designator: Old Designator=R? New Designator=R72 +Change Component Designator: Old Designator=R? New Designator=R73 diff --git a/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..5180071 --- /dev/null +++ b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=C21 New Designator=C? +Change Component Designator: Old Designator=C22 New Designator=C? +Change Component Designator: Old Designator=C23 New Designator=C? +Change Component Designator: Old Designator=C24 New Designator=C? +Change Component Designator: Old Designator=CN6 New Designator=CN? +Change Component Designator: Old Designator=E1 New Designator=E? +Change Component Designator: Old Designator=R13 New Designator=R? +Change Component Designator: Old Designator=R14 New Designator=R? +Change Component Designator: Old Designator=R15 New Designator=R? +Change Component Designator: Old Designator=R16 New Designator=R? +Change Component Designator: Old Designator=R17 New Designator=R? +Change Component Designator: Old Designator=U4 New Designator=U? diff --git a/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..2ba35e4 --- /dev/null +++ b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=C? New Designator=C21 +Change Component Designator: Old Designator=C? New Designator=C22 +Change Component Designator: Old Designator=C? New Designator=C23 +Change Component Designator: Old Designator=C? New Designator=C24 +Change Component Designator: Old Designator=CN? New Designator=CN6 +Change Component Designator: Old Designator=E? New Designator=E1 +Change Component Designator: Old Designator=R? New Designator=R13 +Change Component Designator: Old Designator=R? New Designator=R14 +Change Component Designator: Old Designator=R? New Designator=R15 +Change Component Designator: Old Designator=R? New Designator=R16 +Change Component Designator: Old Designator=R? New Designator=R17 +Change Component Designator: Old Designator=U? New Designator=U4 diff --git a/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-26 17-25-33.LOG b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-26 17-25-33.LOG new file mode 100644 index 0000000..7b19242 --- /dev/null +++ b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-26 17-25-33.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=C? New Designator=C11 +Change Component Designator: Old Designator=C? New Designator=C12 +Change Component Designator: Old Designator=C? New Designator=C13 +Change Component Designator: Old Designator=C? New Designator=C14 +Change Component Designator: Old Designator=E? New Designator=E1 +Change Component Designator: Old Designator=P? New Designator=P2 +Change Component Designator: Old Designator=R? New Designator=R5 +Change Component Designator: Old Designator=R? New Designator=R6 +Change Component Designator: Old Designator=R? New Designator=R7 +Change Component Designator: Old Designator=R? New Designator=R8 +Change Component Designator: Old Designator=R? New Designator=R9 +Change Component Designator: Old Designator=U? New Designator=U2 diff --git a/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..c1c1a0b --- /dev/null +++ b/Project Logs for 熔体流速仪/MOTOR SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,11 @@ +Change Component Designator: Old Designator=C11 New Designator=C21 +Change Component Designator: Old Designator=C12 New Designator=C22 +Change Component Designator: Old Designator=C13 New Designator=C23 +Change Component Designator: Old Designator=C14 New Designator=C24 +Change Component Designator: Old Designator=CN? New Designator=CN6 +Change Component Designator: Old Designator=R5 New Designator=R13 +Change Component Designator: Old Designator=R6 New Designator=R14 +Change Component Designator: Old Designator=R7 New Designator=R15 +Change Component Designator: Old Designator=R8 New Designator=R16 +Change Component Designator: Old Designator=R9 New Designator=R17 +Change Component Designator: Old Designator=U2 New Designator=U4 diff --git a/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 10-11-40.LOG b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 10-11-40.LOG new file mode 100644 index 0000000..4cd1c45 --- /dev/null +++ b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 10-11-40.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=CN? New Designator=CN7 +Change Component Designator: Old Designator=CN? New Designator=CN8 +Change Component Designator: Old Designator=D2 New Designator=D3 +Change Component Designator: Old Designator=D? New Designator=D2 +Change Component Designator: Old Designator=R18 New Designator=R20 +Change Component Designator: Old Designator=R20 New Designator=R24 +Change Component Designator: Old Designator=R21 New Designator=R25 +Change Component Designator: Old Designator=R? New Designator=R18 +Change Component Designator: Old Designator=R? New Designator=R21 +Change Component Designator: Old Designator=R? New Designator=R22 +Change Component Designator: Old Designator=R? New Designator=R23 +Change Component Designator: Old Designator=V? New Designator=V2 diff --git a/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 14-18-59.LOG b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 14-18-59.LOG new file mode 100644 index 0000000..09cf8b3 --- /dev/null +++ b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-10 14-18-59.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=CN7 New Designator=CN8 +Change Component Designator: Old Designator=CN8 New Designator=CN7 +Change Component Designator: Old Designator=D1 New Designator=D2 +Change Component Designator: Old Designator=D2 New Designator=D1 +Change Component Designator: Old Designator=R18 New Designator=R20 +Change Component Designator: Old Designator=R19 New Designator=R21 +Change Component Designator: Old Designator=R20 New Designator=R23 +Change Component Designator: Old Designator=R21 New Designator=R18 +Change Component Designator: Old Designator=R22 New Designator=R19 +Change Component Designator: Old Designator=R23 New Designator=R22 +Change Component Designator: Old Designator=V1 New Designator=V2 +Change Component Designator: Old Designator=V2 New Designator=V1 diff --git a/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-9 16-06-44.LOG b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-9 16-06-44.LOG new file mode 100644 index 0000000..dd829b4 --- /dev/null +++ b/Project Logs for 熔体流速仪/OTHER SCH ECO 2025-10-9 16-06-44.LOG @@ -0,0 +1,10 @@ +Change Component Designator: Old Designator=B? New Designator=B1 +Change Component Designator: Old Designator=CN? New Designator=CN7 +Change Component Designator: Old Designator=D? New Designator=D1 +Change Component Designator: Old Designator=D? New Designator=D2 +Change Component Designator: Old Designator=Q? New Designator=Q1 +Change Component Designator: Old Designator=R? New Designator=R18 +Change Component Designator: Old Designator=R? New Designator=R19 +Change Component Designator: Old Designator=R? New Designator=R20 +Change Component Designator: Old Designator=R? New Designator=R21 +Change Component Designator: Old Designator=V? New Designator=V1 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-11-40.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-11-40.LOG new file mode 100644 index 0000000..95bcf61 --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-11-40.LOG @@ -0,0 +1,8 @@ +Change Component Designator: Old Designator=CN8 New Designator=CN9 +Change Component Designator: Old Designator=CN9 New Designator=CN10 +Change Component Designator: Old Designator=D3 New Designator=D4 +Change Component Designator: Old Designator=D4 New Designator=D5 +Change Component Designator: Old Designator=R22 New Designator=R26 +Change Component Designator: Old Designator=R23 New Designator=R27 +Change Component Designator: Old Designator=R24 New Designator=R28 +Change Component Designator: Old Designator=V2 New Designator=V3 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-41-07.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-41-07.LOG new file mode 100644 index 0000000..92a2005 --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 10-41-07.LOG @@ -0,0 +1,2 @@ +Change Component Designator: Old Designator=D? New Designator=D4 +Change Component Designator: Old Designator=D? New Designator=D8 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 14-18-59.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 14-18-59.LOG new file mode 100644 index 0000000..d462c77 --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-10 14-18-59.LOG @@ -0,0 +1,6 @@ +Change Component Designator: Old Designator=A? New Designator=A1 +Change Component Designator: Old Designator=C? New Designator=C40 +Change Component Designator: Old Designator=D5 New Designator=D6 +Change Component Designator: Old Designator=D8 New Designator=D5 +Change Component Designator: Old Designator=R28 New Designator=R29 +Change Component Designator: Old Designator=R? New Designator=R28 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..54e0b5e --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,28 @@ +Change Component Designator: Old Designator=C25 New Designator=C? +Change Component Designator: Old Designator=C26 New Designator=C? +Change Component Designator: Old Designator=C27 New Designator=C? +Change Component Designator: Old Designator=C28 New Designator=C? +Change Component Designator: Old Designator=C29 New Designator=C? +Change Component Designator: Old Designator=C30 New Designator=C? +Change Component Designator: Old Designator=C31 New Designator=C? +Change Component Designator: Old Designator=C32 New Designator=C? +Change Component Designator: Old Designator=C33 New Designator=C? +Change Component Designator: Old Designator=C34 New Designator=C? +Change Component Designator: Old Designator=C35 New Designator=C? +Change Component Designator: Old Designator=C36 New Designator=C? +Change Component Designator: Old Designator=C37 New Designator=C? +Change Component Designator: Old Designator=C38 New Designator=C? +Change Component Designator: Old Designator=C39 New Designator=C? +Change Component Designator: Old Designator=CN7 New Designator=CN? +Change Component Designator: Old Designator=D1 New Designator=D? +Change Component Designator: Old Designator=D2 New Designator=D? +Change Component Designator: Old Designator=GND1 New Designator=GND? +Change Component Designator: Old Designator=L1 New Designator=L? +Change Component Designator: Old Designator=R18 New Designator=R? +Change Component Designator: Old Designator=R19 New Designator=R? +Change Component Designator: Old Designator=R20 New Designator=R? +Change Component Designator: Old Designator=U5 New Designator=U? +Change Component Designator: Old Designator=U6 New Designator=U? +Change Component Designator: Old Designator=U7 New Designator=U? +Change Component Designator: Old Designator=U8 New Designator=U? +Change Component Designator: Old Designator=V1 New Designator=V? diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..4f39e2f --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,28 @@ +Change Component Designator: Old Designator=C? New Designator=C25 +Change Component Designator: Old Designator=C? New Designator=C26 +Change Component Designator: Old Designator=C? New Designator=C27 +Change Component Designator: Old Designator=C? New Designator=C28 +Change Component Designator: Old Designator=C? New Designator=C29 +Change Component Designator: Old Designator=C? New Designator=C30 +Change Component Designator: Old Designator=C? New Designator=C31 +Change Component Designator: Old Designator=C? New Designator=C32 +Change Component Designator: Old Designator=C? New Designator=C33 +Change Component Designator: Old Designator=C? New Designator=C34 +Change Component Designator: Old Designator=C? New Designator=C35 +Change Component Designator: Old Designator=C? New Designator=C36 +Change Component Designator: Old Designator=C? New Designator=C37 +Change Component Designator: Old Designator=C? New Designator=C38 +Change Component Designator: Old Designator=C? New Designator=C39 +Change Component Designator: Old Designator=CN? New Designator=CN7 +Change Component Designator: Old Designator=D? New Designator=D1 +Change Component Designator: Old Designator=D? New Designator=D2 +Change Component Designator: Old Designator=GND? New Designator=GND1 +Change Component Designator: Old Designator=L? New Designator=L1 +Change Component Designator: Old Designator=R? New Designator=R18 +Change Component Designator: Old Designator=R? New Designator=R19 +Change Component Designator: Old Designator=R? New Designator=R20 +Change Component Designator: Old Designator=U? New Designator=U5 +Change Component Designator: Old Designator=U? New Designator=U6 +Change Component Designator: Old Designator=U? New Designator=U7 +Change Component Designator: Old Designator=U? New Designator=U8 +Change Component Designator: Old Designator=V? New Designator=V1 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 16-06-44.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 16-06-44.LOG new file mode 100644 index 0000000..131ce95 --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-10-9 16-06-44.LOG @@ -0,0 +1,12 @@ +Change Component Designator: Old Designator=3V3 New Designator=2 +Change Component Designator: Old Designator=8V New Designator=1 +Change Component Designator: Old Designator=A3V3 New Designator=A1 +Change Component Designator: Old Designator=CN7 New Designator=CN8 +Change Component Designator: Old Designator=CN? New Designator=CN9 +Change Component Designator: Old Designator=D1 New Designator=D3 +Change Component Designator: Old Designator=D2 New Designator=D4 +Change Component Designator: Old Designator=E? New Designator=E2 +Change Component Designator: Old Designator=R18 New Designator=R22 +Change Component Designator: Old Designator=R19 New Designator=R23 +Change Component Designator: Old Designator=R20 New Designator=R24 +Change Component Designator: Old Designator=V5V New Designator=V2 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-26 17-25-33.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-26 17-25-33.LOG new file mode 100644 index 0000000..847f749 --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-26 17-25-33.LOG @@ -0,0 +1,14 @@ +Change Component Designator: Old Designator=C? New Designator=C15 +Change Component Designator: Old Designator=C? New Designator=C16 +Change Component Designator: Old Designator=C? New Designator=C17 +Change Component Designator: Old Designator=C? New Designator=C18 +Change Component Designator: Old Designator=C? New Designator=C19 +Change Component Designator: Old Designator=C? New Designator=C20 +Change Component Designator: Old Designator=C? New Designator=C21 +Change Component Designator: Old Designator=D? New Designator=D1 +Change Component Designator: Old Designator=GND? New Designator=GND1 +Change Component Designator: Old Designator=L? New Designator=L1 +Change Component Designator: Old Designator=R? New Designator=R10 +Change Component Designator: Old Designator=R? New Designator=R11 +Change Component Designator: Old Designator=U? New Designator=U3 +Change Component Designator: Old Designator=V? New Designator=V1 diff --git a/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..740351f --- /dev/null +++ b/Project Logs for 熔体流速仪/POWER SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,25 @@ +Change Component Designator: Old Designator=C15 New Designator=C26 +Change Component Designator: Old Designator=C16 New Designator=C27 +Change Component Designator: Old Designator=C17 New Designator=C25 +Change Component Designator: Old Designator=C18 New Designator=C28 +Change Component Designator: Old Designator=C19 New Designator=C29 +Change Component Designator: Old Designator=C20 New Designator=C30 +Change Component Designator: Old Designator=C21 New Designator=C31 +Change Component Designator: Old Designator=C? New Designator=C32 +Change Component Designator: Old Designator=C? New Designator=C33 +Change Component Designator: Old Designator=C? New Designator=C34 +Change Component Designator: Old Designator=C? New Designator=C35 +Change Component Designator: Old Designator=C? New Designator=C36 +Change Component Designator: Old Designator=C? New Designator=C37 +Change Component Designator: Old Designator=C? New Designator=C38 +Change Component Designator: Old Designator=C? New Designator=C39 +Change Component Designator: Old Designator=CN? New Designator=CN7 +Change Component Designator: Old Designator=D? New Designator=D1 +Change Component Designator: Old Designator=D? New Designator=D2 +Change Component Designator: Old Designator=R10 New Designator=R18 +Change Component Designator: Old Designator=R11 New Designator=R19 +Change Component Designator: Old Designator=R? New Designator=R20 +Change Component Designator: Old Designator=U3 New Designator=U5 +Change Component Designator: Old Designator=U? New Designator=U6 +Change Component Designator: Old Designator=U? New Designator=U7 +Change Component Designator: Old Designator=U? New Designator=U8 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 10-11-40.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 10-11-40.LOG new file mode 100644 index 0000000..b155e93 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 10-11-40.LOG @@ -0,0 +1,60 @@ +Change Component Designator: Old Designator=C44 New Designator=C43 +Change Component Designator: Old Designator=C45 New Designator=C44 +Change Component Designator: Old Designator=C46 New Designator=C45 +Change Component Designator: Old Designator=C47 New Designator=C46 +Change Component Designator: Old Designator=C48 New Designator=C47 +Change Component Designator: Old Designator=C49 New Designator=C48 +Change Component Designator: Old Designator=C50 New Designator=C49 +Change Component Designator: Old Designator=C51 New Designator=C50 +Change Component Designator: Old Designator=C52 New Designator=C51 +Change Component Designator: Old Designator=C53 New Designator=C52 +Change Component Designator: Old Designator=C54 New Designator=C53 +Change Component Designator: Old Designator=C55 New Designator=C54 +Change Component Designator: Old Designator=C56 New Designator=C55 +Change Component Designator: Old Designator=C57 New Designator=C56 +Change Component Designator: Old Designator=CN10 New Designator=CN11 +Change Component Designator: Old Designator=CN11 New Designator=CN12 +Change Component Designator: Old Designator=D5 New Designator=D6 +Change Component Designator: Old Designator=D6 New Designator=D7 +Change Component Designator: Old Designator=R25 New Designator=R29 +Change Component Designator: Old Designator=R26 New Designator=R30 +Change Component Designator: Old Designator=R27 New Designator=R31 +Change Component Designator: Old Designator=R28 New Designator=R32 +Change Component Designator: Old Designator=R29 New Designator=R33 +Change Component Designator: Old Designator=R31 New Designator=R34 +Change Component Designator: Old Designator=R32 New Designator=R35 +Change Component Designator: Old Designator=R33 New Designator=R36 +Change Component Designator: Old Designator=R34 New Designator=R37 +Change Component Designator: Old Designator=R35 New Designator=R38 +Change Component Designator: Old Designator=R36 New Designator=R39 +Change Component Designator: Old Designator=R37 New Designator=R40 +Change Component Designator: Old Designator=R38 New Designator=R41 +Change Component Designator: Old Designator=R39 New Designator=R42 +Change Component Designator: Old Designator=R40 New Designator=R43 +Change Component Designator: Old Designator=R41 New Designator=R44 +Change Component Designator: Old Designator=R42 New Designator=R45 +Change Component Designator: Old Designator=R43 New Designator=R46 +Change Component Designator: Old Designator=R44 New Designator=R47 +Change Component Designator: Old Designator=R45 New Designator=R48 +Change Component Designator: Old Designator=R46 New Designator=R49 +Change Component Designator: Old Designator=R47 New Designator=R50 +Change Component Designator: Old Designator=R48 New Designator=R51 +Change Component Designator: Old Designator=R49 New Designator=R52 +Change Component Designator: Old Designator=R50 New Designator=R53 +Change Component Designator: Old Designator=R51 New Designator=R54 +Change Component Designator: Old Designator=R52 New Designator=R55 +Change Component Designator: Old Designator=R53 New Designator=R56 +Change Component Designator: Old Designator=R54 New Designator=R57 +Change Component Designator: Old Designator=R55 New Designator=R58 +Change Component Designator: Old Designator=R56 New Designator=R59 +Change Component Designator: Old Designator=R57 New Designator=R60 +Change Component Designator: Old Designator=R58 New Designator=R61 +Change Component Designator: Old Designator=R59 New Designator=R62 +Change Component Designator: Old Designator=R60 New Designator=R63 +Change Component Designator: Old Designator=R61 New Designator=R64 +Change Component Designator: Old Designator=R62 New Designator=R65 +Change Component Designator: Old Designator=R63 New Designator=R66 +Change Component Designator: Old Designator=R64 New Designator=R67 +Change Component Designator: Old Designator=R65 New Designator=R68 +Change Component Designator: Old Designator=R66 New Designator=R69 +Change Component Designator: Old Designator=R67 New Designator=R70 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 14-18-59.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 14-18-59.LOG new file mode 100644 index 0000000..e2b6851 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 14-18-59.LOG @@ -0,0 +1,61 @@ +Change Component Designator: Old Designator=C40 New Designator=C41 +Change Component Designator: Old Designator=C41 New Designator=C42 +Change Component Designator: Old Designator=C42 New Designator=C43 +Change Component Designator: Old Designator=C43 New Designator=C44 +Change Component Designator: Old Designator=C44 New Designator=C45 +Change Component Designator: Old Designator=C45 New Designator=C46 +Change Component Designator: Old Designator=C46 New Designator=C47 +Change Component Designator: Old Designator=C47 New Designator=C48 +Change Component Designator: Old Designator=C48 New Designator=C49 +Change Component Designator: Old Designator=C49 New Designator=C50 +Change Component Designator: Old Designator=C50 New Designator=C51 +Change Component Designator: Old Designator=C51 New Designator=C52 +Change Component Designator: Old Designator=C52 New Designator=C53 +Change Component Designator: Old Designator=C53 New Designator=C54 +Change Component Designator: Old Designator=C54 New Designator=C55 +Change Component Designator: Old Designator=C55 New Designator=C56 +Change Component Designator: Old Designator=C56 New Designator=C57 +Change Component Designator: Old Designator=D6 New Designator=D7 +Change Component Designator: Old Designator=D7 New Designator=D8 +Change Component Designator: Old Designator=R29 New Designator=R30 +Change Component Designator: Old Designator=R30 New Designator=R31 +Change Component Designator: Old Designator=R31 New Designator=R32 +Change Component Designator: Old Designator=R32 New Designator=R33 +Change Component Designator: Old Designator=R33 New Designator=R34 +Change Component Designator: Old Designator=R34 New Designator=R35 +Change Component Designator: Old Designator=R35 New Designator=R36 +Change Component Designator: Old Designator=R36 New Designator=R37 +Change Component Designator: Old Designator=R37 New Designator=R38 +Change Component Designator: Old Designator=R38 New Designator=R39 +Change Component Designator: Old Designator=R39 New Designator=R40 +Change Component Designator: Old Designator=R40 New Designator=R41 +Change Component Designator: Old Designator=R41 New Designator=R42 +Change Component Designator: Old Designator=R42 New Designator=R43 +Change Component Designator: Old Designator=R43 New Designator=R44 +Change Component Designator: Old Designator=R44 New Designator=R45 +Change Component Designator: Old Designator=R45 New Designator=R46 +Change Component Designator: Old Designator=R46 New Designator=R47 +Change Component Designator: Old Designator=R47 New Designator=R48 +Change Component Designator: Old Designator=R48 New Designator=R49 +Change Component Designator: Old Designator=R49 New Designator=R50 +Change Component Designator: Old Designator=R50 New Designator=R51 +Change Component Designator: Old Designator=R51 New Designator=R52 +Change Component Designator: Old Designator=R52 New Designator=R53 +Change Component Designator: Old Designator=R53 New Designator=R54 +Change Component Designator: Old Designator=R54 New Designator=R55 +Change Component Designator: Old Designator=R55 New Designator=R56 +Change Component Designator: Old Designator=R56 New Designator=R57 +Change Component Designator: Old Designator=R57 New Designator=R58 +Change Component Designator: Old Designator=R58 New Designator=R59 +Change Component Designator: Old Designator=R59 New Designator=R60 +Change Component Designator: Old Designator=R60 New Designator=R61 +Change Component Designator: Old Designator=R61 New Designator=R62 +Change Component Designator: Old Designator=R62 New Designator=R63 +Change Component Designator: Old Designator=R63 New Designator=R64 +Change Component Designator: Old Designator=R64 New Designator=R65 +Change Component Designator: Old Designator=R65 New Designator=R66 +Change Component Designator: Old Designator=R66 New Designator=R67 +Change Component Designator: Old Designator=R67 New Designator=R68 +Change Component Designator: Old Designator=R68 New Designator=R69 +Change Component Designator: Old Designator=R69 New Designator=R70 +Change Component Designator: Old Designator=R70 New Designator=R71 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 16-34-05.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 16-34-05.LOG new file mode 100644 index 0000000..eaba98e --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-10 16-34-05.LOG @@ -0,0 +1,5 @@ +Change Component Designator: Old Designator=C? New Designator=C52 +Change Component Designator: Old Designator=C? New Designator=C58 +Change Component Designator: Old Designator=C? New Designator=C59 +Change Component Designator: Old Designator=C? New Designator=C60 +Change Component Designator: Old Designator=D? New Designator=D9 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-09-16.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-09-16.LOG new file mode 100644 index 0000000..168ae17 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-09-16.LOG @@ -0,0 +1,2 @@ +Change Component Designator: Old Designator=C? New Designator=C18 +Change Component Designator: Old Designator=C? New Designator=C52 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-13-33.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-13-33.LOG new file mode 100644 index 0000000..11707c6 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 11-13-33.LOG @@ -0,0 +1,2 @@ +Change Component Designator: Old Designator=Q? New Designator=Q3 +Change Component Designator: Old Designator=Q? New Designator=Q5 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 9-06-47.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 9-06-47.LOG new file mode 100644 index 0000000..6560f4e --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-13 9-06-47.LOG @@ -0,0 +1,3 @@ +Change Component Designator: Old Designator=P? New Designator=P1 +Change Component Designator: Old Designator=P? New Designator=P3 +Change Component Designator: Old Designator=U? New Designator=U12 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-14 9-47-16.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-14 9-47-16.LOG new file mode 100644 index 0000000..11707c6 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-14 9-47-16.LOG @@ -0,0 +1,2 @@ +Change Component Designator: Old Designator=Q? New Designator=Q3 +Change Component Designator: Old Designator=Q? New Designator=Q5 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-01.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-01.LOG new file mode 100644 index 0000000..019c086 --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-01.LOG @@ -0,0 +1,70 @@ +Change Component Designator: Old Designator=C40 New Designator=C? +Change Component Designator: Old Designator=C41 New Designator=C? +Change Component Designator: Old Designator=C42 New Designator=C? +Change Component Designator: Old Designator=C43 New Designator=C? +Change Component Designator: Old Designator=C44 New Designator=C? +Change Component Designator: Old Designator=C45 New Designator=C? +Change Component Designator: Old Designator=C46 New Designator=C? +Change Component Designator: Old Designator=C47 New Designator=C? +Change Component Designator: Old Designator=C48 New Designator=C? +Change Component Designator: Old Designator=C49 New Designator=C? +Change Component Designator: Old Designator=C50 New Designator=C? +Change Component Designator: Old Designator=C51 New Designator=C? +Change Component Designator: Old Designator=C52 New Designator=C? +Change Component Designator: Old Designator=C53 New Designator=C? +Change Component Designator: Old Designator=C54 New Designator=C? +Change Component Designator: Old Designator=C55 New Designator=C? +Change Component Designator: Old Designator=C56 New Designator=C? +Change Component Designator: Old Designator=C57 New Designator=C? +Change Component Designator: Old Designator=D3 New Designator=D? +Change Component Designator: Old Designator=P2 New Designator=P? +Change Component Designator: Old Designator=P3 New Designator=P? +Change Component Designator: Old Designator=P4 New Designator=P? +Change Component Designator: Old Designator=P5 New Designator=P? +Change Component Designator: Old Designator=P6 New Designator=P? +Change Component Designator: Old Designator=Q1 New Designator=Q? +Change Component Designator: Old Designator=Q2 New Designator=Q? +Change Component Designator: Old Designator=Q3 New Designator=Q? +Change Component Designator: Old Designator=Q4 New Designator=Q? +Change Component Designator: Old Designator=Q5 New Designator=Q? +Change Component Designator: Old Designator=R21 New Designator=R? +Change Component Designator: Old Designator=R22 New Designator=R? +Change Component Designator: Old Designator=R23 New Designator=R? +Change Component Designator: Old Designator=R24 New Designator=R? +Change Component Designator: Old Designator=R25 New Designator=R? +Change Component Designator: Old Designator=R26 New Designator=R? +Change Component Designator: Old Designator=R27 New Designator=R? +Change Component Designator: Old Designator=R28 New Designator=R? +Change Component Designator: Old Designator=R29 New Designator=R? +Change Component Designator: Old Designator=R30 New Designator=R? +Change Component Designator: Old Designator=R31 New Designator=R? +Change Component Designator: Old Designator=R32 New Designator=R? +Change Component Designator: Old Designator=R33 New Designator=R? +Change Component Designator: Old Designator=R34 New Designator=R? +Change Component Designator: Old Designator=R35 New Designator=R? +Change Component Designator: Old Designator=R36 New Designator=R? +Change Component Designator: Old Designator=R37 New Designator=R? +Change Component Designator: Old Designator=R38 New Designator=R? +Change Component Designator: Old Designator=R39 New Designator=R? +Change Component Designator: Old Designator=R41 New Designator=R? +Change Component Designator: Old Designator=R42 New Designator=R? +Change Component Designator: Old Designator=R43 New Designator=R? +Change Component Designator: Old Designator=R45 New Designator=R? +Change Component Designator: Old Designator=R46 New Designator=R? +Change Component Designator: Old Designator=R47 New Designator=R? +Change Component Designator: Old Designator=R48 New Designator=R? +Change Component Designator: Old Designator=R49 New Designator=R? +Change Component Designator: Old Designator=R50 New Designator=R? +Change Component Designator: Old Designator=R51 New Designator=R? +Change Component Designator: Old Designator=R52 New Designator=R? +Change Component Designator: Old Designator=R53 New Designator=R? +Change Component Designator: Old Designator=R55 New Designator=R? +Change Component Designator: Old Designator=R56 New Designator=R? +Change Component Designator: Old Designator=R57 New Designator=R? +Change Component Designator: Old Designator=RLY1 New Designator=RLY? +Change Component Designator: Old Designator=U9 New Designator=U? +Change Component Designator: Old Designator=U10 New Designator=U? +Change Component Designator: Old Designator=U11 New Designator=U? +Change Component Designator: Old Designator=U12 New Designator=U? +Change Component Designator: Old Designator=U13 New Designator=U? +Change Component Designator: Old Designator=U14 New Designator=U? diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-16.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-16.LOG new file mode 100644 index 0000000..624729d --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 10-39-16.LOG @@ -0,0 +1,83 @@ +Change Component Designator: Old Designator=C? New Designator=C40 +Change Component Designator: Old Designator=C? New Designator=C41 +Change Component Designator: Old Designator=C? New Designator=C42 +Change Component Designator: Old Designator=C? New Designator=C43 +Change Component Designator: Old Designator=C? New Designator=C44 +Change Component Designator: Old Designator=C? New Designator=C45 +Change Component Designator: Old Designator=C? New Designator=C46 +Change Component Designator: Old Designator=C? New Designator=C47 +Change Component Designator: Old Designator=C? New Designator=C48 +Change Component Designator: Old Designator=C? New Designator=C49 +Change Component Designator: Old Designator=C? New Designator=C50 +Change Component Designator: Old Designator=C? New Designator=C51 +Change Component Designator: Old Designator=C? New Designator=C52 +Change Component Designator: Old Designator=C? New Designator=C53 +Change Component Designator: Old Designator=C? New Designator=C54 +Change Component Designator: Old Designator=C? New Designator=C55 +Change Component Designator: Old Designator=C? New Designator=C56 +Change Component Designator: Old Designator=C? New Designator=C57 +Change Component Designator: Old Designator=CN? New Designator=CN8 +Change Component Designator: Old Designator=CN? New Designator=CN9 +Change Component Designator: Old Designator=D? New Designator=D3 +Change Component Designator: Old Designator=D? New Designator=D4 +Change Component Designator: Old Designator=P? New Designator=P2 +Change Component Designator: Old Designator=P? New Designator=P3 +Change Component Designator: Old Designator=P? New Designator=P4 +Change Component Designator: Old Designator=P? New Designator=P5 +Change Component Designator: Old Designator=P? New Designator=P6 +Change Component Designator: Old Designator=Q? New Designator=Q1 +Change Component Designator: Old Designator=Q? New Designator=Q2 +Change Component Designator: Old Designator=Q? New Designator=Q3 +Change Component Designator: Old Designator=Q? New Designator=Q4 +Change Component Designator: Old Designator=Q? New Designator=Q5 +Change Component Designator: Old Designator=R? New Designator=R21 +Change Component Designator: Old Designator=R? New Designator=R22 +Change Component Designator: Old Designator=R? New Designator=R23 +Change Component Designator: Old Designator=R? New Designator=R24 +Change Component Designator: Old Designator=R? New Designator=R25 +Change Component Designator: Old Designator=R? New Designator=R26 +Change Component Designator: Old Designator=R? New Designator=R27 +Change Component Designator: Old Designator=R? New Designator=R28 +Change Component Designator: Old Designator=R? New Designator=R29 +Change Component Designator: Old Designator=R? New Designator=R30 +Change Component Designator: Old Designator=R? New Designator=R31 +Change Component Designator: Old Designator=R? New Designator=R32 +Change Component Designator: Old Designator=R? New Designator=R33 +Change Component Designator: Old Designator=R? New Designator=R34 +Change Component Designator: Old Designator=R? New Designator=R35 +Change Component Designator: Old Designator=R? New Designator=R36 +Change Component Designator: Old Designator=R? New Designator=R37 +Change Component Designator: Old Designator=R? New Designator=R38 +Change Component Designator: Old Designator=R? New Designator=R39 +Change Component Designator: Old Designator=R? New Designator=R40 +Change Component Designator: Old Designator=R? New Designator=R41 +Change Component Designator: Old Designator=R? New Designator=R42 +Change Component Designator: Old Designator=R? New Designator=R43 +Change Component Designator: Old Designator=R? New Designator=R44 +Change Component Designator: Old Designator=R? New Designator=R45 +Change Component Designator: Old Designator=R? New Designator=R46 +Change Component Designator: Old Designator=R? New Designator=R47 +Change Component Designator: Old Designator=R? New Designator=R48 +Change Component Designator: Old Designator=R? New Designator=R49 +Change Component Designator: Old Designator=R? New Designator=R50 +Change Component Designator: Old Designator=R? New Designator=R51 +Change Component Designator: Old Designator=R? New Designator=R52 +Change Component Designator: Old Designator=R? New Designator=R53 +Change Component Designator: Old Designator=R? New Designator=R54 +Change Component Designator: Old Designator=R? New Designator=R55 +Change Component Designator: Old Designator=R? New Designator=R56 +Change Component Designator: Old Designator=R? New Designator=R57 +Change Component Designator: Old Designator=R? New Designator=R58 +Change Component Designator: Old Designator=R? New Designator=R59 +Change Component Designator: Old Designator=R? New Designator=R60 +Change Component Designator: Old Designator=R? New Designator=R61 +Change Component Designator: Old Designator=R? New Designator=R62 +Change Component Designator: Old Designator=R? New Designator=R63 +Change Component Designator: Old Designator=RLY? New Designator=RLY1 +Change Component Designator: Old Designator=U? New Designator=U9 +Change Component Designator: Old Designator=U? New Designator=U10 +Change Component Designator: Old Designator=U? New Designator=U11 +Change Component Designator: Old Designator=U? New Designator=U12 +Change Component Designator: Old Designator=U? New Designator=U13 +Change Component Designator: Old Designator=U? New Designator=U14 +Change Component Designator: Old Designator=U? New Designator=U15 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 16-06-44.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 16-06-44.LOG new file mode 100644 index 0000000..7cb4e8f --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-10-9 16-06-44.LOG @@ -0,0 +1,52 @@ +Change Component Designator: Old Designator=CN8 New Designator=CN10 +Change Component Designator: Old Designator=CN9 New Designator=CN11 +Change Component Designator: Old Designator=D3 New Designator=D5 +Change Component Designator: Old Designator=D4 New Designator=D6 +Change Component Designator: Old Designator=Q1 New Designator=Q2 +Change Component Designator: Old Designator=Q2 New Designator=Q3 +Change Component Designator: Old Designator=Q3 New Designator=Q4 +Change Component Designator: Old Designator=Q4 New Designator=Q5 +Change Component Designator: Old Designator=Q5 New Designator=Q6 +Change Component Designator: Old Designator=R21 New Designator=R25 +Change Component Designator: Old Designator=R22 New Designator=R26 +Change Component Designator: Old Designator=R23 New Designator=R27 +Change Component Designator: Old Designator=R24 New Designator=R28 +Change Component Designator: Old Designator=R25 New Designator=R29 +Change Component Designator: Old Designator=R26 New Designator=R30 +Change Component Designator: Old Designator=R27 New Designator=R31 +Change Component Designator: Old Designator=R28 New Designator=R32 +Change Component Designator: Old Designator=R29 New Designator=R33 +Change Component Designator: Old Designator=R30 New Designator=R34 +Change Component Designator: Old Designator=R31 New Designator=R35 +Change Component Designator: Old Designator=R32 New Designator=R36 +Change Component Designator: Old Designator=R33 New Designator=R37 +Change Component Designator: Old Designator=R34 New Designator=R38 +Change Component Designator: Old Designator=R35 New Designator=R39 +Change Component Designator: Old Designator=R36 New Designator=R40 +Change Component Designator: Old Designator=R37 New Designator=R41 +Change Component Designator: Old Designator=R38 New Designator=R42 +Change Component Designator: Old Designator=R39 New Designator=R43 +Change Component Designator: Old Designator=R40 New Designator=R44 +Change Component Designator: Old Designator=R41 New Designator=R45 +Change Component Designator: Old Designator=R42 New Designator=R46 +Change Component Designator: Old Designator=R43 New Designator=R47 +Change Component Designator: Old Designator=R44 New Designator=R48 +Change Component Designator: Old Designator=R45 New Designator=R49 +Change Component Designator: Old Designator=R46 New Designator=R50 +Change Component Designator: Old Designator=R47 New Designator=R51 +Change Component Designator: Old Designator=R48 New Designator=R52 +Change Component Designator: Old Designator=R49 New Designator=R53 +Change Component Designator: Old Designator=R50 New Designator=R54 +Change Component Designator: Old Designator=R51 New Designator=R55 +Change Component Designator: Old Designator=R52 New Designator=R56 +Change Component Designator: Old Designator=R53 New Designator=R57 +Change Component Designator: Old Designator=R54 New Designator=R58 +Change Component Designator: Old Designator=R55 New Designator=R59 +Change Component Designator: Old Designator=R56 New Designator=R60 +Change Component Designator: Old Designator=R57 New Designator=R61 +Change Component Designator: Old Designator=R58 New Designator=R62 +Change Component Designator: Old Designator=R59 New Designator=R63 +Change Component Designator: Old Designator=R60 New Designator=R64 +Change Component Designator: Old Designator=R61 New Designator=R65 +Change Component Designator: Old Designator=R62 New Designator=R66 +Change Component Designator: Old Designator=R63 New Designator=R67 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-26 17-25-33.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-26 17-25-33.LOG new file mode 100644 index 0000000..0d9ca2f --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-26 17-25-33.LOG @@ -0,0 +1,17 @@ +Change Component Designator: Old Designator=C? New Designator=C22 +Change Component Designator: Old Designator=C? New Designator=C23 +Change Component Designator: Old Designator=C? New Designator=C24 +Change Component Designator: Old Designator=C? New Designator=C25 +Change Component Designator: Old Designator=C? New Designator=C26 +Change Component Designator: Old Designator=C? New Designator=C27 +Change Component Designator: Old Designator=C? New Designator=C28 +Change Component Designator: Old Designator=C? New Designator=C29 +Change Component Designator: Old Designator=R? New Designator=R12 +Change Component Designator: Old Designator=R? New Designator=R13 +Change Component Designator: Old Designator=R? New Designator=R14 +Change Component Designator: Old Designator=R? New Designator=R15 +Change Component Designator: Old Designator=R? New Designator=R16 +Change Component Designator: Old Designator=T? New Designator=T1 +Change Component Designator: Old Designator=T? New Designator=T2 +Change Component Designator: Old Designator=T? New Designator=T3 +Change Component Designator: Old Designator=U? New Designator=U4 diff --git a/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-30 16-25-06.LOG b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-30 16-25-06.LOG new file mode 100644 index 0000000..ef054db --- /dev/null +++ b/Project Logs for 熔体流速仪/TEMP SCH ECO 2025-9-30 16-25-06.LOG @@ -0,0 +1,79 @@ +Change Component Designator: Old Designator=C? New Designator=C40 +Change Component Designator: Old Designator=C? New Designator=C41 +Change Component Designator: Old Designator=C? New Designator=C42 +Change Component Designator: Old Designator=C? New Designator=C43 +Change Component Designator: Old Designator=C? New Designator=C44 +Change Component Designator: Old Designator=C? New Designator=C45 +Change Component Designator: Old Designator=C? New Designator=C46 +Change Component Designator: Old Designator=C? New Designator=C47 +Change Component Designator: Old Designator=C? New Designator=C48 +Change Component Designator: Old Designator=C? New Designator=C49 +Change Component Designator: Old Designator=C? New Designator=C50 +Change Component Designator: Old Designator=C? New Designator=C51 +Change Component Designator: Old Designator=C? New Designator=C52 +Change Component Designator: Old Designator=C? New Designator=C53 +Change Component Designator: Old Designator=C? New Designator=C54 +Change Component Designator: Old Designator=C? New Designator=C55 +Change Component Designator: Old Designator=C? New Designator=C56 +Change Component Designator: Old Designator=C? New Designator=C57 +Change Component Designator: Old Designator=D? New Designator=D3 +Change Component Designator: Old Designator=P? New Designator=P2 +Change Component Designator: Old Designator=P? New Designator=P3 +Change Component Designator: Old Designator=P? New Designator=P4 +Change Component Designator: Old Designator=P? New Designator=P5 +Change Component Designator: Old Designator=P? New Designator=P6 +Change Component Designator: Old Designator=Q? New Designator=Q1 +Change Component Designator: Old Designator=Q? New Designator=Q2 +Change Component Designator: Old Designator=Q? New Designator=Q3 +Change Component Designator: Old Designator=Q? New Designator=Q4 +Change Component Designator: Old Designator=Q? New Designator=Q5 +Change Component Designator: Old Designator=R? New Designator=R21 +Change Component Designator: Old Designator=R? New Designator=R22 +Change Component Designator: Old Designator=R? New Designator=R23 +Change Component Designator: Old Designator=R? New Designator=R24 +Change Component Designator: Old Designator=R? New Designator=R25 +Change Component Designator: Old Designator=R? New Designator=R26 +Change Component Designator: Old Designator=R? New Designator=R27 +Change Component Designator: Old Designator=R? New Designator=R28 +Change Component Designator: Old Designator=R? New Designator=R29 +Change Component Designator: Old Designator=R? New Designator=R30 +Change Component Designator: Old Designator=R? New Designator=R31 +Change Component Designator: Old Designator=R? New Designator=R32 +Change Component Designator: Old Designator=R? New Designator=R33 +Change Component Designator: Old Designator=R? New Designator=R34 +Change Component Designator: Old Designator=R? New Designator=R35 +Change Component Designator: Old Designator=R? New Designator=R36 +Change Component Designator: Old Designator=R? New Designator=R37 +Change Component Designator: Old Designator=R? New Designator=R38 +Change Component Designator: Old Designator=R? New Designator=R39 +Change Component Designator: Old Designator=R? New Designator=R40 +Change Component Designator: Old Designator=R? New Designator=R41 +Change Component Designator: Old Designator=R? New Designator=R42 +Change Component Designator: Old Designator=R? New Designator=R43 +Change Component Designator: Old Designator=R? New Designator=R44 +Change Component Designator: Old Designator=R? New Designator=R45 +Change Component Designator: Old Designator=R? New Designator=R46 +Change Component Designator: Old Designator=R? New Designator=R47 +Change Component Designator: Old Designator=R? New Designator=R48 +Change Component Designator: Old Designator=R? New Designator=R49 +Change Component Designator: Old Designator=R? New Designator=R50 +Change Component Designator: Old Designator=R? New Designator=R51 +Change Component Designator: Old Designator=R? New Designator=R52 +Change Component Designator: Old Designator=R? New Designator=R53 +Change Component Designator: Old Designator=R? New Designator=R54 +Change Component Designator: Old Designator=R? New Designator=R55 +Change Component Designator: Old Designator=R? New Designator=R56 +Change Component Designator: Old Designator=R? New Designator=R57 +Change Component Designator: Old Designator=RLY? New Designator=RLY1 +Change Component Designator: Old Designator=T? New Designator=T1 +Change Component Designator: Old Designator=T? New Designator=T2 +Change Component Designator: Old Designator=T? New Designator=T3 +Change Component Designator: Old Designator=T? New Designator=T4 +Change Component Designator: Old Designator=T? New Designator=T5 +Change Component Designator: Old Designator=T? New Designator=T6 +Change Component Designator: Old Designator=U? New Designator=U9 +Change Component Designator: Old Designator=U? New Designator=U10 +Change Component Designator: Old Designator=U? New Designator=U11 +Change Component Designator: Old Designator=U? New Designator=U12 +Change Component Designator: Old Designator=U? New Designator=U13 +Change Component Designator: Old Designator=U? New Designator=U14 diff --git a/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.drc b/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.drc new file mode 100644 index 0000000..0f47e8c --- /dev/null +++ b/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.drc @@ -0,0 +1,552 @@ +Protel Design System Design Rule Check +PCB File : C:\Users\g\Desktop\\6.Ӳ\1.\\MAIN-BOARD.PcbDoc +Date : 2025/10/14 +Time : 15:03:45 + +ERROR : More than 500 violations detected, DRC was stopped + +Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All) +Rule Violations :0 + +Processing Rule : Un-Routed Net Constraint ( (All) ) +Rule Violations :0 + +Processing Rule : Clearance Constraint (Gap=7mil) (All),(All) +Rule Violations :0 + +Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) +Rule Violations :0 + +Processing Rule : Width Constraint (Min=10mil) (Max=236.22mil) (Preferred=10mil) (All) +Rule Violations :0 + +Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) +Rule Violations :0 + +Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (All) +Rule Violations :0 + +Processing Rule : Hole To Hole Clearance (Gap=10mil) (All),(All) +Rule Violations :0 + +Processing Rule : Minimum Solder Mask Sliver (Gap=10mil) (All),(All) + Violation between Minimum Solder Mask Sliver Constraint: (6mil < 10mil) Between Pad R3-1(2794mil,2895mil) on Top Layer And Pad R1-1(2740mil,2895mil) on Top Layer [Top Solder] Mask Sliver [6mil] + Violation between Minimum Solder Mask Sliver Constraint: (6mil < 10mil) Between Pad R3-2(2794mil,2829mil) on Top Layer And Pad R1-2(2740mil,2829mil) on Top Layer [Top Solder] Mask Sliver [6mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.107mil < 10mil) Between Via (3472mil,719mil) from Top Layer to Bottom Layer And Pad U11-1(3472mil,663mil) on Top Layer [Top Solder] Mask Sliver [3.107mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.787mil < 10mil) Between Via (3900mil,480mil) from Top Layer to Bottom Layer And Pad U11-4(3838mil,463mil) on Top Layer [Top Solder] Mask Sliver [4.787mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.793mil < 10mil) Between Via (716mil,3129mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [4.793mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.793mil < 10mil) Between Via (789mil,3126mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [7.793mil] + Violation between Minimum Solder Mask Sliver Constraint: (1.913mil < 10mil) Between Via (727mil,3248mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [1.913mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.793mil < 10mil) Between Via (751mil,3124mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [9.793mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.913mil < 10mil) Between Via (784mil,3250mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [3.913mil] + Violation between Minimum Solder Mask Sliver Constraint: (4mil < 10mil) Between Pad R72-1(1421mil,3096.001mil) on Top Layer And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Solder] Mask Sliver [4mil] + Violation between Minimum Solder Mask Sliver Constraint: (2.188mil < 10mil) Between Via (1344mil,3138mil) from Top Layer to Bottom Layer And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Solder] Mask Sliver [2.188mil] + Violation between Minimum Solder Mask Sliver Constraint: (4mil < 10mil) Between Pad R72-2(1421mil,3030.001mil) on Top Layer And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Solder] Mask Sliver [4mil] + Violation between Minimum Solder Mask Sliver Constraint: (5.132mil < 10mil) Between Via (1327mil,2998mil) from Top Layer to Bottom Layer And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Solder] Mask Sliver [5.132mil] + Violation between Minimum Solder Mask Sliver Constraint: (5.855mil < 10mil) Between Via (126mil,1159mil) from Top Layer to Bottom Layer And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Solder] Mask Sliver [5.855mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.853mil < 10mil) Between Via (264mil,3332mil) from Top Layer to Bottom Layer And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Solder] Mask Sliver [7.853mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-2(1276.78mil,1055mil) on Top Layer And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-3(1251.19mil,1055mil) on Top Layer And Pad U13-2(1276.78mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U13-4(1225.59mil,1055mil) on Top Layer And Pad U13-3(1251.19mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.096mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-5(1200mil,1055mil) on Top Layer And Pad U13-4(1225.59mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-6(1174.41mil,1055mil) on Top Layer And Pad U13-5(1200mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-7(1148.82mil,1055mil) on Top Layer And Pad U13-6(1174.41mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-8(1123.23mil,1055mil) on Top Layer And Pad U13-7(1148.82mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-15(1276.78mil,829.35mil) on Top Layer And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-14(1251.19mil,829.35mil) on Top Layer And Pad U13-15(1276.78mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U13-13(1225.59mil,829.35mil) on Top Layer And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.096mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.916mil < 10mil) Between Via (1257mil,768mil) from Top Layer to Bottom Layer And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [9.916mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-12(1200mil,829.35mil) on Top Layer And Pad U13-13(1225.59mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-11(1174.41mil,829.35mil) on Top Layer And Pad U13-12(1200mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-10(1148.82mil,829.35mil) on Top Layer And Pad U13-11(1174.41mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-9(1123.23mil,829.35mil) on Top Layer And Pad U13-10(1148.82mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-2(621.78mil,1055mil) on Top Layer And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-3(596.19mil,1055mil) on Top Layer And Pad U9-2(621.78mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U9-4(570.59mil,1055mil) on Top Layer And Pad U9-3(596.19mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.096mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-5(545mil,1055mil) on Top Layer And Pad U9-4(570.59mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-6(519.41mil,1055mil) on Top Layer And Pad U9-5(545mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-7(493.82mil,1055mil) on Top Layer And Pad U9-6(519.41mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-8(468.23mil,1055mil) on Top Layer And Pad U9-7(493.82mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-15(621.78mil,829.35mil) on Top Layer And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-14(596.19mil,829.35mil) on Top Layer And Pad U9-15(621.78mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U9-13(570.59mil,829.35mil) on Top Layer And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.096mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.649mil < 10mil) Between Via (600mil,770mil) from Top Layer to Bottom Layer And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [7.649mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-12(545mil,829.35mil) on Top Layer And Pad U9-13(570.59mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-11(519.41mil,829.35mil) on Top Layer And Pad U9-12(545mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-10(493.82mil,829.35mil) on Top Layer And Pad U9-11(519.41mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-9(468.23mil,829.35mil) on Top Layer And Pad U9-10(493.82mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.83mil < 10mil) Between Pad U8-2(188.005mil,1414.307mil) on Top Layer And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Solder] Mask Sliver [9.83mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.84mil < 10mil) Between Pad U8-2(188.005mil,1414.307mil) on Top Layer And Pad U8-3(150.605mil,1414.307mil) on Top Layer [Top Solder] Mask Sliver [9.84mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.691mil < 10mil) Between Via (825mil,1959mil) from Top Layer to Bottom Layer And Pad U7-1(900mil,1993.55mil) on Top Layer [Top Solder] Mask Sliver [9.691mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-27(1377.574mil,3387mil) on Top Layer And Pad U4-28(1357.89mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-26(1397.26mil,3387mil) on Top Layer And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (6.973mil < 10mil) Between Via (1349mil,3416mil) from Top Layer to Bottom Layer And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Solder] Mask Sliver [6.973mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-25(1416.944mil,3387mil) on Top Layer And Pad U4-26(1397.26mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-24(1436.63mil,3387mil) on Top Layer And Pad U4-25(1416.944mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-23(1456.314mil,3387mil) on Top Layer And Pad U4-24(1436.63mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-22(1476mil,3387mil) on Top Layer And Pad U4-23(1456.314mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-20(1515mil,3328.424mil) on Top Layer And Pad U4-21(1515mil,3348.11mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-19(1515mil,3308.74mil) on Top Layer And Pad U4-20(1515mil,3328.424mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-18(1515mil,3289.054mil) on Top Layer And Pad U4-19(1515mil,3308.74mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-17(1515mil,3269.37mil) on Top Layer And Pad U4-18(1515mil,3289.054mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-16(1515mil,3249.684mil) on Top Layer And Pad U4-17(1515mil,3269.37mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-15(1515mil,3230mil) on Top Layer And Pad U4-16(1515mil,3249.684mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-13(1455.424mil,3191mil) on Top Layer And Pad U4-14(1475.11mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-12(1435.74mil,3191mil) on Top Layer And Pad U4-13(1455.424mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-11(1416.054mil,3191mil) on Top Layer And Pad U4-12(1435.74mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-10(1396.37mil,3191mil) on Top Layer And Pad U4-11(1416.054mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-9(1376.684mil,3191mil) on Top Layer And Pad U4-10(1396.37mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-8(1357mil,3191mil) on Top Layer And Pad U4-9(1376.684mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-6(1318mil,3249.574mil) on Top Layer And Pad U4-7(1318mil,3229.89mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-5(1318mil,3269.26mil) on Top Layer And Pad U4-6(1318mil,3249.574mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-4(1318mil,3288.944mil) on Top Layer And Pad U4-5(1318mil,3269.26mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-3(1318mil,3308.63mil) on Top Layer And Pad U4-4(1318mil,3288.944mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-2(1318mil,3328.314mil) on Top Layer And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Solder] Mask Sliver [3.81mil] + Violation between Minimum Solder Mask Sliver Constraint: (8.976mil < 10mil) Between Via (1270mil,3314mil) from Top Layer to Bottom Layer And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Solder] Mask Sliver [8.976mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-1(1318mil,3348mil) on Top Layer And Pad U4-2(1318mil,3328.314mil) on Top Layer [Top Solder] Mask Sliver [3.812mil] + Violation between Minimum Solder Mask Sliver Constraint: (6.36mil < 10mil) Between Via (1982mil,1703mil) from Top Layer to Bottom Layer And Pad U3-32(2043.63mil,1692.36mil) on Top Layer [Top Solder] Mask Sliver [6.36mil] + Violation between Minimum Solder Mask Sliver Constraint: (5.836mil < 10mil) Between Via (1982mil,1703mil) from Top Layer to Bottom Layer And Pad U3-31(2043.63mil,1712.05mil) on Top Layer [Top Solder] Mask Sliver [5.836mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R61-1(1130mil,1368.001mil) on Top Layer And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R63-1(1240mil,1368.001mil) on Top Layer And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R61-2(1130mil,1302.001mil) on Top Layer And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R63-2(1240mil,1302.001mil) on Top Layer And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R62-1(1295mil,1368.001mil) on Top Layer And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R62-2(1295mil,1302.001mil) on Top Layer And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R59-1(1075mil,1368.001mil) on Top Layer And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R59-2(1075mil,1302.001mil) on Top Layer And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R58-1(1193.39mil,635.826mil) on Top Layer And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C57-2(1083.39mil,635.824mil) on Top Layer And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R58-2(1193.39mil,569.826mil) on Top Layer And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C57-1(1083.39mil,569.824mil) on Top Layer And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C55-1(1248.39mil,635.826mil) on Top Layer And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C55-2(1248.39mil,569.826mil) on Top Layer And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (5.115mil < 10mil) Between Via (877mil,1023mil) from Top Layer to Bottom Layer And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Solder] Mask Sliver [5.115mil] + Violation between Minimum Solder Mask Sliver Constraint: (9mil < 10mil) Between Pad R55-1(3293mil,854mil) on Top Layer And Pad R57-1(3236mil,855mil) on Top Layer [Top Solder] Mask Sliver [9mil] + Violation between Minimum Solder Mask Sliver Constraint: (9mil < 10mil) Between Pad R55-2(3293mil,788mil) on Top Layer And Pad R57-2(3236mil,789mil) on Top Layer [Top Solder] Mask Sliver [9mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.178mil < 10mil) Between Via (877mil,1023mil) from Top Layer to Bottom Layer And Pad R48-1(840mil,978.001mil) on Top Layer [Top Solder] Mask Sliver [9.178mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R38-1(475mil,1368.001mil) on Top Layer And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R40-1(585mil,1368.001mil) on Top Layer And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R38-2(475mil,1302.001mil) on Top Layer And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R40-2(585mil,1302.001mil) on Top Layer And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R39-1(640mil,1368.001mil) on Top Layer And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R39-2(640mil,1302.001mil) on Top Layer And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R36-1(420mil,1368.001mil) on Top Layer And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R36-2(420mil,1302.001mil) on Top Layer And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C48-2(428.39mil,635.824mil) on Top Layer And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R35-1(538.39mil,635.826mil) on Top Layer And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C48-1(428.39mil,569.824mil) on Top Layer And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R35-2(538.39mil,569.826mil) on Top Layer And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C46-1(593.39mil,635.826mil) on Top Layer And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C46-2(593.39mil,569.826mil) on Top Layer And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.999mil < 10mil) Between Pad C38-2(154.001mil,1546mil) on Top Layer And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Solder] Mask Sliver [4.999mil] + Violation between Minimum Solder Mask Sliver Constraint: (4.999mil < 10mil) Between Pad C38-1(220.001mil,1546mil) on Top Layer And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Solder] Mask Sliver [4.999mil] + Violation between Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C31-1(438.956mil,2447.001mil) on Top Layer And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [2mil] + Violation between Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C31-2(372.956mil,2447.001mil) on Top Layer And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [2mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.158mil < 10mil) Between Via (369mil,2352mil) from Top Layer to Bottom Layer And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [7.158mil] + Violation between Minimum Solder Mask Sliver Constraint: (2.001mil < 10mil) Between Pad C31-2(372.956mil,2447.001mil) on Top Layer And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Solder] Mask Sliver [2.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (2.001mil < 10mil) Between Pad C31-1(438.956mil,2447.001mil) on Top Layer And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Solder] Mask Sliver [2.001mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.999mil < 10mil) Between Pad R15-2(1644mil,3196.001mil) on Top Layer And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Solder] Mask Sliver [7.999mil] + Violation between Minimum Solder Mask Sliver Constraint: (7.999mil < 10mil) Between Pad R15-1(1644mil,3262.001mil) on Top Layer And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Solder] Mask Sliver [7.999mil] + Violation between Minimum Solder Mask Sliver Constraint: (3.158mil < 10mil) Between Via (1642mil,3153mil) from Top Layer to Bottom Layer And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Solder] Mask Sliver [3.158mil] + Violation between Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C22-1(1221mil,3279mil) on Top Layer And Pad R13-1(1221mil,3329mil) on Top Layer [Top Solder] Mask Sliver [2mil] + Violation between Minimum Solder Mask Sliver Constraint: (9.158mil < 10mil) Between Via (1270mil,3314mil) from Top Layer to Bottom Layer And Pad R13-1(1221mil,3329mil) on Top Layer [Top Solder] Mask Sliver [9.158mil] + Violation between Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C22-2(1155mil,3279mil) on Top Layer And Pad R13-2(1155mil,3329mil) on Top Layer [Top Solder] Mask Sliver [2mil] + Violation between Minimum Solder Mask Sliver Constraint: (3mil < 10mil) Between Pad C9-1(1822.999mil,1731mil) on Top Layer And Pad R9-1(1821.999mil,1782mil) on Top Layer [Top Solder] Mask Sliver [3mil] +Rule Violations :122 + +Processing Rule : Silk To Solder Mask (Clearance=10mil) (IsPad),(All) + Violation between Silk To Solder Mask Clearance Constraint: (5.934mil < 10mil) Between Arc (1326.93mil,1055mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.934mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.934mil < 10mil) Between Arc (671.93mil,1055mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.934mil] + Violation between Silk To Solder Mask Clearance Constraint: (4.322mil < 10mil) Between Arc (225.804mil,1450.13mil) on Top Overlay And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.322mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.662mil < 10mil) Between Arc (488.699mil,2732.345mil) on Top Overlay And Pad U5-1(488.699mil,2702.955mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.662mil] + Violation between Silk To Solder Mask Clearance Constraint: (6.18mil < 10mil) Between Arc (2441.653mil,2062.047mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.18mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.898mil < 10mil) Between Arc (3994.11mil,3329.022mil) on Top Overlay And Pad U2-1(3965mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.898mil] + Violation between Silk To Solder Mask Clearance Constraint: (6.62mil < 10mil) Between Arc (5372.75mil,3386.216mil) on Top Overlay And Pad RLY1-1(5307mil,3387mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [6.62mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.031mil < 10mil) Between Arc (1116mil,3486mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.031mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.031mil < 10mil) Between Arc (1116mil,3486mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.031mil] + Violation between Silk To Solder Mask Clearance Constraint: (6.003mil < 10mil) Between Arc (4773.2mil,2866.11mil) on Top Overlay And Pad D8-1(4773.2mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.003mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (172mil,3555mil) on Top Overlay And Pad 8V-1(172mil,3555mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.097mil < 10mil) Between Arc (165.124mil,1858.948mil) on Top Overlay And Pad U6-1(212.845mil,1795.185mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.097mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (2155mil,3126mil) on Top Overlay And Pad V5V-1(2155mil,3126mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (3193mil,2070mil) on Top Overlay And Pad 3V3-1(3193mil,2070mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (1762mil,1079mil) on Top Overlay And Pad GND1-1(1762mil,1079mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (119mil,660mil) on Top Overlay And Pad A3V3-1(119mil,660mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.413mil < 10mil) Between Track (5106.834mil,3566.897mil)(5217.166mil,3566.897mil) on Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.413mil] + Violation between Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (5106.834mil,3424.668mil)(5122.642mil,3424.668mil) on Top Overlay And Pad D7-2(5162mil,3449.32mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (5201.358mil,3424.668mil)(5217.166mil,3424.668mil) on Top Overlay And Pad D7-2(5162mil,3449.32mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,837.192mil)(5111.969mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5266.031mil,837.192mil)(5266.031mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,893.686mil)(5266.031mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,583.754mil)(5111.969mil,640.248mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5266.031mil,583.754mil)(5266.031mil,640.248mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,583.754mil)(5266.031mil,583.754mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2726mil,2855mil)(2726mil,2869mil) on Top Overlay And Pad R1-1(2740mil,2895mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2754mil,2855mil)(2754mil,2869mil) on Top Overlay And Pad R1-1(2740mil,2895mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2726mil,2855mil)(2726mil,2869mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2754mil,2855mil)(2754mil,2869mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.735mil < 10mil) Between Text "R1" (2652mil,2838mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.735mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3364mil,1490.999mil)(3364mil,1504.999mil) on Top Overlay And Pad R70-1(3350mil,1464.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3336mil,1490.999mil)(3336mil,1504.999mil) on Top Overlay And Pad R70-1(3350mil,1464.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3364mil,1490.999mil)(3364mil,1504.999mil) on Top Overlay And Pad R70-2(3350mil,1530.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3336mil,1490.999mil)(3336mil,1504.999mil) on Top Overlay And Pad R70-2(3350mil,1530.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3257.913mil,1669.591mil)(3298.528mil,1669.591mil) on Top Overlay And Pad Q6-3(3318mil,1680.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3337.472mil,1669.591mil)(3378.087mil,1669.591mil) on Top Overlay And Pad Q6-3(3318mil,1680.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3378.087mil,1612.409mil)(3378.087mil,1669.591mil) on Top Overlay And Pad Q6-2(3355.4mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3300.071mil,1612.409mil)(3335.929mil,1612.409mil) on Top Overlay And Pad Q6-2(3355.4mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3257.913mil,1612.409mil)(3257.913mil,1669.591mil) on Top Overlay And Pad Q6-1(3280.6mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3300.071mil,1612.409mil)(3335.929mil,1612.409mil) on Top Overlay And Pad Q6-1(3280.6mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3292mil,1491.999mil)(3292mil,1505.999mil) on Top Overlay And Pad R69-1(3278mil,1465.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3264mil,1491.999mil)(3264mil,1505.999mil) on Top Overlay And Pad R69-1(3278mil,1465.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3292mil,1491.999mil)(3292mil,1505.999mil) on Top Overlay And Pad R69-2(3278mil,1531.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3264mil,1491.999mil)(3264mil,1505.999mil) on Top Overlay And Pad R69-2(3278mil,1531.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (802.157mil,3205.02mil)(825.26mil,3205.02mil) on Top Overlay And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (676.74mil,3205.02mil)(699.843mil,3205.02mil) on Top Overlay And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.643mil < 10mil) Between Track (676.74mil,3057mil)(825.26mil,3057mil) on Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.643mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1355mil,3056.001mil)(1355mil,3070.001mil) on Top Overlay And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1383mil,3056.001mil)(1383mil,3070.001mil) on Top Overlay And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1355mil,3056.001mil)(1355mil,3070.001mil) on Top Overlay And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1383mil,3056.001mil)(1383mil,3070.001mil) on Top Overlay And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1407mil,3056.001mil)(1407mil,3070.001mil) on Top Overlay And Pad R72-1(1421mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1435mil,3056.001mil)(1435mil,3070.001mil) on Top Overlay And Pad R72-1(1421mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1407mil,3056.001mil)(1407mil,3070.001mil) on Top Overlay And Pad R72-2(1421mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1435mil,3056.001mil)(1435mil,3070.001mil) on Top Overlay And Pad R72-2(1421mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1215mil)(200.001mil,1215mil) on Top Overlay And Pad C40-1(226.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1187mil)(200.001mil,1187mil) on Top Overlay And Pad C40-1(226.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1215mil)(200.001mil,1215mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1187mil)(200.001mil,1187mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.363mil < 10mil) Between Text "C40" (30mil,1181mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.363mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil] + Violation between Silk To Solder Mask Clearance Constraint: (6.294mil < 10mil) Between Track (366.579mil,3325.74mil)(366.579mil,3474.26mil) on Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.294mil] + Violation between Silk To Solder Mask Clearance Constraint: (4.315mil < 10mil) Between Track (366.6mil,3399.7mil)(472.7mil,3399.7mil) on Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.315mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.002mil < 10mil) Between Track (472.713mil,3325.74mil)(472.713mil,3474.26mil) on Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.002mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.015mil < 10mil) Between Track (366.6mil,3399.7mil)(472.7mil,3399.7mil) on Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.015mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.437mil < 10mil) Between Track (2494.13mil,491.671mil)(2505.94mil,491.671mil) on Top Overlay And Pad V1-K(2463.618mil,491.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.437mil] + Violation between Silk To Solder Mask Clearance Constraint: (2.437mil < 10mil) Between Track (2518.862mil,491.671mil)(2527.594mil,491.671mil) on Top Overlay And Pad V1-A(2558.106mil,491.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.437mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2594.862mil,719.67mil)(2594.862mil,733.67mil) on Top Overlay And Pad R22-1(2580.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2566.862mil,719.67mil)(2566.862mil,733.67mil) on Top Overlay And Pad R22-1(2580.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2594.862mil,719.67mil)(2594.862mil,733.67mil) on Top Overlay And Pad R22-2(2580.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2566.862mil,719.67mil)(2566.862mil,733.67mil) on Top Overlay And Pad R22-2(2580.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2446.862mil,719.672mil)(2446.862mil,733.672mil) on Top Overlay And Pad R19-1(2460.862mil,759.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2474.862mil,719.672mil)(2474.862mil,733.672mil) on Top Overlay And Pad R19-1(2460.862mil,759.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2446.862mil,719.672mil)(2446.862mil,733.672mil) on Top Overlay And Pad R19-2(2460.862mil,693.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2474.862mil,719.672mil)(2474.862mil,733.672mil) on Top Overlay And Pad R19-2(2460.862mil,693.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2506.862mil,719.67mil)(2506.862mil,733.67mil) on Top Overlay And Pad R18-1(2520.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2534.862mil,719.67mil)(2534.862mil,733.67mil) on Top Overlay And Pad R18-1(2520.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2506.862mil,719.67mil)(2506.862mil,733.67mil) on Top Overlay And Pad R18-2(2520.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2534.862mil,719.67mil)(2534.862mil,733.67mil) on Top Overlay And Pad R18-2(2520.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2073.756mil,722.999mil)(2073.756mil,736.999mil) on Top Overlay And Pad R20-1(2059.756mil,696.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2045.756mil,722.999mil)(2045.756mil,736.999mil) on Top Overlay And Pad R20-1(2059.756mil,696.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2073.756mil,722.999mil)(2073.756mil,736.999mil) on Top Overlay And Pad R20-2(2059.756mil,762.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2045.756mil,722.999mil)(2045.756mil,736.999mil) on Top Overlay And Pad R20-2(2059.756mil,762.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (9mil < 10mil) Between Track (2575.862mil,551.671mil)(2581.862mil,557.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2581.862mil,557.671mil)(2581.862mil,560.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2581.862mil,560.671mil)(2588.862mil,567.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2588.862mil,567.671mil)(2591.862mil,567.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2579.862mil,637.671mil)(2591.862mil,625.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2591.862mil,552.671mil)(2591.862mil,641.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (4mil < 10mil) Between Track (2599.862mil,553.671mil)(2599.862mil,641.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2475.905mil,2347.559mil)(2475.905mil,2382.992mil) on Top Overlay And Pad X2-2(2425.709mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2475.905mil,2257.008mil)(2475.905mil,2292.441mil) on Top Overlay And Pad X2-2(2425.709mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2214.095mil,2347.559mil)(2214.095mil,2382.992mil) on Top Overlay And Pad X2-1(2264.291mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2214.095mil,2257.008mil)(2214.095mil,2292.441mil) on Top Overlay And Pad X2-1(2264.291mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.997mil < 10mil) Between Track (2664.866mil,2252.535mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.997mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2252.535mil)(2664.866mil,2252.535mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2337.465mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.997mil < 10mil) Between Track (2505.134mil,2252.535mil)(2505.134mil,2337.465mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.997mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2252.535mil)(2664.866mil,2252.535mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2337.465mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (1314.225mil,872.43mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-2(1276.78mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-3(1251.19mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-4(1225.59mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-5(1200mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-6(1174.41mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-7(1148.82mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (1111.375mil,872.43mil)(1111.375mil,1011.91mil) on Top Overlay And Pad U13-8(1123.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-8(1123.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (1314.225mil,872.43mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-15(1276.78mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-13(1225.59mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-12(1200mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-11(1174.41mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-10(1148.82mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (1111.375mil,872.43mil)(1111.375mil,1011.91mil) on Top Overlay And Pad U13-9(1123.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-9(1123.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (659.225mil,872.43mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-2(621.78mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-3(596.19mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-4(570.59mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-5(545mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-6(519.41mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-7(493.82mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (456.375mil,872.43mil)(456.375mil,1011.91mil) on Top Overlay And Pad U9-8(468.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-8(468.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (659.225mil,872.43mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-15(621.78mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-13(570.59mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-12(545mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-11(519.41mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-10(493.82mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (456.375mil,872.43mil)(456.375mil,1011.91mil) on Top Overlay And Pad U9-9(468.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-9(468.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.783mil < 10mil) Between Track (247.999mil,1343.5mil)(248.001mil,1398.499mil) on Top Overlay And Pad U8-5(225.405mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.783mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.595mil < 10mil) Between Track (173.001mil,1335.999mil)(202.999mil,1335.999mil) on Top Overlay And Pad U8-5(225.405mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.595mil] + Violation between Silk To Solder Mask Clearance Constraint: (4.077mil < 10mil) Between Track (133.001mil,1354.368mil)(133.001mil,1387.627mil) on Top Overlay And Pad U8-4(150.595mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.077mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.595mil < 10mil) Between Track (173.001mil,1335.999mil)(202.999mil,1335.999mil) on Top Overlay And Pad U8-4(150.595mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.595mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.795mil < 10mil) Between Track (247.999mil,1343.5mil)(248.001mil,1398.499mil) on Top Overlay And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.795mil] + Violation between Silk To Solder Mask Clearance Constraint: (4.082mil < 10mil) Between Track (133.001mil,1354.368mil)(133.001mil,1387.627mil) on Top Overlay And Pad U8-3(150.605mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.082mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.342mil < 10mil) Between Track (1190.26mil,1850.575mil)(1229.63mil,1850.575mil) on Top Overlay And Pad U7-4(1133.855mil,1903mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.342mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.998mil < 10mil) Between Track (1078.794mil,1772.047mil)(1078.794mil,2033.953mil) on Top Overlay And Pad U7-4(1133.855mil,1903mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.998mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-28(1357.89mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-26(1397.26mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-25(1416.944mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-24(1436.63mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-23(1456.314mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-22(1476mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-21(1515mil,3348.11mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-20(1515mil,3328.424mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-19(1515mil,3308.74mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-18(1515mil,3289.054mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-17(1515mil,3269.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-16(1515mil,3249.684mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-15(1515mil,3230mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-14(1475.11mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-13(1455.424mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-12(1435.74mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-11(1416.054mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-10(1396.37mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-9(1376.684mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-8(1357mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-7(1318mil,3229.89mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-6(1318mil,3249.574mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-5(1318mil,3269.26mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-4(1318mil,3288.944mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-2(1318mil,3328.314mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-1(1318mil,3348mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2466.849mil,2002.646mil)(2466.85mil,2002.646mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2466.85mil,2002.646mil)(2466.85mil,2036.85mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.985mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.849mil,2002.646mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2466.85mil,1643.15mil)(2466.85mil,1677.355mil) on Top Overlay And Pad U3-49(2496.37mil,1692.36mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,1643.15mil)(2466.85mil,1643.15mil) on Top Overlay And Pad U3-48(2417.64mil,1613.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2073.15mil,1643.15mil)(2107.354mil,1643.15mil) on Top Overlay And Pad U3-33(2122.36mil,1613.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2073.15mil,1643.15mil)(2073.15mil,1677.355mil) on Top Overlay And Pad U3-32(2043.63mil,1692.36mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2073.15mil,2002.646mil)(2073.15mil,2036.85mil) on Top Overlay And Pad U3-17(2043.63mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2073.15mil,2036.85mil)(2107.355mil,2036.85mil) on Top Overlay And Pad U3-16(2122.36mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.985mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.985mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.85mil,2036.85mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.849mil,2002.646mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-1(3965mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-2(3915mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-3(3865mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-4(3815mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-5(3765mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-6(3715mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-7(3665mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-14(3965mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-13(3915mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-12(3865mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-11(3815mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-10(3765mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-9(3715mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-8(3665mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1171mil,1328.001mil)(1171mil,1342.001mil) on Top Overlay And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1199mil,1328.001mil)(1199mil,1342.001mil) on Top Overlay And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1171mil,1328.001mil)(1171mil,1342.001mil) on Top Overlay And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1199mil,1328.001mil)(1199mil,1342.001mil) on Top Overlay And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1226mil,1328.001mil)(1226mil,1342.001mil) on Top Overlay And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1254mil,1328.001mil)(1254mil,1342.001mil) on Top Overlay And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1226mil,1328.001mil)(1226mil,1342.001mil) on Top Overlay And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1254mil,1328.001mil)(1254mil,1342.001mil) on Top Overlay And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1281mil,1328.001mil)(1281mil,1342.001mil) on Top Overlay And Pad R62-1(1295mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1309mil,1328.001mil)(1309mil,1342.001mil) on Top Overlay And Pad R62-1(1295mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1281mil,1328.001mil)(1281mil,1342.001mil) on Top Overlay And Pad R62-2(1295mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1309mil,1328.001mil)(1309mil,1342.001mil) on Top Overlay And Pad R62-2(1295mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1116mil,1328.001mil)(1116mil,1342.001mil) on Top Overlay And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1144mil,1328.001mil)(1144mil,1342.001mil) on Top Overlay And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1116mil,1328.001mil)(1116mil,1342.001mil) on Top Overlay And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1144mil,1328.001mil)(1144mil,1342.001mil) on Top Overlay And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1124.39mil,595.826mil)(1124.39mil,609.826mil) on Top Overlay And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1152.39mil,595.826mil)(1152.39mil,609.826mil) on Top Overlay And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1124.39mil,595.826mil)(1124.39mil,609.826mil) on Top Overlay And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1152.39mil,595.826mil)(1152.39mil,609.826mil) on Top Overlay And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1061mil,1328.001mil)(1061mil,1342.001mil) on Top Overlay And Pad R59-1(1075mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1089mil,1328.001mil)(1089mil,1342.001mil) on Top Overlay And Pad R59-1(1075mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1061mil,1328.001mil)(1061mil,1342.001mil) on Top Overlay And Pad R59-2(1075mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1089mil,1328.001mil)(1089mil,1342.001mil) on Top Overlay And Pad R59-2(1075mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1179.39mil,595.826mil)(1179.39mil,609.826mil) on Top Overlay And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1207.39mil,595.826mil)(1207.39mil,609.826mil) on Top Overlay And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1179.39mil,595.826mil)(1179.39mil,609.826mil) on Top Overlay And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1207.39mil,595.826mil)(1207.39mil,609.826mil) on Top Overlay And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1770mil)(3359.001mil,1770mil) on Top Overlay And Pad R67-1(3385.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1742mil)(3359.001mil,1742mil) on Top Overlay And Pad R67-1(3385.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1770mil)(3359.001mil,1770mil) on Top Overlay And Pad R67-2(3319.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1742mil)(3359.001mil,1742mil) on Top Overlay And Pad R67-2(3319.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,966.824mil)(948.39mil,966.824mil) on Top Overlay And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,994.824mil)(948.39mil,994.824mil) on Top Overlay And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,966.824mil)(948.39mil,966.824mil) on Top Overlay And Pad R52-2(974.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,994.824mil)(948.39mil,994.824mil) on Top Overlay And Pad R52-2(974.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,896.825mil)(950.389mil,896.825mil) on Top Overlay And Pad R51-1(910.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,924.825mil)(950.389mil,924.825mil) on Top Overlay And Pad R51-1(910.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,896.825mil)(950.389mil,896.825mil) on Top Overlay And Pad R51-2(976.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,924.825mil)(950.389mil,924.825mil) on Top Overlay And Pad R51-2(976.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3222mil,815mil)(3222mil,829mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3250mil,815mil)(3250mil,829mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R57" (3256mil,889mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3222mil,815mil)(3222mil,829mil) on Top Overlay And Pad R57-2(3236mil,789mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3250mil,815mil)(3250mil,829mil) on Top Overlay And Pad R57-2(3236mil,789mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (826mil,938.001mil)(826mil,952.001mil) on Top Overlay And Pad R48-1(840mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (854mil,938.001mil)(854mil,952.001mil) on Top Overlay And Pad R48-1(840mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (826mil,938.001mil)(826mil,952.001mil) on Top Overlay And Pad R48-2(840mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (854mil,938.001mil)(854mil,952.001mil) on Top Overlay And Pad R48-2(840mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3279mil,814mil)(3279mil,828mil) on Top Overlay And Pad R55-1(3293mil,854mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3307mil,814mil)(3307mil,828mil) on Top Overlay And Pad R55-1(3293mil,854mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3279mil,814mil)(3279mil,828mil) on Top Overlay And Pad R55-2(3293mil,788mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3307mil,814mil)(3307mil,828mil) on Top Overlay And Pad R55-2(3293mil,788mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,578mil)(3294.001mil,578mil) on Top Overlay And Pad R53-1(3320.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,550mil)(3294.001mil,550mil) on Top Overlay And Pad R53-1(3320.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,578mil)(3294.001mil,578mil) on Top Overlay And Pad R53-2(3254.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,550mil)(3294.001mil,550mil) on Top Overlay And Pad R53-2(3254.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3943mil,683mil)(3943mil,713mil) on Top Overlay And Pad R49-1(3968mil,752mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3993mil,683mil)(3993mil,713mil) on Top Overlay And Pad R49-1(3968mil,752mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3943mil,683mil)(3943mil,713mil) on Top Overlay And Pad R49-2(3968mil,644mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3993mil,683mil)(3993mil,713mil) on Top Overlay And Pad R49-2(3968mil,644mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (516mil,1328.001mil)(516mil,1342.001mil) on Top Overlay And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (544mil,1328.001mil)(544mil,1342.001mil) on Top Overlay And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (516mil,1328.001mil)(516mil,1342.001mil) on Top Overlay And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (544mil,1328.001mil)(544mil,1342.001mil) on Top Overlay And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (571mil,1328.001mil)(571mil,1342.001mil) on Top Overlay And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (599mil,1328.001mil)(599mil,1342.001mil) on Top Overlay And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (571mil,1328.001mil)(571mil,1342.001mil) on Top Overlay And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (599mil,1328.001mil)(599mil,1342.001mil) on Top Overlay And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (626mil,1328.001mil)(626mil,1342.001mil) on Top Overlay And Pad R39-1(640mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (654mil,1328.001mil)(654mil,1342.001mil) on Top Overlay And Pad R39-1(640mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (626mil,1328.001mil)(626mil,1342.001mil) on Top Overlay And Pad R39-2(640mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (654mil,1328.001mil)(654mil,1342.001mil) on Top Overlay And Pad R39-2(640mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (461mil,1328.001mil)(461mil,1342.001mil) on Top Overlay And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (489mil,1328.001mil)(489mil,1342.001mil) on Top Overlay And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (461mil,1328.001mil)(461mil,1342.001mil) on Top Overlay And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (489mil,1328.001mil)(489mil,1342.001mil) on Top Overlay And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (469.39mil,595.826mil)(469.39mil,609.826mil) on Top Overlay And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (497.39mil,595.826mil)(497.39mil,609.826mil) on Top Overlay And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (469.39mil,595.826mil)(469.39mil,609.826mil) on Top Overlay And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (497.39mil,595.826mil)(497.39mil,609.826mil) on Top Overlay And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (406mil,1328.001mil)(406mil,1342.001mil) on Top Overlay And Pad R36-1(420mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (434mil,1328.001mil)(434mil,1342.001mil) on Top Overlay And Pad R36-1(420mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (406mil,1328.001mil)(406mil,1342.001mil) on Top Overlay And Pad R36-2(420mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (434mil,1328.001mil)(434mil,1342.001mil) on Top Overlay And Pad R36-2(420mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (524.39mil,595.826mil)(524.39mil,609.826mil) on Top Overlay And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (552.39mil,595.826mil)(552.39mil,609.826mil) on Top Overlay And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (524.39mil,595.826mil)(524.39mil,609.826mil) on Top Overlay And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (552.39mil,595.826mil)(552.39mil,609.826mil) on Top Overlay And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4913mil,3293.999mil)(4913mil,3307.999mil) on Top Overlay And Pad R34-1(4899mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4885mil,3293.999mil)(4885mil,3307.999mil) on Top Overlay And Pad R34-1(4899mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4913mil,3293.999mil)(4913mil,3307.999mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4885mil,3293.999mil)(4885mil,3307.999mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (7.295mil < 10mil) Between Text "R34" (4915mil,3366mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.295mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4825mil,3293.999mil)(4825mil,3307.999mil) on Top Overlay And Pad R31-1(4839mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4853mil,3293.999mil)(4853mil,3307.999mil) on Top Overlay And Pad R31-1(4839mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4825mil,3293.999mil)(4825mil,3307.999mil) on Top Overlay And Pad R31-2(4839mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4853mil,3293.999mil)(4853mil,3307.999mil) on Top Overlay And Pad R31-2(4839mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,966.824mil)(293.39mil,966.824mil) on Top Overlay And Pad R33-1(253.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,994.824mil)(293.39mil,994.824mil) on Top Overlay And Pad R33-1(253.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,966.824mil)(293.39mil,966.824mil) on Top Overlay And Pad R33-2(319.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,994.824mil)(293.39mil,994.824mil) on Top Overlay And Pad R33-2(319.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,896.825mil)(295.389mil,896.825mil) on Top Overlay And Pad R32-1(255.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,924.825mil)(295.389mil,924.825mil) on Top Overlay And Pad R32-1(255.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,896.825mil)(295.389mil,896.825mil) on Top Overlay And Pad R32-2(321.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,924.825mil)(295.389mil,924.825mil) on Top Overlay And Pad R32-2(321.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (171mil,938.001mil)(171mil,952.001mil) on Top Overlay And Pad R30-1(185mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (199mil,938.001mil)(199mil,952.001mil) on Top Overlay And Pad R30-1(185mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (171mil,938.001mil)(171mil,952.001mil) on Top Overlay And Pad R30-2(185mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (199mil,938.001mil)(199mil,952.001mil) on Top Overlay And Pad R30-2(185mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1507mil)(194.999mil,1507mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1479mil)(194.999mil,1479mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (6.648mil < 10mil) Between Text "R29" (25mil,1470mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.648mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1507mil)(194.999mil,1507mil) on Top Overlay And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1479mil)(194.999mil,1479mil) on Top Overlay And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2411.001mil)(412.956mil,2411.001mil) on Top Overlay And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2383.001mil)(412.956mil,2383.001mil) on Top Overlay And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2411.001mil)(412.956mil,2411.001mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2383.001mil)(412.956mil,2383.001mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.604mil < 10mil) Between Text "R27" (241mil,2372mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.604mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2483.001mil)(412.954mil,2483.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2511.001mil)(412.954mil,2511.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (8.648mil < 10mil) Between Text "R26" (240.955mil,2477.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.648mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2483.001mil)(412.954mil,2483.001mil) on Top Overlay And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2511.001mil)(412.954mil,2511.001mil) on Top Overlay And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1714mil,3222.999mil)(1714mil,3236.999mil) on Top Overlay And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1686mil,3222.999mil)(1686mil,3236.999mil) on Top Overlay And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1714mil,3222.999mil)(1714mil,3236.999mil) on Top Overlay And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1686mil,3222.999mil)(1686mil,3236.999mil) on Top Overlay And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1305mil,3530mil)(1305mil,3560mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1355mil,3530mil)(1355mil,3560mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1305mil,3530mil)(1305mil,3560mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1355mil,3530mil)(1355mil,3560mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1630mil,3222.001mil)(1630mil,3236.001mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1658mil,3222.001mil)(1658mil,3236.001mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (9.293mil < 10mil) Between Text "R15" (1658mil,3296mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.293mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1630mil,3222.001mil)(1630mil,3236.001mil) on Top Overlay And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1658mil,3222.001mil)(1658mil,3236.001mil) on Top Overlay And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1530mil,3529mil)(1530mil,3559mil) on Top Overlay And Pad R14-2(1505mil,3490mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1480mil,3529mil)(1480mil,3559mil) on Top Overlay And Pad R14-2(1505mil,3490mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1530mil,3529mil)(1530mil,3559mil) on Top Overlay And Pad R14-1(1505mil,3598mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1480mil,3529mil)(1480mil,3559mil) on Top Overlay And Pad R14-1(1505mil,3598mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3315mil)(1195mil,3315mil) on Top Overlay And Pad R13-1(1221mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3343mil)(1195mil,3343mil) on Top Overlay And Pad R13-1(1221mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3315mil)(1195mil,3315mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3343mil)(1195mil,3343mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2354mil)(2004.999mil,2354mil) on Top Overlay And Pad R11-1(1964.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2382mil)(2004.999mil,2382mil) on Top Overlay And Pad R11-1(1964.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2354mil)(2004.999mil,2354mil) on Top Overlay And Pad R11-2(2030.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2382mil)(2004.999mil,2382mil) on Top Overlay And Pad R11-2(2030.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1939mil)(2622.001mil,1939mil) on Top Overlay And Pad R10-1(2648.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1911mil)(2622.001mil,1911mil) on Top Overlay And Pad R10-1(2648.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1939mil)(2622.001mil,1939mil) on Top Overlay And Pad R10-2(2582.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1911mil)(2622.001mil,1911mil) on Top Overlay And Pad R10-2(2582.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] + Violation between Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1847.999mil,1768mil)(1861.999mil,1768mil) on Top Overlay And Pad R9-1(1821.999mil,1782mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil] +Rule Violations :367 + +Processing Rule : Silk to Silk (Clearance=10mil) (All),(All) + Violation between Silk To Silk Clearance Constraint: (9.828mil < 10mil) Between Text "U5" (412mil,2751mil) on Top Overlay And Arc (488.699mil,2732.345mil) on Top Overlay Silk Text to Silk Clearance [9.828mil] + Violation between Silk To Silk Clearance Constraint: (6.351mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.351mil] + Violation between Silk To Silk Clearance Constraint: (6.933mil < 10mil) Between Text "U4" (1235mil,3375mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.933mil] + Violation between Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil] + Violation between Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "+" (1076mil,3406mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil] + Violation between Silk To Silk Clearance Constraint: (1.202mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [1.202mil] + Violation between Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "+" (1076mil,3406mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil] + Violation between Silk To Silk Clearance Constraint: (1.202mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [1.202mil] + Violation between Silk To Silk Clearance Constraint: (6.933mil < 10mil) Between Text "U4" (1235mil,3375mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.933mil] + Violation between Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil] + Violation between Silk To Silk Clearance Constraint: (6.239mil < 10mil) Between Text "3V3" (3109mil,2129mil) on Top Overlay And Arc (3193mil,2070mil) on Top Overlay Silk Text to Silk Clearance [6.239mil] +Rule Violations :11 + +Processing Rule : Net Antennae (Tolerance=0mil) (All) +Rule Violations :0 + +Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No) +Rule Violations :0 + +Processing Rule : Clearance Constraint (Gap=15mil) (InPolygon),(All) +Rule Violations :0 + + +Violations Detected : 500 +Time Elapsed : 00:00:01 \ No newline at end of file diff --git a/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.html b/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.html new file mode 100644 index 0000000..3d4dfbb --- /dev/null +++ b/Project Outputs for 熔体流速仪/Design Rule Check - MAIN-BOARD.html @@ -0,0 +1,1841 @@ + + + +Design Rule Verification Report + +Altium

Design Rule Verification Report

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Date:2025/10/14
Time:15:03:45
Elapsed Time:00:00:01
Filename:C:\Users\g\Desktop\\6.Ӳ\1.\\MAIN-BOARD.PcbDoc
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Warnings:0
Rule Violations:500
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+

ERROR : More than 500 violations detected, DRC was stopped

Summary

 + + + + + + + + +
WarningsCount
Total0

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Rule ViolationsCount
Short-Circuit Constraint (Allowed=No) (All),(All)0
Un-Routed Net Constraint ( (All) )0
Clearance Constraint (Gap=7mil) (All),(All)0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)0
Width Constraint (Min=10mil) (Max=236.22mil) (Preferred=10mil) (All)0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)0
Hole Size Constraint (Min=1mil) (Max=100mil) (All)0
Hole To Hole Clearance (Gap=10mil) (All),(All)0
Minimum Solder Mask Sliver (Gap=10mil) (All),(All)122
Silk To Solder Mask (Clearance=10mil) (IsPad),(All)367
Silk to Silk (Clearance=10mil) (All),(All)11
Net Antennae (Tolerance=0mil) (All)0
Modified Polygon (Allow modified: No), (Allow shelved: No)0
Clearance Constraint (Gap=15mil) (InPolygon),(All)0
Total500

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Minimum Solder Mask Sliver (Gap=10mil) (All),(All)
Minimum Solder Mask Sliver Constraint: (6mil < 10mil) Between Pad R3-1(2794mil,2895mil) on Top Layer And Pad R1-1(2740mil,2895mil) on Top Layer [Top Solder] Mask Sliver [6mil]
Minimum Solder Mask Sliver Constraint: (6mil < 10mil) Between Pad R3-2(2794mil,2829mil) on Top Layer And Pad R1-2(2740mil,2829mil) on Top Layer [Top Solder] Mask Sliver [6mil]
Minimum Solder Mask Sliver Constraint: (3.107mil < 10mil) Between Via (3472mil,719mil) from Top Layer to Bottom Layer And Pad U11-1(3472mil,663mil) on Top Layer [Top Solder] Mask Sliver [3.107mil]
Minimum Solder Mask Sliver Constraint: (4.787mil < 10mil) Between Via (3900mil,480mil) from Top Layer to Bottom Layer And Pad U11-4(3838mil,463mil) on Top Layer [Top Solder] Mask Sliver [4.787mil]
Minimum Solder Mask Sliver Constraint: (4.793mil < 10mil) Between Via (716mil,3129mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [4.793mil]
Minimum Solder Mask Sliver Constraint: (7.793mil < 10mil) Between Via (789mil,3126mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [7.793mil]
Minimum Solder Mask Sliver Constraint: (1.913mil < 10mil) Between Via (727mil,3248mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [1.913mil]
Minimum Solder Mask Sliver Constraint: (9.793mil < 10mil) Between Via (751mil,3124mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [9.793mil]
Minimum Solder Mask Sliver Constraint: (3.913mil < 10mil) Between Via (784mil,3250mil) from Top Layer to Bottom Layer And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Solder] Mask Sliver [3.913mil]
Minimum Solder Mask Sliver Constraint: (4mil < 10mil) Between Pad R72-1(1421mil,3096.001mil) on Top Layer And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Solder] Mask Sliver [4mil]
Minimum Solder Mask Sliver Constraint: (2.188mil < 10mil) Between Via (1344mil,3138mil) from Top Layer to Bottom Layer And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Solder] Mask Sliver [2.188mil]
Minimum Solder Mask Sliver Constraint: (4mil < 10mil) Between Pad R72-2(1421mil,3030.001mil) on Top Layer And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Solder] Mask Sliver [4mil]
Minimum Solder Mask Sliver Constraint: (5.132mil < 10mil) Between Via (1327mil,2998mil) from Top Layer to Bottom Layer And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Solder] Mask Sliver [5.132mil]
Minimum Solder Mask Sliver Constraint: (5.855mil < 10mil) Between Via (126mil,1159mil) from Top Layer to Bottom Layer And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Solder] Mask Sliver [5.855mil]
Minimum Solder Mask Sliver Constraint: (7.853mil < 10mil) Between Via (264mil,3332mil) from Top Layer to Bottom Layer And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Solder] Mask Sliver [7.853mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-2(1276.78mil,1055mil) on Top Layer And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-3(1251.19mil,1055mil) on Top Layer And Pad U13-2(1276.78mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U13-4(1225.59mil,1055mil) on Top Layer And Pad U13-3(1251.19mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.096mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-5(1200mil,1055mil) on Top Layer And Pad U13-4(1225.59mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-6(1174.41mil,1055mil) on Top Layer And Pad U13-5(1200mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-7(1148.82mil,1055mil) on Top Layer And Pad U13-6(1174.41mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-8(1123.23mil,1055mil) on Top Layer And Pad U13-7(1148.82mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-15(1276.78mil,829.35mil) on Top Layer And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-14(1251.19mil,829.35mil) on Top Layer And Pad U13-15(1276.78mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U13-13(1225.59mil,829.35mil) on Top Layer And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.096mil]
Minimum Solder Mask Sliver Constraint: (9.916mil < 10mil) Between Via (1257mil,768mil) from Top Layer to Bottom Layer And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [9.916mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-12(1200mil,829.35mil) on Top Layer And Pad U13-13(1225.59mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-11(1174.41mil,829.35mil) on Top Layer And Pad U13-12(1200mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-10(1148.82mil,829.35mil) on Top Layer And Pad U13-11(1174.41mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U13-9(1123.23mil,829.35mil) on Top Layer And Pad U13-10(1148.82mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-2(621.78mil,1055mil) on Top Layer And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-3(596.19mil,1055mil) on Top Layer And Pad U9-2(621.78mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U9-4(570.59mil,1055mil) on Top Layer And Pad U9-3(596.19mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.096mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-5(545mil,1055mil) on Top Layer And Pad U9-4(570.59mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-6(519.41mil,1055mil) on Top Layer And Pad U9-5(545mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-7(493.82mil,1055mil) on Top Layer And Pad U9-6(519.41mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-8(468.23mil,1055mil) on Top Layer And Pad U9-7(493.82mil,1055mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-15(621.78mil,829.35mil) on Top Layer And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-14(596.19mil,829.35mil) on Top Layer And Pad U9-15(621.78mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.096mil < 10mil) Between Pad U9-13(570.59mil,829.35mil) on Top Layer And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.096mil]
Minimum Solder Mask Sliver Constraint: (7.649mil < 10mil) Between Via (600mil,770mil) from Top Layer to Bottom Layer And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [7.649mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-12(545mil,829.35mil) on Top Layer And Pad U9-13(570.59mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-11(519.41mil,829.35mil) on Top Layer And Pad U9-12(545mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-10(493.82mil,829.35mil) on Top Layer And Pad U9-11(519.41mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (4.086mil < 10mil) Between Pad U9-9(468.23mil,829.35mil) on Top Layer And Pad U9-10(493.82mil,829.35mil) on Top Layer [Top Solder] Mask Sliver [4.086mil]
Minimum Solder Mask Sliver Constraint: (9.83mil < 10mil) Between Pad U8-2(188.005mil,1414.307mil) on Top Layer And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Solder] Mask Sliver [9.83mil]
Minimum Solder Mask Sliver Constraint: (9.84mil < 10mil) Between Pad U8-2(188.005mil,1414.307mil) on Top Layer And Pad U8-3(150.605mil,1414.307mil) on Top Layer [Top Solder] Mask Sliver [9.84mil]
Minimum Solder Mask Sliver Constraint: (9.691mil < 10mil) Between Via (825mil,1959mil) from Top Layer to Bottom Layer And Pad U7-1(900mil,1993.55mil) on Top Layer [Top Solder] Mask Sliver [9.691mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-27(1377.574mil,3387mil) on Top Layer And Pad U4-28(1357.89mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-26(1397.26mil,3387mil) on Top Layer And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (6.973mil < 10mil) Between Via (1349mil,3416mil) from Top Layer to Bottom Layer And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Solder] Mask Sliver [6.973mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-25(1416.944mil,3387mil) on Top Layer And Pad U4-26(1397.26mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-24(1436.63mil,3387mil) on Top Layer And Pad U4-25(1416.944mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-23(1456.314mil,3387mil) on Top Layer And Pad U4-24(1436.63mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-22(1476mil,3387mil) on Top Layer And Pad U4-23(1456.314mil,3387mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-20(1515mil,3328.424mil) on Top Layer And Pad U4-21(1515mil,3348.11mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-19(1515mil,3308.74mil) on Top Layer And Pad U4-20(1515mil,3328.424mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-18(1515mil,3289.054mil) on Top Layer And Pad U4-19(1515mil,3308.74mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-17(1515mil,3269.37mil) on Top Layer And Pad U4-18(1515mil,3289.054mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-16(1515mil,3249.684mil) on Top Layer And Pad U4-17(1515mil,3269.37mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-15(1515mil,3230mil) on Top Layer And Pad U4-16(1515mil,3249.684mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-13(1455.424mil,3191mil) on Top Layer And Pad U4-14(1475.11mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-12(1435.74mil,3191mil) on Top Layer And Pad U4-13(1455.424mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-11(1416.054mil,3191mil) on Top Layer And Pad U4-12(1435.74mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-10(1396.37mil,3191mil) on Top Layer And Pad U4-11(1416.054mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-9(1376.684mil,3191mil) on Top Layer And Pad U4-10(1396.37mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-8(1357mil,3191mil) on Top Layer And Pad U4-9(1376.684mil,3191mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-6(1318mil,3249.574mil) on Top Layer And Pad U4-7(1318mil,3229.89mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-5(1318mil,3269.26mil) on Top Layer And Pad U4-6(1318mil,3249.574mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-4(1318mil,3288.944mil) on Top Layer And Pad U4-5(1318mil,3269.26mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-3(1318mil,3308.63mil) on Top Layer And Pad U4-4(1318mil,3288.944mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (3.81mil < 10mil) Between Pad U4-2(1318mil,3328.314mil) on Top Layer And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Solder] Mask Sliver [3.81mil]
Minimum Solder Mask Sliver Constraint: (8.976mil < 10mil) Between Via (1270mil,3314mil) from Top Layer to Bottom Layer And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Solder] Mask Sliver [8.976mil]
Minimum Solder Mask Sliver Constraint: (3.812mil < 10mil) Between Pad U4-1(1318mil,3348mil) on Top Layer And Pad U4-2(1318mil,3328.314mil) on Top Layer [Top Solder] Mask Sliver [3.812mil]
Minimum Solder Mask Sliver Constraint: (6.36mil < 10mil) Between Via (1982mil,1703mil) from Top Layer to Bottom Layer And Pad U3-32(2043.63mil,1692.36mil) on Top Layer [Top Solder] Mask Sliver [6.36mil]
Minimum Solder Mask Sliver Constraint: (5.836mil < 10mil) Between Via (1982mil,1703mil) from Top Layer to Bottom Layer And Pad U3-31(2043.63mil,1712.05mil) on Top Layer [Top Solder] Mask Sliver [5.836mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R61-1(1130mil,1368.001mil) on Top Layer And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R63-1(1240mil,1368.001mil) on Top Layer And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R61-2(1130mil,1302.001mil) on Top Layer And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R63-2(1240mil,1302.001mil) on Top Layer And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R62-1(1295mil,1368.001mil) on Top Layer And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R62-2(1295mil,1302.001mil) on Top Layer And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R59-1(1075mil,1368.001mil) on Top Layer And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R59-2(1075mil,1302.001mil) on Top Layer And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R58-1(1193.39mil,635.826mil) on Top Layer And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C57-2(1083.39mil,635.824mil) on Top Layer And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R58-2(1193.39mil,569.826mil) on Top Layer And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C57-1(1083.39mil,569.824mil) on Top Layer And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C55-1(1248.39mil,635.826mil) on Top Layer And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C55-2(1248.39mil,569.826mil) on Top Layer And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (5.115mil < 10mil) Between Via (877mil,1023mil) from Top Layer to Bottom Layer And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Solder] Mask Sliver [5.115mil]
Minimum Solder Mask Sliver Constraint: (9mil < 10mil) Between Pad R55-1(3293mil,854mil) on Top Layer And Pad R57-1(3236mil,855mil) on Top Layer [Top Solder] Mask Sliver [9mil]
Minimum Solder Mask Sliver Constraint: (9mil < 10mil) Between Pad R55-2(3293mil,788mil) on Top Layer And Pad R57-2(3236mil,789mil) on Top Layer [Top Solder] Mask Sliver [9mil]
Minimum Solder Mask Sliver Constraint: (9.178mil < 10mil) Between Via (877mil,1023mil) from Top Layer to Bottom Layer And Pad R48-1(840mil,978.001mil) on Top Layer [Top Solder] Mask Sliver [9.178mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R38-1(475mil,1368.001mil) on Top Layer And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R40-1(585mil,1368.001mil) on Top Layer And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R38-2(475mil,1302.001mil) on Top Layer And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R40-2(585mil,1302.001mil) on Top Layer And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R39-1(640mil,1368.001mil) on Top Layer And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R39-2(640mil,1302.001mil) on Top Layer And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R36-1(420mil,1368.001mil) on Top Layer And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R36-2(420mil,1302.001mil) on Top Layer And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C48-2(428.39mil,635.824mil) on Top Layer And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R35-1(538.39mil,635.826mil) on Top Layer And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7.001mil < 10mil) Between Pad C48-1(428.39mil,569.824mil) on Top Layer And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7.001mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad R35-2(538.39mil,569.826mil) on Top Layer And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C46-1(593.39mil,635.826mil) on Top Layer And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (7mil < 10mil) Between Pad C46-2(593.39mil,569.826mil) on Top Layer And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Solder] Mask Sliver [7mil]
Minimum Solder Mask Sliver Constraint: (4.999mil < 10mil) Between Pad C38-2(154.001mil,1546mil) on Top Layer And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Solder] Mask Sliver [4.999mil]
Minimum Solder Mask Sliver Constraint: (4.999mil < 10mil) Between Pad C38-1(220.001mil,1546mil) on Top Layer And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Solder] Mask Sliver [4.999mil]
Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C31-1(438.956mil,2447.001mil) on Top Layer And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [2mil]
Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C31-2(372.956mil,2447.001mil) on Top Layer And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [2mil]
Minimum Solder Mask Sliver Constraint: (7.158mil < 10mil) Between Via (369mil,2352mil) from Top Layer to Bottom Layer And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Solder] Mask Sliver [7.158mil]
Minimum Solder Mask Sliver Constraint: (2.001mil < 10mil) Between Pad C31-2(372.956mil,2447.001mil) on Top Layer And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Solder] Mask Sliver [2.001mil]
Minimum Solder Mask Sliver Constraint: (2.001mil < 10mil) Between Pad C31-1(438.956mil,2447.001mil) on Top Layer And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Solder] Mask Sliver [2.001mil]
Minimum Solder Mask Sliver Constraint: (7.999mil < 10mil) Between Pad R15-2(1644mil,3196.001mil) on Top Layer And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Solder] Mask Sliver [7.999mil]
Minimum Solder Mask Sliver Constraint: (7.999mil < 10mil) Between Pad R15-1(1644mil,3262.001mil) on Top Layer And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Solder] Mask Sliver [7.999mil]
Minimum Solder Mask Sliver Constraint: (3.158mil < 10mil) Between Via (1642mil,3153mil) from Top Layer to Bottom Layer And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Solder] Mask Sliver [3.158mil]
Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C22-1(1221mil,3279mil) on Top Layer And Pad R13-1(1221mil,3329mil) on Top Layer [Top Solder] Mask Sliver [2mil]
Minimum Solder Mask Sliver Constraint: (9.158mil < 10mil) Between Via (1270mil,3314mil) from Top Layer to Bottom Layer And Pad R13-1(1221mil,3329mil) on Top Layer [Top Solder] Mask Sliver [9.158mil]
Minimum Solder Mask Sliver Constraint: (2mil < 10mil) Between Pad C22-2(1155mil,3279mil) on Top Layer And Pad R13-2(1155mil,3329mil) on Top Layer [Top Solder] Mask Sliver [2mil]
Minimum Solder Mask Sliver Constraint: (3mil < 10mil) Between Pad C9-1(1822.999mil,1731mil) on Top Layer And Pad R9-1(1821.999mil,1782mil) on Top Layer [Top Solder] Mask Sliver [3mil]
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Silk To Solder Mask (Clearance=10mil) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (5.934mil < 10mil) Between Arc (1326.93mil,1055mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.934mil]
Silk To Solder Mask Clearance Constraint: (5.934mil < 10mil) Between Arc (671.93mil,1055mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.934mil]
Silk To Solder Mask Clearance Constraint: (4.322mil < 10mil) Between Arc (225.804mil,1450.13mil) on Top Overlay And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.322mil]
Silk To Solder Mask Clearance Constraint: (5.662mil < 10mil) Between Arc (488.699mil,2732.345mil) on Top Overlay And Pad U5-1(488.699mil,2702.955mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.662mil]
Silk To Solder Mask Clearance Constraint: (6.18mil < 10mil) Between Arc (2441.653mil,2062.047mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.18mil]
Silk To Solder Mask Clearance Constraint: (5.898mil < 10mil) Between Arc (3994.11mil,3329.022mil) on Top Overlay And Pad U2-1(3965mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.898mil]
Silk To Solder Mask Clearance Constraint: (6.62mil < 10mil) Between Arc (5372.75mil,3386.216mil) on Top Overlay And Pad RLY1-1(5307mil,3387mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [6.62mil]
Silk To Solder Mask Clearance Constraint: (9.031mil < 10mil) Between Arc (1116mil,3486mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.031mil]
Silk To Solder Mask Clearance Constraint: (9.031mil < 10mil) Between Arc (1116mil,3486mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.031mil]
Silk To Solder Mask Clearance Constraint: (6.003mil < 10mil) Between Arc (4773.2mil,2866.11mil) on Top Overlay And Pad D8-1(4773.2mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.003mil]
Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (172mil,3555mil) on Top Overlay And Pad 8V-1(172mil,3555mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil]
Silk To Solder Mask Clearance Constraint: (7.097mil < 10mil) Between Arc (165.124mil,1858.948mil) on Top Overlay And Pad U6-1(212.845mil,1795.185mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.097mil]
Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (2155mil,3126mil) on Top Overlay And Pad V5V-1(2155mil,3126mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil]
Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (3193mil,2070mil) on Top Overlay And Pad 3V3-1(3193mil,2070mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil]
Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (1762mil,1079mil) on Top Overlay And Pad GND1-1(1762mil,1079mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil]
Silk To Solder Mask Clearance Constraint: (7.392mil < 10mil) Between Arc (119mil,660mil) on Top Overlay And Pad A3V3-1(119mil,660mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.392mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (5.413mil < 10mil) Between Track (5106.834mil,3566.897mil)(5217.166mil,3566.897mil) on Top Overlay And Pad D7-1(5162mil,3614.68mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.413mil]
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (5106.834mil,3424.668mil)(5122.642mil,3424.668mil) on Top Overlay And Pad D7-2(5162mil,3449.32mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil]
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (5201.358mil,3424.668mil)(5217.166mil,3424.668mil) on Top Overlay And Pad D7-2(5162mil,3449.32mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,837.192mil)(5111.969mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5266.031mil,837.192mil)(5266.031mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,893.686mil)(5266.031mil,893.686mil) on Top Overlay And Pad R54-2(5189mil,859.44mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,583.754mil)(5111.969mil,640.248mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5266.031mil,583.754mil)(5266.031mil,640.248mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (5111.969mil,583.754mil)(5266.031mil,583.754mil) on Top Overlay And Pad R54-1(5189mil,618mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2726mil,2855mil)(2726mil,2869mil) on Top Overlay And Pad R1-1(2740mil,2895mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2754mil,2855mil)(2754mil,2869mil) on Top Overlay And Pad R1-1(2740mil,2895mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2726mil,2855mil)(2726mil,2869mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2754mil,2855mil)(2754mil,2869mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (8.735mil < 10mil) Between Text "R1" (2652mil,2838mil) on Top Overlay And Pad R1-2(2740mil,2829mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.735mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3364mil,1490.999mil)(3364mil,1504.999mil) on Top Overlay And Pad R70-1(3350mil,1464.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3336mil,1490.999mil)(3336mil,1504.999mil) on Top Overlay And Pad R70-1(3350mil,1464.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3364mil,1490.999mil)(3364mil,1504.999mil) on Top Overlay And Pad R70-2(3350mil,1530.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3336mil,1490.999mil)(3336mil,1504.999mil) on Top Overlay And Pad R70-2(3350mil,1530.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3257.913mil,1669.591mil)(3298.528mil,1669.591mil) on Top Overlay And Pad Q6-3(3318mil,1680.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil]
Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3337.472mil,1669.591mil)(3378.087mil,1669.591mil) on Top Overlay And Pad Q6-3(3318mil,1680.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3378.087mil,1612.409mil)(3378.087mil,1669.591mil) on Top Overlay And Pad Q6-2(3355.4mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3300.071mil,1612.409mil)(3335.929mil,1612.409mil) on Top Overlay And Pad Q6-2(3355.4mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3257.913mil,1612.409mil)(3257.913mil,1669.591mil) on Top Overlay And Pad Q6-1(3280.6mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (2.692mil < 10mil) Between Track (3300.071mil,1612.409mil)(3335.929mil,1612.409mil) on Top Overlay And Pad Q6-1(3280.6mil,1601.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.692mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3292mil,1491.999mil)(3292mil,1505.999mil) on Top Overlay And Pad R69-1(3278mil,1465.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3264mil,1491.999mil)(3264mil,1505.999mil) on Top Overlay And Pad R69-1(3278mil,1465.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3292mil,1491.999mil)(3292mil,1505.999mil) on Top Overlay And Pad R69-2(3278mil,1531.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3264mil,1491.999mil)(3264mil,1505.999mil) on Top Overlay And Pad R69-2(3278mil,1531.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (802.157mil,3205.02mil)(825.26mil,3205.02mil) on Top Overlay And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil]
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Track (676.74mil,3205.02mil)(699.843mil,3205.02mil) on Top Overlay And Pad D6-2(751mil,3189.94mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (9.643mil < 10mil) Between Track (676.74mil,3057mil)(825.26mil,3057mil) on Top Overlay And Pad D6-1(751mil,3004.06mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.643mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1355mil,3056.001mil)(1355mil,3070.001mil) on Top Overlay And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1383mil,3056.001mil)(1383mil,3070.001mil) on Top Overlay And Pad R56-1(1369mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1355mil,3056.001mil)(1355mil,3070.001mil) on Top Overlay And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1383mil,3056.001mil)(1383mil,3070.001mil) on Top Overlay And Pad R56-2(1369mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1407mil,3056.001mil)(1407mil,3070.001mil) on Top Overlay And Pad R72-1(1421mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1435mil,3056.001mil)(1435mil,3070.001mil) on Top Overlay And Pad R72-1(1421mil,3096.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1407mil,3056.001mil)(1407mil,3070.001mil) on Top Overlay And Pad R72-2(1421mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1435mil,3056.001mil)(1435mil,3070.001mil) on Top Overlay And Pad R72-2(1421mil,3030.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1215mil)(200.001mil,1215mil) on Top Overlay And Pad C40-1(226.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1187mil)(200.001mil,1187mil) on Top Overlay And Pad C40-1(226.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1215mil)(200.001mil,1215mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (186.001mil,1187mil)(200.001mil,1187mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (8.363mil < 10mil) Between Text "C40" (30mil,1181mil) on Top Overlay And Pad C40-2(160.001mil,1201mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.363mil]
Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil]
Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil]
Silk To Solder Mask Clearance Constraint: (6.294mil < 10mil) Between Track (366.579mil,3325.74mil)(366.579mil,3474.26mil) on Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.294mil]
Silk To Solder Mask Clearance Constraint: (4.315mil < 10mil) Between Track (366.6mil,3399.7mil)(472.7mil,3399.7mil) on Top Overlay And Pad D5-1(316.98mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.315mil]
Silk To Solder Mask Clearance Constraint: (5.002mil < 10mil) Between Track (472.713mil,3325.74mil)(472.713mil,3474.26mil) on Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.002mil]
Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil]
Silk To Solder Mask Clearance Constraint: (3.74mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.74mil]
Silk To Solder Mask Clearance Constraint: (3.015mil < 10mil) Between Track (366.6mil,3399.7mil)(472.7mil,3399.7mil) on Top Overlay And Pad D5-2(521.02mil,3400mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.015mil]
Silk To Solder Mask Clearance Constraint: (2.437mil < 10mil) Between Track (2494.13mil,491.671mil)(2505.94mil,491.671mil) on Top Overlay And Pad V1-K(2463.618mil,491.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.437mil]
Silk To Solder Mask Clearance Constraint: (2.437mil < 10mil) Between Track (2518.862mil,491.671mil)(2527.594mil,491.671mil) on Top Overlay And Pad V1-A(2558.106mil,491.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.437mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2594.862mil,719.67mil)(2594.862mil,733.67mil) on Top Overlay And Pad R22-1(2580.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2566.862mil,719.67mil)(2566.862mil,733.67mil) on Top Overlay And Pad R22-1(2580.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2594.862mil,719.67mil)(2594.862mil,733.67mil) on Top Overlay And Pad R22-2(2580.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2566.862mil,719.67mil)(2566.862mil,733.67mil) on Top Overlay And Pad R22-2(2580.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2446.862mil,719.672mil)(2446.862mil,733.672mil) on Top Overlay And Pad R19-1(2460.862mil,759.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2474.862mil,719.672mil)(2474.862mil,733.672mil) on Top Overlay And Pad R19-1(2460.862mil,759.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2446.862mil,719.672mil)(2446.862mil,733.672mil) on Top Overlay And Pad R19-2(2460.862mil,693.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2474.862mil,719.672mil)(2474.862mil,733.672mil) on Top Overlay And Pad R19-2(2460.862mil,693.672mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2506.862mil,719.67mil)(2506.862mil,733.67mil) on Top Overlay And Pad R18-1(2520.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2534.862mil,719.67mil)(2534.862mil,733.67mil) on Top Overlay And Pad R18-1(2520.862mil,693.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2506.862mil,719.67mil)(2506.862mil,733.67mil) on Top Overlay And Pad R18-2(2520.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2534.862mil,719.67mil)(2534.862mil,733.67mil) on Top Overlay And Pad R18-2(2520.862mil,759.67mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2073.756mil,722.999mil)(2073.756mil,736.999mil) on Top Overlay And Pad R20-1(2059.756mil,696.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2045.756mil,722.999mil)(2045.756mil,736.999mil) on Top Overlay And Pad R20-1(2059.756mil,696.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2073.756mil,722.999mil)(2073.756mil,736.999mil) on Top Overlay And Pad R20-2(2059.756mil,762.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2045.756mil,722.999mil)(2045.756mil,736.999mil) on Top Overlay And Pad R20-2(2059.756mil,762.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (9mil < 10mil) Between Track (2575.862mil,551.671mil)(2581.862mil,557.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2581.862mil,557.671mil)(2581.862mil,560.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2581.862mil,560.671mil)(2588.862mil,567.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2588.862mil,567.671mil)(2591.862mil,567.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2579.862mil,637.671mil)(2591.862mil,625.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (2591.862mil,552.671mil)(2591.862mil,641.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (4mil < 10mil) Between Track (2599.862mil,553.671mil)(2599.862mil,641.671mil) on Top Overlay And Pad D1-2(2560.862mil,596.671mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4mil]
Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2475.905mil,2347.559mil)(2475.905mil,2382.992mil) on Top Overlay And Pad X2-2(2425.709mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil]
Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2475.905mil,2257.008mil)(2475.905mil,2292.441mil) on Top Overlay And Pad X2-2(2425.709mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil]
Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2214.095mil,2347.559mil)(2214.095mil,2382.992mil) on Top Overlay And Pad X2-1(2264.291mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil]
Silk To Solder Mask Clearance Constraint: (7.795mil < 10mil) Between Track (2214.095mil,2257.008mil)(2214.095mil,2292.441mil) on Top Overlay And Pad X2-1(2264.291mil,2320mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.795mil]
Silk To Solder Mask Clearance Constraint: (5.997mil < 10mil) Between Track (2664.866mil,2252.535mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.997mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2252.535mil)(2664.866mil,2252.535mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2337.465mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-2(2635.2mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (5.997mil < 10mil) Between Track (2505.134mil,2252.535mil)(2505.134mil,2337.465mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.997mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2252.535mil)(2664.866mil,2252.535mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (6mil < 10mil) Between Track (2505.134mil,2337.465mil)(2664.866mil,2337.465mil) on Top Overlay And Pad X1-1(2534.8mil,2295mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6mil]
Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (1314.225mil,872.43mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-1(1302.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-2(1276.78mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-3(1251.19mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-4(1225.59mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-5(1200mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-6(1174.41mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-7(1148.82mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (1111.375mil,872.43mil)(1111.375mil,1011.91mil) on Top Overlay And Pad U13-8(1123.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (1111.375mil,1011.91mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-8(1123.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (1314.225mil,872.43mil)(1314.225mil,1011.91mil) on Top Overlay And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-16(1302.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-15(1276.78mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-14(1251.19mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-13(1225.59mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-12(1200mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-11(1174.41mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-10(1148.82mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (1111.375mil,872.43mil)(1111.375mil,1011.91mil) on Top Overlay And Pad U13-9(1123.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (1111.375mil,872.43mil)(1314.225mil,872.43mil) on Top Overlay And Pad U13-9(1123.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (659.225mil,872.43mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-1(647.37mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-2(621.78mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-3(596.19mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-4(570.59mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-5(545mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-6(519.41mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-7(493.82mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (9.966mil < 10mil) Between Track (456.375mil,872.43mil)(456.375mil,1011.91mil) on Top Overlay And Pad U9-8(468.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.966mil]
Silk To Solder Mask Clearance Constraint: (5.947mil < 10mil) Between Track (456.375mil,1011.91mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-8(468.23mil,1055mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.947mil]
Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (659.225mil,872.43mil)(659.225mil,1011.91mil) on Top Overlay And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-16(647.37mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-15(621.78mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-14(596.19mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-13(570.59mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-12(545mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-11(519.41mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-10(493.82mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (9.958mil < 10mil) Between Track (456.375mil,872.43mil)(456.375mil,1011.91mil) on Top Overlay And Pad U9-9(468.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.958mil]
Silk To Solder Mask Clearance Constraint: (5.937mil < 10mil) Between Track (456.375mil,872.43mil)(659.225mil,872.43mil) on Top Overlay And Pad U9-9(468.23mil,829.35mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.937mil]
Silk To Solder Mask Clearance Constraint: (5.783mil < 10mil) Between Track (247.999mil,1343.5mil)(248.001mil,1398.499mil) on Top Overlay And Pad U8-5(225.405mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.783mil]
Silk To Solder Mask Clearance Constraint: (5.595mil < 10mil) Between Track (173.001mil,1335.999mil)(202.999mil,1335.999mil) on Top Overlay And Pad U8-5(225.405mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.595mil]
Silk To Solder Mask Clearance Constraint: (4.077mil < 10mil) Between Track (133.001mil,1354.368mil)(133.001mil,1387.627mil) on Top Overlay And Pad U8-4(150.595mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.077mil]
Silk To Solder Mask Clearance Constraint: (5.595mil < 10mil) Between Track (173.001mil,1335.999mil)(202.999mil,1335.999mil) on Top Overlay And Pad U8-4(150.595mil,1327.687mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.595mil]
Silk To Solder Mask Clearance Constraint: (5.795mil < 10mil) Between Track (247.999mil,1343.5mil)(248.001mil,1398.499mil) on Top Overlay And Pad U8-1(225.395mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.795mil]
Silk To Solder Mask Clearance Constraint: (4.082mil < 10mil) Between Track (133.001mil,1354.368mil)(133.001mil,1387.627mil) on Top Overlay And Pad U8-3(150.605mil,1414.307mil) on Top Layer [Top Overlay] to [Top Solder] clearance [4.082mil]
Silk To Solder Mask Clearance Constraint: (5.342mil < 10mil) Between Track (1190.26mil,1850.575mil)(1229.63mil,1850.575mil) on Top Overlay And Pad U7-4(1133.855mil,1903mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.342mil]
Silk To Solder Mask Clearance Constraint: (5.998mil < 10mil) Between Track (1078.794mil,1772.047mil)(1078.794mil,2033.953mil) on Top Overlay And Pad U7-4(1133.855mil,1903mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.998mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-28(1357.89mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-27(1377.574mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-26(1397.26mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-25(1416.944mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-24(1436.63mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-23(1456.314mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3387.254mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-22(1476mil,3387mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-21(1515mil,3348.11mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-20(1515mil,3328.424mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-19(1515mil,3308.74mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-18(1515mil,3289.054mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-17(1515mil,3269.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-16(1515mil,3249.684mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1514.898mil,3190.404mil)(1514.898mil,3387.254mil) on Top Overlay And Pad U4-15(1515mil,3230mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-14(1475.11mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-13(1455.424mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-12(1435.74mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-11(1416.054mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-10(1396.37mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-9(1376.684mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1514.898mil,3190.404mil) on Top Overlay And Pad U4-8(1357mil,3191mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-7(1318mil,3229.89mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-6(1318mil,3249.574mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-5(1318mil,3269.26mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-4(1318mil,3288.944mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-3(1318mil,3308.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-2(1318mil,3328.314mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Track (1318.046mil,3190.404mil)(1318.046mil,3387.254mil) on Top Overlay And Pad U4-1(1318mil,3348mil) on Top Layer [Top Overlay] to [Top Solder] clearance [0mil]
Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2466.849mil,2002.646mil)(2466.85mil,2002.646mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil]
Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2466.85mil,2002.646mil)(2466.85mil,2036.85mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil]
Silk To Solder Mask Clearance Constraint: (8.985mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.985mil]
Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.849mil,2002.646mil) on Top Overlay And Pad U3-64(2496.37mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2466.85mil,1643.15mil)(2466.85mil,1677.355mil) on Top Overlay And Pad U3-49(2496.37mil,1692.36mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,1643.15mil)(2466.85mil,1643.15mil) on Top Overlay And Pad U3-48(2417.64mil,1613.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2073.15mil,1643.15mil)(2107.354mil,1643.15mil) on Top Overlay And Pad U3-33(2122.36mil,1613.63mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2073.15mil,1643.15mil)(2073.15mil,1677.355mil) on Top Overlay And Pad U3-32(2043.63mil,1692.36mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (3.985mil < 10mil) Between Track (2073.15mil,2002.646mil)(2073.15mil,2036.85mil) on Top Overlay And Pad U3-17(2043.63mil,1987.64mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.985mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2073.15mil,2036.85mil)(2107.355mil,2036.85mil) on Top Overlay And Pad U3-16(2122.36mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (8.985mil < 10mil) Between Region (0 hole(s)) Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.985mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.85mil,2036.85mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (3.984mil < 10mil) Between Track (2432.645mil,2036.85mil)(2466.849mil,2002.646mil) on Top Overlay And Pad U3-1(2417.64mil,2066.37mil) on Top Layer [Top Overlay] to [Top Solder] clearance [3.984mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-1(3965mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-2(3915mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-3(3865mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-4(3815mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-5(3765mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-6(3715mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.907mil < 10mil) Between Track (3641.724mil,3279.899mil)(3988.276mil,3279.899mil) on Top Overlay And Pad U2-7(3665mil,3329.022mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.907mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-14(3965mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-13(3915mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-12(3865mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-11(3815mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-10(3765mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-9(3715mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (5.905mil < 10mil) Between Track (3641.724mil,3160.103mil)(3988.276mil,3160.103mil) on Top Overlay And Pad U2-8(3665mil,3110.982mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.905mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1171mil,1328.001mil)(1171mil,1342.001mil) on Top Overlay And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1199mil,1328.001mil)(1199mil,1342.001mil) on Top Overlay And Pad R66-1(1185mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1171mil,1328.001mil)(1171mil,1342.001mil) on Top Overlay And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1199mil,1328.001mil)(1199mil,1342.001mil) on Top Overlay And Pad R66-2(1185mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1226mil,1328.001mil)(1226mil,1342.001mil) on Top Overlay And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1254mil,1328.001mil)(1254mil,1342.001mil) on Top Overlay And Pad R63-1(1240mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1226mil,1328.001mil)(1226mil,1342.001mil) on Top Overlay And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1254mil,1328.001mil)(1254mil,1342.001mil) on Top Overlay And Pad R63-2(1240mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1281mil,1328.001mil)(1281mil,1342.001mil) on Top Overlay And Pad R62-1(1295mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1309mil,1328.001mil)(1309mil,1342.001mil) on Top Overlay And Pad R62-1(1295mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1281mil,1328.001mil)(1281mil,1342.001mil) on Top Overlay And Pad R62-2(1295mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1309mil,1328.001mil)(1309mil,1342.001mil) on Top Overlay And Pad R62-2(1295mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1116mil,1328.001mil)(1116mil,1342.001mil) on Top Overlay And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1144mil,1328.001mil)(1144mil,1342.001mil) on Top Overlay And Pad R61-1(1130mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1116mil,1328.001mil)(1116mil,1342.001mil) on Top Overlay And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1144mil,1328.001mil)(1144mil,1342.001mil) on Top Overlay And Pad R61-2(1130mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1124.39mil,595.826mil)(1124.39mil,609.826mil) on Top Overlay And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1152.39mil,595.826mil)(1152.39mil,609.826mil) on Top Overlay And Pad R60-1(1138.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1124.39mil,595.826mil)(1124.39mil,609.826mil) on Top Overlay And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1152.39mil,595.826mil)(1152.39mil,609.826mil) on Top Overlay And Pad R60-2(1138.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1061mil,1328.001mil)(1061mil,1342.001mil) on Top Overlay And Pad R59-1(1075mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1089mil,1328.001mil)(1089mil,1342.001mil) on Top Overlay And Pad R59-1(1075mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1061mil,1328.001mil)(1061mil,1342.001mil) on Top Overlay And Pad R59-2(1075mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1089mil,1328.001mil)(1089mil,1342.001mil) on Top Overlay And Pad R59-2(1075mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1179.39mil,595.826mil)(1179.39mil,609.826mil) on Top Overlay And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1207.39mil,595.826mil)(1207.39mil,609.826mil) on Top Overlay And Pad R58-1(1193.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1179.39mil,595.826mil)(1179.39mil,609.826mil) on Top Overlay And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1207.39mil,595.826mil)(1207.39mil,609.826mil) on Top Overlay And Pad R58-2(1193.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1770mil)(3359.001mil,1770mil) on Top Overlay And Pad R67-1(3385.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1742mil)(3359.001mil,1742mil) on Top Overlay And Pad R67-1(3385.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1770mil)(3359.001mil,1770mil) on Top Overlay And Pad R67-2(3319.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3345.001mil,1742mil)(3359.001mil,1742mil) on Top Overlay And Pad R67-2(3319.001mil,1756mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,966.824mil)(948.39mil,966.824mil) on Top Overlay And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,994.824mil)(948.39mil,994.824mil) on Top Overlay And Pad R52-1(908.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,966.824mil)(948.39mil,966.824mil) on Top Overlay And Pad R52-2(974.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (934.39mil,994.824mil)(948.39mil,994.824mil) on Top Overlay And Pad R52-2(974.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,896.825mil)(950.389mil,896.825mil) on Top Overlay And Pad R51-1(910.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,924.825mil)(950.389mil,924.825mil) on Top Overlay And Pad R51-1(910.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,896.825mil)(950.389mil,896.825mil) on Top Overlay And Pad R51-2(976.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (936.389mil,924.825mil)(950.389mil,924.825mil) on Top Overlay And Pad R51-2(976.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3222mil,815mil)(3222mil,829mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3250mil,815mil)(3250mil,829mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R57" (3256mil,889mil) on Top Overlay And Pad R57-1(3236mil,855mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3222mil,815mil)(3222mil,829mil) on Top Overlay And Pad R57-2(3236mil,789mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3250mil,815mil)(3250mil,829mil) on Top Overlay And Pad R57-2(3236mil,789mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (826mil,938.001mil)(826mil,952.001mil) on Top Overlay And Pad R48-1(840mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (854mil,938.001mil)(854mil,952.001mil) on Top Overlay And Pad R48-1(840mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (826mil,938.001mil)(826mil,952.001mil) on Top Overlay And Pad R48-2(840mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (854mil,938.001mil)(854mil,952.001mil) on Top Overlay And Pad R48-2(840mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3279mil,814mil)(3279mil,828mil) on Top Overlay And Pad R55-1(3293mil,854mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3307mil,814mil)(3307mil,828mil) on Top Overlay And Pad R55-1(3293mil,854mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3279mil,814mil)(3279mil,828mil) on Top Overlay And Pad R55-2(3293mil,788mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3307mil,814mil)(3307mil,828mil) on Top Overlay And Pad R55-2(3293mil,788mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,578mil)(3294.001mil,578mil) on Top Overlay And Pad R53-1(3320.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,550mil)(3294.001mil,550mil) on Top Overlay And Pad R53-1(3320.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,578mil)(3294.001mil,578mil) on Top Overlay And Pad R53-2(3254.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (3280.001mil,550mil)(3294.001mil,550mil) on Top Overlay And Pad R53-2(3254.001mil,564mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3943mil,683mil)(3943mil,713mil) on Top Overlay And Pad R49-1(3968mil,752mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3993mil,683mil)(3993mil,713mil) on Top Overlay And Pad R49-1(3968mil,752mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3943mil,683mil)(3943mil,713mil) on Top Overlay And Pad R49-2(3968mil,644mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (3993mil,683mil)(3993mil,713mil) on Top Overlay And Pad R49-2(3968mil,644mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (516mil,1328.001mil)(516mil,1342.001mil) on Top Overlay And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (544mil,1328.001mil)(544mil,1342.001mil) on Top Overlay And Pad R41-1(530mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (516mil,1328.001mil)(516mil,1342.001mil) on Top Overlay And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (544mil,1328.001mil)(544mil,1342.001mil) on Top Overlay And Pad R41-2(530mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (571mil,1328.001mil)(571mil,1342.001mil) on Top Overlay And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (599mil,1328.001mil)(599mil,1342.001mil) on Top Overlay And Pad R40-1(585mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (571mil,1328.001mil)(571mil,1342.001mil) on Top Overlay And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (599mil,1328.001mil)(599mil,1342.001mil) on Top Overlay And Pad R40-2(585mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (626mil,1328.001mil)(626mil,1342.001mil) on Top Overlay And Pad R39-1(640mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (654mil,1328.001mil)(654mil,1342.001mil) on Top Overlay And Pad R39-1(640mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (626mil,1328.001mil)(626mil,1342.001mil) on Top Overlay And Pad R39-2(640mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (654mil,1328.001mil)(654mil,1342.001mil) on Top Overlay And Pad R39-2(640mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (461mil,1328.001mil)(461mil,1342.001mil) on Top Overlay And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (489mil,1328.001mil)(489mil,1342.001mil) on Top Overlay And Pad R38-1(475mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (461mil,1328.001mil)(461mil,1342.001mil) on Top Overlay And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (489mil,1328.001mil)(489mil,1342.001mil) on Top Overlay And Pad R38-2(475mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (469.39mil,595.826mil)(469.39mil,609.826mil) on Top Overlay And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (497.39mil,595.826mil)(497.39mil,609.826mil) on Top Overlay And Pad R37-1(483.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (469.39mil,595.826mil)(469.39mil,609.826mil) on Top Overlay And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (497.39mil,595.826mil)(497.39mil,609.826mil) on Top Overlay And Pad R37-2(483.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (406mil,1328.001mil)(406mil,1342.001mil) on Top Overlay And Pad R36-1(420mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (434mil,1328.001mil)(434mil,1342.001mil) on Top Overlay And Pad R36-1(420mil,1368.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (406mil,1328.001mil)(406mil,1342.001mil) on Top Overlay And Pad R36-2(420mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (434mil,1328.001mil)(434mil,1342.001mil) on Top Overlay And Pad R36-2(420mil,1302.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (524.39mil,595.826mil)(524.39mil,609.826mil) on Top Overlay And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (552.39mil,595.826mil)(552.39mil,609.826mil) on Top Overlay And Pad R35-1(538.39mil,635.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (524.39mil,595.826mil)(524.39mil,609.826mil) on Top Overlay And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (552.39mil,595.826mil)(552.39mil,609.826mil) on Top Overlay And Pad R35-2(538.39mil,569.826mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4913mil,3293.999mil)(4913mil,3307.999mil) on Top Overlay And Pad R34-1(4899mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4885mil,3293.999mil)(4885mil,3307.999mil) on Top Overlay And Pad R34-1(4899mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4913mil,3293.999mil)(4913mil,3307.999mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4885mil,3293.999mil)(4885mil,3307.999mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (7.295mil < 10mil) Between Text "R34" (4915mil,3366mil) on Top Overlay And Pad R34-2(4899mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [7.295mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4825mil,3293.999mil)(4825mil,3307.999mil) on Top Overlay And Pad R31-1(4839mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4853mil,3293.999mil)(4853mil,3307.999mil) on Top Overlay And Pad R31-1(4839mil,3267.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4825mil,3293.999mil)(4825mil,3307.999mil) on Top Overlay And Pad R31-2(4839mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (4853mil,3293.999mil)(4853mil,3307.999mil) on Top Overlay And Pad R31-2(4839mil,3333.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,966.824mil)(293.39mil,966.824mil) on Top Overlay And Pad R33-1(253.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,994.824mil)(293.39mil,994.824mil) on Top Overlay And Pad R33-1(253.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,966.824mil)(293.39mil,966.824mil) on Top Overlay And Pad R33-2(319.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (279.39mil,994.824mil)(293.39mil,994.824mil) on Top Overlay And Pad R33-2(319.39mil,980.824mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,896.825mil)(295.389mil,896.825mil) on Top Overlay And Pad R32-1(255.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,924.825mil)(295.389mil,924.825mil) on Top Overlay And Pad R32-1(255.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,896.825mil)(295.389mil,896.825mil) on Top Overlay And Pad R32-2(321.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (281.389mil,924.825mil)(295.389mil,924.825mil) on Top Overlay And Pad R32-2(321.389mil,910.825mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (171mil,938.001mil)(171mil,952.001mil) on Top Overlay And Pad R30-1(185mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (199mil,938.001mil)(199mil,952.001mil) on Top Overlay And Pad R30-1(185mil,978.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (171mil,938.001mil)(171mil,952.001mil) on Top Overlay And Pad R30-2(185mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (199mil,938.001mil)(199mil,952.001mil) on Top Overlay And Pad R30-2(185mil,912.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1507mil)(194.999mil,1507mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1479mil)(194.999mil,1479mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (6.648mil < 10mil) Between Text "R29" (25mil,1470mil) on Top Overlay And Pad R29-1(154.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [6.648mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1507mil)(194.999mil,1507mil) on Top Overlay And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (180.999mil,1479mil)(194.999mil,1479mil) on Top Overlay And Pad R29-2(220.999mil,1493mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2411.001mil)(412.956mil,2411.001mil) on Top Overlay And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2383.001mil)(412.956mil,2383.001mil) on Top Overlay And Pad R27-1(438.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2411.001mil)(412.956mil,2411.001mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.956mil,2383.001mil)(412.956mil,2383.001mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (8.604mil < 10mil) Between Text "R27" (241mil,2372mil) on Top Overlay And Pad R27-2(372.956mil,2397.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.604mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2483.001mil)(412.954mil,2483.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2511.001mil)(412.954mil,2511.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (8.648mil < 10mil) Between Text "R26" (240.955mil,2477.001mil) on Top Overlay And Pad R26-1(372.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [8.648mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2483.001mil)(412.954mil,2483.001mil) on Top Overlay And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (398.954mil,2511.001mil)(412.954mil,2511.001mil) on Top Overlay And Pad R26-2(438.954mil,2497.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1714mil,3222.999mil)(1714mil,3236.999mil) on Top Overlay And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1686mil,3222.999mil)(1686mil,3236.999mil) on Top Overlay And Pad R17-1(1700mil,3196.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1714mil,3222.999mil)(1714mil,3236.999mil) on Top Overlay And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1686mil,3222.999mil)(1686mil,3236.999mil) on Top Overlay And Pad R17-2(1700mil,3262.999mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1305mil,3530mil)(1305mil,3560mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1355mil,3530mil)(1355mil,3560mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Pad R16-2(1330mil,3491mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1305mil,3530mil)(1305mil,3560mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1355mil,3530mil)(1355mil,3560mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (9.294mil < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Pad R16-1(1330mil,3599mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.294mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1630mil,3222.001mil)(1630mil,3236.001mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1658mil,3222.001mil)(1658mil,3236.001mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (9.293mil < 10mil) Between Text "R15" (1658mil,3296mil) on Top Overlay And Pad R15-1(1644mil,3262.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [9.293mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1630mil,3222.001mil)(1630mil,3236.001mil) on Top Overlay And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1658mil,3222.001mil)(1658mil,3236.001mil) on Top Overlay And Pad R15-2(1644mil,3196.001mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1530mil,3529mil)(1530mil,3559mil) on Top Overlay And Pad R14-2(1505mil,3490mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1480mil,3529mil)(1480mil,3559mil) on Top Overlay And Pad R14-2(1505mil,3490mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1530mil,3529mil)(1530mil,3559mil) on Top Overlay And Pad R14-1(1505mil,3598mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Track (1480mil,3529mil)(1480mil,3559mil) on Top Overlay And Pad R14-1(1505mil,3598mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.5mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3315mil)(1195mil,3315mil) on Top Overlay And Pad R13-1(1221mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3343mil)(1195mil,3343mil) on Top Overlay And Pad R13-1(1221mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3315mil)(1195mil,3315mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1181mil,3343mil)(1195mil,3343mil) on Top Overlay And Pad R13-2(1155mil,3329mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2354mil)(2004.999mil,2354mil) on Top Overlay And Pad R11-1(1964.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2382mil)(2004.999mil,2382mil) on Top Overlay And Pad R11-1(1964.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2354mil)(2004.999mil,2354mil) on Top Overlay And Pad R11-2(2030.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1990.999mil,2382mil)(2004.999mil,2382mil) on Top Overlay And Pad R11-2(2030.999mil,2368mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1939mil)(2622.001mil,1939mil) on Top Overlay And Pad R10-1(2648.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1911mil)(2622.001mil,1911mil) on Top Overlay And Pad R10-1(2648.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1939mil)(2622.001mil,1939mil) on Top Overlay And Pad R10-2(2582.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (2608.001mil,1911mil)(2622.001mil,1911mil) on Top Overlay And Pad R10-2(2582.001mil,1925mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
Silk To Solder Mask Clearance Constraint: (2mil < 10mil) Between Track (1847.999mil,1768mil)(1861.999mil,1768mil) on Top Overlay And Pad R9-1(1821.999mil,1782mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2mil]
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Silk to Silk (Clearance=10mil) (All),(All)
Silk To Silk Clearance Constraint: (9.828mil < 10mil) Between Text "U5" (412mil,2751mil) on Top Overlay And Arc (488.699mil,2732.345mil) on Top Overlay Silk Text to Silk Clearance [9.828mil]
Silk To Silk Clearance Constraint: (6.351mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.351mil]
Silk To Silk Clearance Constraint: (6.933mil < 10mil) Between Text "U4" (1235mil,3375mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.933mil]
Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "+" (1076mil,3406mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (1.202mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [1.202mil]
Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "+" (1076mil,3406mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (1.202mil < 10mil) Between Text "R13" (1020mil,3314mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [1.202mil]
Silk To Silk Clearance Constraint: (6.933mil < 10mil) Between Text "U4" (1235mil,3375mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [6.933mil]
Silk To Silk Clearance Constraint: (Collision < 10mil) Between Text "R16" (1283mil,3499mil) on Top Overlay And Arc (1116mil,3486mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (6.239mil < 10mil) Between Text "3V3" (3109mil,2129mil) on Top Overlay And Arc (3193mil,2070mil) on Top Overlay Silk Text to Silk Clearance [6.239mil]
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+ diff --git a/TEMP.SchDoc b/TEMP.SchDoc new file mode 100644 index 0000000..9ea3deb Binary files /dev/null and b/TEMP.SchDoc differ diff --git a/__Previews/COMM.SchDocPreview b/__Previews/COMM.SchDocPreview new file mode 100644 index 0000000..29da78a --- /dev/null +++ b/__Previews/COMM.SchDocPreview @@ -0,0 +1,14 @@ +[Preview] +LargeImageOriginalSize=660000 +LargeImageWidth=500 +LargeImageHeight=330 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4FA9AA9FDB6CF0C16C6B20DF6B67AE4D348C7DF3DBDBC1F303D9DB6B492C0FF990E168EAA3A4DD8B3E10CF2DF17EB61C94EAE7693C8F65FA56DDFB32D5215FF64763DEB72907F7257AEE7C7FFD7C5CD39F10CDAE9FAB3E05FD2FB0CB74CD16D790CC7FC773D9676F386BBE19B71FEEDEF3E7FE5C0CE0F943FAC3D58C93899D07E73257D9C0F0659D89523C2F9D4F6603CFB9DDFE27BFA77E9ECEF350A66FD3CD55DD52EAE6BA9E49D96C4B24AC90CF7FE66720947A0BA647E8E726DB86BCEF26DD9C06E9E660BA3A4E3AB23F5C2A9B5BA8D10B9E9F9FE7B23E07A5A9E3C5F8E740E7A5AE139BE2E962F2E24D631436BF0FE1B9716CCECD31FBDB785E5637AFB5D4D7CFFDE4FBC4A897E721C76DFBCCE98F627C06973E97E9677726DD3CA23F6B2C9F8CE9BBD39D0DEC7377E103787E7A9EE7A99D99C0736AA84319C073461D7EA119F4F3F4FDE6ECDFB6E9C5AA7E2E7572F5FD54739AE5C921545B3FD7AF94A88B7EA14CB1BF1B74F440FDFCE5FE99EAEB24F5F1A96D726E9C9F5AF9F2AF62B642987EA2F9F42D7D982DD6AD619E1385E79C32F01C3C2FC2F3A07835FD99493867D16F4AE916BAF67EF676EAF2B5B17CDF99A7AAE8FDCCBB5FDBDCB99C1F5FFAB5A7C73BEFA99FEB3AF985DDA675E2EFEEFEB78DE7AE7F54A96B4B0DF350A6F92923CF57E7AFFBA0C6DADE4FCE731E1017D430CFE53AE7087FE73C85E0F903F0DC559BCBB1A80CB7DBC32B3E6BDC9C533E86E72E5F435B3D93BC64DAA6978BF3BD7D5CC6D850B9AE9BAFC9AD9B75CB123A7AB9F873CB95EB7572BAB892176AD6CFC3E3CF4D6D7A5E2FAEDBA296BC6D5C6C1D0FFAE6CA1F8CE7BE67B0961FF1C667D56EADAA14634E107F5E9AE7D7C2FF6C3C17F643AB7D30533E9963E6878BF8BD71BD6E8BBDD2B7E6BA43A15BF63560A6BFE5BA6E51B73CC49F3DC46FA705FD5CD7D3BB514FE7AACD3D293F9C616E88AF7DA0C5FE83F473A36E1E9383E091EBA517D6D3C173F03C4A3FAF500FC4A29F4B1D7A651F74E57E00CF8D633299E37CE8C3DF4EDD7DDAE2ED65CCDE3EF9DBFD2D51E8E5B21D7303CF43DB468C3FDCF41BAEDC6856DD3CE43D78DE16D3DD7D1E780E9EE7E4B9CF166ED59F363D2757628A579B8FE3F83C57AF631E5FC2B679AEC61DC8EBC6A47ECFBA32F731434FABF6F96B9E370327C37BF0BC75A6BB72C3AAF35E721D63CB75EA77E67C3A973CD7C223E079E0F55CBC6F443FD774AC553D96ECFDAD99E7C95C6F95E7B45EAEEF3D5933F886AD796ED3DF4DFA79FF5D5E376786AD2F0BF1E797E74C68AD6386BDFD987ABA3BBF9D9E2BD61F775BC786099E07B25CE5096F93E756A6D96A226D79C61CCF816E37D8A75E6AF8F7DBD4ED32F5878EBE51EAE7765F31E2F513EF7DC56B5F3F8B8FF4BF8FB9DD7CED42F5F95FB753F01C4CF7DBDBF37D073CDF85E7AA6E7E349EABDFDDCA72A99F737F7D6E17D7D3E3D536F60FD6F8F393F583AE76ACB41DB34DC73F17BDD7FCB97BACED9FC75CE47BBDCB07F6D6B75136E6D1CB5FCB143CCFC674F01C3CCFAD9FF3B678BEA90F8C6E576E7BBBBC0EAACEA7E63EA14A0DC16679DE8C7F6D799EDBBEA3CE99F86D2031D78A673F476E387EBFED66C80922F2C27F10310C748E4BE3EC3F107EBB89569BA96706CF8FC8F41672B71A6D14983F3FAF7F7B28E772C5644AA63BF7513A9FCCC6674399EF9A74539E69BCD4B2ADD2A29F9B74D7201F086F9C75619EDBF61C7C2FCD3E1324FB9980E7C7D7D58F7489C0F3D3F1DC5763B5A87E5E90CF599E636E9F337DB0BEA28FB7BFCD3E3D51F1F6113C17E9D659EF2BCF4B77668B3CDBD31D66775DFBFEFB42EFFEF72746FEF2FC37832EDEDD56BA975B2F4FE16F833C3F6A3BAF3D9F9E9A9F66C7797FF0FC643C2FD57EB2E55D4AB72555E1F9032D535CF5A89F46C5DB1B789E9A27294BBE25C798F642E92443FDE0616CD1897577D68B6D7B0F39460BD8185AE1F975BA2EE6FA32D76334DA9AAC4CC8A919672302CF8FC8F3A936C618ABD8D12137A7A803D1B1023C2FD68EAE27B07905F0FC8CF6770FCFA3E3F38CFDEA9C83469DABD6DF2F6BE610A2E7B309FB9EB62EB09F17B55DA8622B58FB93C6323AB6C6CA9EFAF9703DBFFFFEFB49AE39ED6D67657A6C7F00FDFCB43CEFFDC1BA65BE6D59CF292EAF7600CF4BB69D45FBBC96F9AD0AED5F32CCEADFF24073749B786EE4D08E3C4F3C6619433FE7D549D1BB436B9FEFCCF3F1D955794EF68C51381AD3637574F0FC94FA3953F4F39EE563BE818E65D4CF4BB7EF05C7AFE59E990A6CB7FA7B3DA0AF4DBE7ABA0DF03C218FF194E397BA6A066E617A233C1FEDEC82E1DFFEFC0BF9EE2E84BCCD3A3AE6D3C3F473CC9F63FEBC46BC5A691D5DF76DAF51D7B0A40DC0F67B0F626BCF7C510FCAF3D9DECE588E7C323C60DD7E3C973AF967BF7A239FFDE69BA59E7ED4F65EA3D66AAC7FD28EFD08787E029E9BF28015B2D09252F36DA9B178A5C7E4588EC3F3A4163DEC8326E77FE51BFEDE473FFFFC376F936E7E68FDBC36D363E6CF77EA47C0F3BA3C9FF2AB7485785E74A9C4F35AF62A6F8D2C2CB136E723F27C7BAE905466D7E5B95804BF5FBF22D3DCF9F07A027B548DF9C6D49A1FE0F9A9F57316ED0B17387F5E9C4915F5F35AB1285832B1FC983CB7E6DCE15BE2D21AAD7F6EF3873BCBB350D3EEDEA87D0F3CAFCF73E9F35E3DDF6BCB3CDFEBD93F143B23DB98E28729ECC9C2EF4BD88598125FC194BA8E4973409AAE2BC2B907BE5E9CF1E6FAAB2F16DDB57D769B5052FB3800CF4776AFE3CF4FF03C97603AF2C980E72DE76F07CF1BA8C318BED0556D9074A68B7C074C99EB914C9FE228BB0CED5363D290BB451CC750F7CC574FB713F5DAC4B1F5B5D779FF37EB5EC9BA7638CFD30FFBF2DC9F8EE78F643A7ACCDCB0E0F9469E27F6B55B7521F0FCDCCFF9548B3494619EFDA863032AF2AFF6CCEC7AE65236D70FDD6E4350F94CC618B0E5BE6D5C6723CF3B36BCDAAF41423E63573C43965C84E93C17E7BB1CB7141EB7BAD69D8581673B1FF01C3C07CFDD7D7BA3CFF9C03117BFB6B5259AECC311D346FDECD599CED865B4195CC6F981652EB7689E57BDCF769ECFBCD6193E8C75D6E759B0CD878C7D1A7E36C074F01C3C07CF8FC5739D0997EC36595D67AFC33637CFE5F66CD4EB859D7E937E5ED5CFD8A6778B798377F7D76EF119536C17C2E780B2D772CFB92D7EBAA51851301D3C07CFC1F32DCF78733AF9CC2FC9DA212EDAC68C789DBC1BFDE3C8E81F27F39CF6FABAB2CEE9AF395D3FCBDF8404D55E51F3EEAAE745C7F396730247D5CF87F97F711EEF7AFD7CA193339DE785F47353DE459FCE7E36EE3D10D3C1F3883E9710471E29F01CCB369D5CD545D73A7A4ABD71FB9841CE9BF7BFA9E8EAC3ABB4F73BFA7A4FEEACC1D75DCDA13A7CF7655C2F44F0BCFF5C1BB3487F383BCF9BEC4957EF273BC3787DC5F930C9703AB33DB7ED2549573FBFE2FA104C07CFC317E1DF33EB2DE039967CBAF9D0AF7385B96A5F6F63FC8E360D67BE8021266A99137DD6DB850D4030BCE7395DFBC7B3851FDDC562A368AD4F5E1FE33046E3A35F4037E8EBB7F57DCDCE73D75C79A8FDE28CCC7B00A683E7D0CFC1F3FD38AEFBBE490650FACEC07CBE7F5F686281A17F94FAB9DE86A7FCAACC17EFC6C9D3D3C5628736C788CA3985451D43A5AE215565B417F4C7C8957903B2651E4ED3CF55FF3ED605D8592AF8B7BBDE3F824DFAE4E7099EC7F1DC954BA3E43FF0FC8C3C270B5D5CB7B7AB73E94B1DB5A1BED0A2E349FD5C9F775FE74B37EBE73D6BC5F9736D8EDEF3DC0ED7AA53C64964BAB6C3FA6EF603E4A39FC2EA1CB6E67157EEE1386FA0FBB717E739967330DD1753A909789EF2DC3EEA73079EE767BA6E6327062EAC63B89BEB7302C6B7AE71EFE27CE539735D774EB587051EFBA6BEDD3C7F2EFDE1AAEBE758C239D9FA71423F07CFC1F3E675F3414F5DDBD255FB3BCB96EBA5F90E7669B7607CAD2F27F7BF91FEF0496C35F1FC02FD1C4C07CFC173F0FC81F8E5EAD7F7B1B3C7C5C1C91838994376AB7F8888EB5AF6B539E2C83D3E62AB7E3D07CFC9E4C33EDBFEC173301D3C07CFC1F3F3B17CDD9F4FB14D3D17BB1DC7182D8D7748EF132FE6BEDBBD16F678B5414F877E7E08A61FDC470E3C07CFC1F3BDF4DF755FDEE756677BCD97F35A9D4E1DC9F57B1B793EE4A307CFC174F01C3C07CFCFCFF3EDB962B62E3D7B3AFB38C25517AD8CFD905BD78B7C6A51BFC563FCE42CF9F01278BE8E3707CFC174F01C3C07CFCFCB737DAE7C1FDF3759ABB416CFFDB199DC79FD82E23B77E6B99FD9E039980E9E83E7E0F91979BE67BB629579BE3D7F923B4F7D3FD7DEE78BE9C638F3754E99A7FBB93E7F7123CF4FBF23EF9F6FE4FDED77534D7875DBFEFB44FA3588FCB81D780EA683E7E039788EA5419EAFB9D8EBB84AFE9781E7F3FA554E9950FFF3209EA71DF3C4743AF39C2A396964AE382962797A7A777F7F234FF7ED9E9E2F539E9BC5765CB5A15CA09F83E9E039780E9E63698EE7228CCA146F266DD6A27E4AC7E65CEB57FAE6CEDDCEB7F378FBF74DC73708637E7BFB2AE60EF67630FD204C07CFC173F0FCB1F573A98732BAE6B9AC9F32AFF7F0DCC2F4A1F641779757D275AF53AD96C9B63D7294513DDFB9653F3237BB6E1F1F75EB855D9C2F75772FCF29788EE5984C07CFC173F0FCB1796ED25D757BFB82F3367E73771EB7652D56BEB06D2F5EC950CBD536973FE7C6E52BFBF8CCED8B513F873F1C9633331D3C07CFC173F05CD74B55FD5CFD6CE13BBE651E9DD86CE0F1F676734E3A029E6329C374F01C3C07CFB134CBF33D7EDF6603E719BECFDDFA55919C32E039980E9E83E7CB255B5C10780E9E072C367F38D50FBD9FD71EE7A78DB1DDAE1ADBA63ED1A607E7F687E3A9BCCC532F153C07D7C173F01C3C07CFAB32DDE00FA71E13A3B3EF99B4BF5BEBA037C8F3E998C97A3EC1BF5FF01C0B71DB7BC0F3C7E0B9696ED1D30EC073F07CAFE331C7722DE7A8F3F17C3BC7865AB37C656F10FEEFC2877EC82773212FEC8DDC14DB8378FDC0BE21CF5FFC8E3C895C32F7EDDFBFBF91A7E7DF19F2CE7401B964C073301D3C7F189EBB6C929ABE22F376E836CF349D013C07CFC38F67310FADB53DA33F9CEDD5C7F38A2238FC42DF16FEEFE255AC93B964C4364F54FAD4EB79672ECAF8E102FD1C4B5DA647B677F0BC12CF4D3AFBF8F7A0530CFA519FB743E81174A8CBD4DD3ECD7D0B937A943D96A72ACF6DD7F00475071F89E7F61CEA96CF7C7D18DF526B34423F2761F5E1A54D61158F6739167FCE19F01C4B25A6A3FE799BF676CFBD11739484724D8FB84CBFB95CDF807E6E6BBFC1F14AE0793BFA39E9C788F460755A87BAE2FE63D663EE7C3CF7E79C317F4F8CBF595F173586D9603A980E9E1FD6DE6EB5C11B6269A7CFF5F9CD1D79EE6BBB363B2C96A679BEEFEFA7F29CEC3806191695E1C3F1BC06DC53301D4C07CFCFECDF2E6D99625ECF66F37CA157875E51593F77B5B583D7103E0ECFB7F887FBF6C12BB426B38D3FE5BBDE7DA4F8EB05B45F95E1A22E3BEBBAC07B0A8683E9E0F9E1781EECE3EEEA4F1BF287EB8FD9C17397AF009687E5F93A7F7B67C8DF7ED775C57A4BFEF6C977FDBE8F17FACD2A77FB0B7933FAA1978C571336FFEED64DFA795F9F35692EBD355B0D9626980E7FB8B6ECEDAEF71ACF45BF74FBB8B6B737E50F2779EEF38502C7C1739DC78BFCEDC490837DFC9CD8F3B7CB6D048FF5DCED7DAD18B2F6439735E2BA9BB22D7DB38C17E6F10109F0B51B62E6A45FFCFC3E8DE160FAE9985EFDA7C1F3F23C5F335AF4198BBA4F63DE0E91A38BB4EC0FA7F23C84E9E03A78EEF9ED14BF90189F75B5469C881FF1C9B2B64B00CF479D5C7D9FCE70301D4C07CFDBB4B77B7CE00CF6F6550CB0B1D663033CB7E9E001B533B1E4E7799A4FB6B60F76CEF9F392FEED9DB0EF8F73E6EAFBF06B1FCA713C47E03A78BE1FCFB9DFDEAEBC8F89016E86E74E9B04786EECFF7B7F68E8E7465B4EEA77776C677D9C9FF46F57DE87F13B8EE97D4CEB8EBEFC5836F2BC421B05CFF3F35CCEF17963D41CF3E7741C0F34974F26A47D1EA85E70F5FE7F8AB102CFB7EAE7B23EFBB2567B20FF7DFD6F30CF671BBBFA3E5C278FD7D38779FA0E0F13980E9E57E17940ED296DFD61E6CFD57C325892782E6B990D6332CC9FA7FC5E9CCF7AA21D20625B354F9D3F675D5C0EFBB55E8E670F4C07CFEBF09CFBEFA1239F4C484D8CFD1685E71E5DAB9D3982B616594364B8978FAB9FAB398EBB405F7275113EEBEAF7FBDA6F069F752BCF7DCF7F60BF3BE4D59BE7CFFDFAB9FD5E2FB9EDD6CBFB310385ED1D4C07CFCBF19CDBFB045F1EF7889A182DF23CA87E2596D1077A889DDAAE9F1FDD5631E7380EF13BF7F9A3CB78B5A0FE3484FBB1F964C4FBEE13D952677DA84DDB59F5724AC9145F0FA683E9E0F90E3CF7D463B1E9B736DD173C3FEED2F57D3E576CB2B6BCDF097D436E29DFB925DB9D269F7516686FAF722E29E332DEE7A459D9D315A62FE7CAE1F70EA683E7BBF03CA72EC38862A3CDDCCF83E715793EF8B7CF79C76D79BF03EF73C93EA716CFE9069ED388F9F3A2BE9CDBE64DFADA322AB7358633AAAE03D3C174F0BC24CFE57C6059BF731E364FCDD3B8E09FFF76F39C8EF3FFEB1C5BE86FE671D965D0CF3BBEE8ABBBA8B8650373B7F40D2EBFCDA3F48BB9C62AC9D760EBBC89F473BDCC7A793FC6835E0EA683E7B579DE8D7ECBA578DE8F17BACBC44D3D7F251D39DACF21F2C8E398627D641E6D9B7E1DA69FDBBF8F858DFAB9908EBD1B74F55E37BBA4F37C6B5FE0CD455CA94FCB71DCA10C0F8D5DABC67385E9A28DD058BD1CCFD8E1990E9E3F947E4EA9C946A9309DF2291637B64DA9F13FCBFC584B9EDBE7F2616F0FBF8F837E2EEB77AB3ED2D5796EE35C0D9EE73CEE18BDBB599E0F6D83D14B845E0EA683E9E079099ED7CAC16163E6567BBB77BFC6DF06CF63964E32BC1B383EE9E78FCEF31AF9E142FDDBABCF9FEB361CBE1EFF2DE6D7C174301D3CCFCB730BF7B49CEB52445CCD429F0DC905EB60BA33C6DBC3E715673DF3E7EA2FCB1823713E467FFE9C3AD8791F5ECD1F6E23CF63FA88D07EA316CF53C70FBBF9E497E7F9D446C67A6D691CC7737768A627B665F03C9DE7DDA467A97AECB05FD52FAC671F35E8CFB6F874CE837EDFC7E7189E07E9FDAA4DDE1463049E47F29C4C3C675D669E6FB527D7D4CF4FD1464AE8C86BBFF775CC39980EA683E75B794EC77966C16C3AEAAC0B9E6BB93216FAFB265DC5ED77B6FC0D339FF57C1C627BF56FB38FBAC6730A9E6FEBFB97F9E166DF880C3CCF71CD8FE20FD74C9D8052366FD99F9044BF387E28913132B26F656CA763E186F7467B508179C60DED1A3CDF666F5FD75FD672BA311B6B1D7A8AE3D882FCD612F4F3D9BF9A2FC622CBBC5B5747BD54CC9FA7F29C5192D7DEFE083C6F6EEC58720E3B2EDFFBD19F3739C730BCEEA8279BD81A3947149A236C953B41FBBDD5B696E302CFB7F17C95CFC25AB3DC616F4F6827617DDD30DEB8B1C19FFA76338D79637E0F3C2FC7F39DF2C9941C13C4FC36F4F38D4CCFA397EBFA31DDA41F9FC4EE6DD3B53C6DAE37A9287606AAEAF8623D19EA69D2A97EF2A5FF8EC817D9E78336D8029631C9D0CF8BFBC311BB6E9CCB1F2E86E7BD2F351D62D53B9681E7F06FCFCEF34EE4FEEB1E94E7A79943AFE163CEABFCEE523FBE643EDE03F1DCA6ABEBEF9DD752AF8D7959F401D37CADF4C7BAF7D34FCF9AAD5F114ADD7910C1F3B4BED8EE0B1EEA2B9EB6C4C5ABC5F9B7BBF6ABE7AF614C698F86FC368CC99AA0725B2C369E27F77F47E77944BF089ED7657AD9E33D987ECE036A663ACE3FAC66E69C574A9DFBA406A683E7E7E1798A3FDC6443336CDFB71D6E67B664F2CB7F9235C196E3CDE7E7F53E19F2C381E70F794F6B318C07F711A9B6F6D9069CC3D6CE1FBA5DAC6A665AE66375BD4DFE7BA1D7E0D84CF03C9DA731F1E7AA5FB9D59E13A4AFD8DA8287E7D4CF735BCE39F1F7D39399D9669F3CD8DC77E5794CDB06CF0FC873528C99B3ADBD6BF2F8CEDD6E126D06E079D5F873CAB47C32267F38D37AC312578F254F3E19938D3F8EE3A8CBD22CCF4BEAFEE0F92199FE38C7577E49F66F0F613A78DE46FCB9AF1FDE3AA718C0E7B47A6C5762ABC7E2FB1D793DC0F40A3C0FBDA77BE79301CF0B3133CCB62E748DDEBF7A7C36D9D85FF5F36E1F67BB9E888B2134D5DE7E50A687F82B87F8C3B179AE33C4BF7D2BD3C1F374FDDC1C8FA6D9BA43E2D54CEF037FDFEDDF16DE765D7E7661F5D53C8BE823445FD15972CB81E7DB796E8BC90E997B4BA95782A5019EB77D4D86DA321723D7877CB65DA387CEEDB6D4287D4B9FE75CF601665FB96199E6667D4C578E053CDFC6F398F9F3E07835CBB189FA1DB67AA9720C28631307BB41E76C77430DD6CEE90F27DB22ED7FFB2D99E772ECCFC6DADFF4A175F5CC3CDF1AF7956B3FE0F98E3C8FF77B9B625715DD7C9A27EC86752CC9374E7FEE3B03DF0FA09F9BE643A3638BD3FCE1A2793E1E0B789EF6DCECE1DF2EC6B3539D7283EFDA0B7D1B9E15CE83FB15E90F37BCB7D5607D1B632836E8E7B26D0B1B53A7DBEFC0F3CD3CCF6157CCB54FF0BCF9A355FDDEA8C863C206CEF6CFB992972D2D065DE736EF73A40CF96AE79CF4C3F8E1A2E4B13D88BD3D625E3475FE5CAE937E57C6FC7006AE83E7C7E179F2D832448296AD3C2704BEEFE03978FE38B6765537EFC70854B1BDD3AEDD6B65EB1B937C9CE2FB38D58622983ED7D130E40D07CF8BD8DB4DF694A2DC0A6A535CABE5B065C9C173301DF676F0FC51AEC9A0E75F26FBDF501BF8F5C1AE174FFA8E5E47C3386FABB1003C4F67911EAFA6F6D3EAF86A5DA78C64D29763DA86ACF9D102CF09785ECB1F6E8F7D81E7B81C3AD3471B3EB5FA71E39AD9FA473D6F88ABAE17789E769D4DF16AEB3A1BA6F11571FB21DBF4EE84DCC14B125FD3E67216BF75CDACC381E7BBE787DB63DFE0F9C35D9BBE4601FBB4D02F109F1ED65F0BBF28D457AB5F2F75DD4FCFB9649CF164B6980853DF1AE95F39D4EAF9B4F25957632127DFB7F15C5E98EE57A7723D27D3C1F3CD3C2F2958C0F34C4BAFDB904E99FB137DCE2B989E7D180E9E6F6190B506B9F6F9CC74E2AFDD13CA701EE8BF3ED9BDF41CAEEBCF7A9ED337FBB843653A78BE2BCF73F85C7A730D6101CF8B5C23B2F09503D3C1F326FDE1883B7FBB53B73271DDC4F024FDC995BFC057A76DEEFD27C9A2C381E7211C58E4FD0F6A8BB9DA3316F03CFF751AF2C85CC829F2C881E788578BBF49D978EECA6D60E479519B2C781EC38135D7C173F0FC98D78AD1D9E79D2C6A8283E9D6BE3EC0870A3C2FA09F9F7651F4F3AC5C03CF53FAAF99EFE0F93E4FC37AAC8E798B1CE321F0DC5AA7CBF40A9EE7E1393FA080E78DF45BDB792E632205D38D319191F7C0147789455E6B916FB9BB5FE7D7D1BFB4231FE8DB90BF78CA9D7AEBEB0ADFDE8FF952A7CF2E7D0E36F13DE11386C5D7DE79D2F3706A9EBBFE06CFF3F1FC687ACD26A683E7F9FAAF0CFEEDD618D5C47D50F0DCC9F431F7A9F431957503E918B3FAD4E74A99AFE5FC99B4275F701193C7BAD0CF43FA71F01C3C07CFEBB27C990F3B0FCF616FAFBF089EAFC7515BC7578FACA383E7DBBB77F01C3C07CFEBB15CD6BD01CF0FA927297FF73CA7EE38D5558CEA869C50E03916F01C3C07CF5BD2CB79407F069E37C77343DE87287F38E4EA01CFC173F01C3C3F495F25F5F28B83DFE079D33C0F9DCF0CC91795E57904CFB180E7E039785EABA79A7DA872B31C4B559E1B7475533D6AA77E1ECA78F0BCCF532DE203E043089E83E7E0F99ECB2BA3A4EBBABE6ACF3C5F7E09D6E3B134AA9F6BCFD09C3F6A3D7FBE5A8F3CF9513C1FEA4182E7E039780E9E67BA26AE6BE5D0DBBA7B5F74611DF98B71BEDCD6876139CA2262D185FEF8F1F6A721EEBC1BDAEFED8B77A4BB29758F3A19D77F01976279CEC073F01C3C07CF37E85F3646DB7C932DF3A9EF9F2EE4FDFBFF30E66791792D87FACF60F949987EBF9FD2BF7D59DF68F66F97EB87FB8E2584E7D2CECEE83BD8DBC173F01C3C4FBB1EAE5C8A3E8E6BDBFEFA69B0B173A52FA235EB3DFBC622BA7D014BE2D37035D43772D53DC2E2E3B9C8EB3E8F8371EDC073F01C3C4FBC1EAE9AB536666AEBFE72E7F6EBBD4FBA74B7E98CECF3E7BCEC79F9724482E7997954E9DE9EECFA0D3AF92B817F3B785E9BE7D7C47F357485F2C7F500FAB98BF33E9BFC28AF54F8C3B1DE1FCE7D5EBCEC39D9F471F86281E70D2CD2B6DEF5B6F50E3C07CF1BADAFB687CE5EE3B81E80E7BEB9729FAD830B7D83DEF5F32EE09C2AE9E7367F6AF01C3CDF93E7549D2B877E0E9E83E7E07926EEE9EF6D9FBB783EF9B70F7AF9A09FEFC4732C65C644BE7B386EC74DED27A61D3EC02263D2E61A37E039780E9E9738AE3A73088DCD9FBBF47357FFBEEAEF39B9D09033427FD534CB03D6F190B1A18FE92E1F8E132F3237435F4F96C1DE0E9E83E7E58EABC639B5C2738B703ED51817EF659CF1F41D6EFE8E983FBF3006FDFC1179EE59EFD4CB4DE3C933EBE7EC32EBE7469EE31901CFC1739B4836F57CA2E93C9F18B7D9DE36E7DCD8E7B9E5D1BE6E21D2E79351FCDBC1F38333DD616FF7F23C44DF7E64FD9C8D316AC6F9733C27E0793D9E0B0D4CE86C747CED5949143DAE12CFD97D6CDBD1F118BA99D91D1BEA30DFD475CAB189F59489E768CC7972DFCFEDD6DDB7FB34E4C360F3F7FA7C5723C7656D67D68FA9D3F33D88FD11BA17CF79989E14DBCFDA74B471F9EB7FF87BF45347E2B9675E3BD8DE1EFA3B0FC473317F2EFDE1ECFA399E15F0BC12CF155DF7A6B1B426CF3BC1F36EE6751F03A2E4A194E30D75DDBC7E6672D7B35CE47378ED79DE757CB487F141971EC70892C14CDAC912AF65FFFBB73D786EFFAD256FF3FFCAB9797E7D38E1A6F39EFCE1AEE3B371851884D1B7513F7FBBF7433F8CCF83FC4CBC7FD3BEC3B30B25737EDEFE6FC68BFC8E7A6E45DB23789EC4733ADE7BF9DA31857F95EDEDA2F607D5DAA2AA9F9B18DFE771E8963C8F9F572061FA87D5DEA63F3F7BF07CFE7DC15AB58E7570AD8D08A24B9E9FAF7ED4391863F7FD8CCBEBC009B1EE87387EC3F7D9B9787E1D9F813BD7E975C5BC5E87A0DF6CFB1DD3784A5B277E83D2B7F1FD5BC173E6E039E6CF773A2E656C4075BB781E9EB39D794EFBB98A61EC23382B8EE5DA3FCF732ECFF9F8C834FFA01FB3DDEF9F2BB41BFEC931C35C3F0A2C6F45E85D643D155567FB92BDF56D5CD45F513F136368751D55753CBEFE6CF8CEDB7D2CF736D76D519F81D1D6AE8EC5C57327793E8C05CFC5F4E11ADC5FD93716DE0D9F9314AE4B6EABAFD37CC65EE7CCC1F303F0FCD6F96C35FBF0DC6F3FDA323ED8CE73D6EDAF9FABD748D5CFA92537F7D3B35A6F83CC7539C6B909DAB37F997F5A8E89FA71033D8B0FB3DE9F1C6282D11347C69D6D42CFCD2ED7E9CF19B76CEFFA1DF53366F8FDB32D724C2B6C5574E10F97495FE1F6F7932F102D695FAF9F1B123CCFC44DAB1FDC31791E157F7E749E530BCFA999E7FA7AB36DDE3D6EE8BACB78DD2E9BAF23581EC172FD3ADB78AEB709AEB09B1A784ED72C317F66FF9D797C616E93675BFAFC7037F519E065EEB7651C37E4B1E9F66C90E079A33C9773D487E6F98618AD2DC74CE97E3CB78D5342D6B9E7DADDE38621859CD29781E5F5786E637B741FCBB5AD6DB10D88BF0A1D5B17B7C3548F1FA89BF3193CCFC3CD87CEF79AAA9FB306FCE142F2997BF4BA98F973F98FA93C3F548CD241595E98E7BDED58F16F3C2CCF7D7176D9DBE923E48EA9C774F01C3CCFC673575E96A0633EA67E6EE7837DDC2062FD163C3FA46E7EB46ED552334F596840CCC1C0EE61BE97F7F1219430B17EB41D8B7C42623DA3D4322FCCDBBF3EBEE77A379EDBFA0AF37C46D8F7B9A35F0AF9ED76980E9E83E759F5F328BB567D9ECF3EEDDD183F3FFB128BF9FC17FA46DEFFEDFFB9BF7ED3CF9F3C8F717EB70F3FCC7ECD8B9C3A97FBD5789BE74B2D3C5FEBE7979DED80B9597EB5EB79ADF1CA716CCBF95C0BCFFBED469EDF069ED3295EE1CE73F1C9ADEBEBF2741FFF2F59FA45868F19869C6917E2F2D99171B27DAC6C37FACB4B5FCDF1B5F7D5B5C6A828CF1E77CCBF15BBA7A93CE799D691A0EDF45897324CBF8C39EDBB0D4D1C3C07CF0BF2BC31FD5CF8D23EBF177DDBBBB1DF5CC61ABDF47EED03A3A9D237F6F3DD842FD6C979707BACBAFB5C8FE5E71EA2975FA7FB3DD92FA6D8A0632C92C9CE6D2899F29971C606FD5CE1795F8B675CAFB705A1BB771FC5DF5D16060CFDFFE0D7357060CCF528D6093EF47116B27ED9C5FD3BE0B99DE70BDFDDF465C8937329A6A383E725B879D62591E70DE9E7EBB86F736C908C3F37F9B7ABEB451FFAE1AED3CB5C426CD4F3FB1CBCB74F53BFADC7AE4FC77188FA1B8136F691DDDF7FFFFD246465B3687B7961DF0CF69671F9D0E72EE38B755F3C0DDBA93CFF30E64611DB897A3C62FD174F94BC8C79CF64BB32ED4FB637536C5C5DDF76472D039B4DFE41789EB39F1A7488CE7A7E628C26EC7E24414F07CF37F09C1F90E79B9E470FCF0F307F2EBADF655EB63CF16A6AFCB9D48FD471B86E0798FCE19ACFDB7D8DE2B964B8FA7A3D14D3EDFDB8299E41CE9FEBDB89F5BE1C83A1B908AB33BDFAF50EB44510628C6F5DC60A4B3BDCDA3EBECCC5ADDB647CB6F5DCFDD4D80718999DFE1BE039789E553FDF64EBA8DF87948D5723563B40C7B479D426791EC7F2EBC8EFDFFFFC13F9EC37DFDCDFFF34EBE967E5B9B883D4C0F3084E9BB653F3C6D58F3FDF33F7B27BB1C5F2EB31AFEA9C986BDD729FAEED4AF453F9F3CD80E7E079C8B2CE35790E9EBB3EFB7732F847F1D1276975A7458DF3BBE8FD311FEDADCB335BEAF5725DBBAD2582E58A6EFEDD5D5EBFBA90CF05CF7F3C00CF79B8EDD5C8F3699E5CE3B9A15DC4F25CD62A8AE2F9961C12A5E5C0F6764ACCBA7D6B4C07CFC173F0DCBC4D37FABFCF3EC6DB96C1B7DE5C1732C7D98B7BB4BD3E5C24C757ED60D0D1BFFB51993FDF6C172AF82C68BC99EBFD8DB657B2E6EA07E15B71E38BF198BE1DD7B69B386DD89F696E47D43FA65D24CF63AE71AEFB11E3FFC143EAA0C6C4C484ACF37D97046DF734DAE1FD7EAE1BE3D98C63A0703F06F01C3C0F61EDC089BCF9DBDBE6B91E5BB4FDF83AC52F3AA75D330FC737B27CFA3E99ECEED3DC79ABFEED06DD519F37A506BBF70B9D73FB73CB765CDB4E8D69D0F767E2396B86E73C6C3FD978EEF8CD26ED0C63CC60CEBACFB6BA0201D71A3C07CFC1731BCF2F635F7AD16CA3C4307F9EF2FBDBF28CE4E3783E96DBFBBF2B39C2B2F28D32F0F78381E7CCC0F30F069E330BCF57B18CCAFC4C12CF5BB4B307D9DC735AACCAF5A1D2DF8E8EF5277B7F3C9A5147375E2FBF8F31780E9E83E7263A2DB93DF39BAFDEC7FB2C71C3EBFA5AD872D1E5E5780E969F6731F19C697AF207B691E75D00CF53FCE18AC495F17CFD0D8F9D2B6ED7E742C4AFCC7367B61A7A1BAE17B7E403201C3C07CF93782EDAE88D0DFD8FE0C732DEA302CF7DF927893B07ABFDB3309EF7AE4E2B66A7F39C29F6F6659E3ABECA53F774EF2FFEEE8B3FCCB13363ADD5BC1C07CB4D6D72CAF3A3B096D2357FC53A6ED98E5BBEABC63C9A782ED7319AE07F558BE7D7802695744C07613AF7D4C98BB0AF39796EBB7EB0B783E791CF3925335BC4DC50759EFB62DA17DC1D742836DABF7A7BD8EDD39CCB6D71DC8EB9F0C2BEBCBA3FDC908373381E3D3E5D6CFB77CFFF5890E3269E27B6275BDD0EEEC839D6E8C2BA39C75AFF375BE79851D7CDFAF9857CE8E6EDB8EDBBDA76FAD8536D2B57FAD6E71FCEC57335CFCF32E78F793CEBFA5C1EEACA57E2BA758C7100A6737FBC6B90BE6D62BA2B7707F7CFA183E7E0B9B9AF0DC88397A95EAA777CE098871BF2B3CE3C1C72562F73C5E8F1A43CF03995FB48D2CF0DD7C4EE0F67AA6D1B1AD7BE33CB73BCAFA87B17AB17BC4BAC57199E5FB51C7F2EA67BB74BBAE78D339D73BF0D31509F5E319D7BF2E9AFB65B0A78BE91E74794C8F364ACD4B825723EDEA19FDB6256A8E1B3109EAFFB116E1C8B7BC7E5CE7EC99F77AE1CCF33B23C64BB1D757291B35FB7D7CCEDFA1279CFC23E89395BDA1F6347BAEEF57E4CAFFDEB174F1D797AFE7A189BF2615EE6D69FC3EB68D329C773B9FEF54BA2C529ACB713ABE576C6A6943C86E341E33119173EF998533ECD55B0B1560D53D77519F27473EE1F23BAEAAFBB98EEEAA703FA70F03CC718FF8CF9DB159E5313170BF2DC65A7D2FE5EC7FA2C6D0CABCFA2799ED8F744C4DAC6E4A86B82E5B6F373F55F556A695B7869B0D7C8F703E73B859B7ADD121E78E7F92659D6FE99F9D31F2B5F1EB3D35EA6BCFFECFEFAEBDFDCE5CAC9E7F7D7DFFFF1CFE4F50FAF7DBE9FEF7EFCA9976F7FFE85FCC7FFF1893CBFFF447EFDE5D7E4BFFEE60765BBAEDFF6FB71DBEEDA91CF7E751F4FFC6A88F7E87307FDD3857CFEF52BF9F5D7F77DFEFC67F7B836FA7EF3E0FB2BEBD1F42954D9587F865EC63A4A73FE65F9F7A65118E7CAFCD93C9E907E2ECE39C3203D3DBD063D78DE08CF37E9D2B56C9315796EEA0BD438612A6B46C5F7115CB32DEAFD612C3B977360EB7DCDBFE1E83F7C76E96C6DE15A87E7217D79F5F66DB735E9DC0C6DE3B611E2D633EBB1432F69B610877E2E74E9D72F2F5EFDBCDFEECE6AB9AD4D3F17DB7D766739B95AB6DB3CC7B2673E79FF756674F6555DE5884DE9D37DF17E1CFEED87E1B9855DED2C193810C373E7789C2CFC90B73CB36A6D4FE97B16EA7FA66FA7EE4BBE1FE6CCEDC7504F3FBFE6BB87213C0FDD3E5B57ECEB3F3DBCCECA1B9EF7BC32F15CB7A30BD16B7DC9F9F381FDC43A7F5ED6DEDE30D30DF6F6653C6FFAC2FA38389EECFF0A9E83E74DF2DC56A7CDD057C7C4AB75D4CD737BACB7F95E87F03CC60E2C79F3FEE51379A1DFCC36D7DE17C057C3BA02C75B5E78808D27717C61EE5F43F2F5F232E795C0733B435CF53B2DE7727534B5EC3C37D9D5B5DAEE9A6D9D1A7C0C865C02AFCE67A8E769D7B9EF9BC1BF5DB48FADE36EDBB85EB6BD90F13D78DE20CF9B5D2AF13C20EE7CF02152FC9CD41A877CB69DEA9F89EF7051DC6C11EF6BB7B7AF7DD27CF77BBD2FE1A743E9EC9F4399D9EECB98A50EEB34770A966FE359807F7B00CF451CDA324E41D93BA384DF6E84D3A1568FA89BDA7B6D315ABE6FD838573DD8BC3AFF337B0D687205785ECD9EEEDB2E24EE2C1B5B5C7AC510DFA3CEE183E78DF0FC10CB4E3C9FD62DB92EF9A6EBB64F4FEFAC7AAFE94975E9D43D5309B7F8BDF0285D5FEA0D94EA7E39A5FCDB1F88E52E9BFBB84CF97AD863C6AB15D1D30B1F53B3F7A700CF653F43951C82F36764B2C3CFB5DDC7F81E65FE1E3C07CFBDCFCDE279DC89E7CE798875ECB6BA7FB5FFD675F650FD9C4DB1EDEB3958C9FAC5FE78787BD856571D2C0FED2BA9EA334EE7987FB57D98EC98D29E6A5AEFFA5BEAF1A65C34BACDD76443BD26D5B74B6727A5B39E9E8DE98DEBE7BDD9C4687FE7C67B9936DF156323E1D63AEDAAEF9D2E53FE61F01C3C773D87C6B169619EC78CC595E7609517C0A2F7FE659A87BB04E9E76AACAB296E8F4DF37797A8F9F3AC7A10581ED65F327D2C36CCC712C59741F755947E12CB7B69DE6E59B7E5CD99FBDDF5DDCD71D11BD899554FCFCEF3F45AE7DD22FEDC7C1E623E6E19A34ED2EF47E2B9D973C19BE7E4C43F9147B0CF330C9E83E7313CCFC68894EBC6B33D3531F6F6555C93E3B8A3796E1DA76C895D04CB5DFA8FEBDEADEAB18C761795E7CB36B16ECF6EFB4AFA7635D9998DE9598F8938ED705E9E5317CF65DDF9FD796ECF05EFCF130F9E83E75E9E67B7B747F825D918E7DA1F77E5E2B5EB464B7B3BF7FAB6DB9810656F37C6786D893907CBED57C69DD3AF9F8BEC0CF552BB25CF9775D3CEC9F338A61F433F5FE6C532F39CEDCA73129F4B163C6F87E7BBE5728D3CAEAC3C9FF35F45D762B1D53991B91E89EE4332CF6DAFC7E53C493F77D68DCDA59FDBAE03585E9CF7B67E5CE739BB1D80E787A97F5E87E7A6796946973C9FF35A98C775E039789E742F736E9BB1C74BE585C8A3D9E75256C6BE5DE7C80B67CC7F6C6ACF736E4C420DF9DB1DFE25A1F16AEA3F35CED4EEC3A4C5AB8DE30DAAE5905EC4D7AD72D5BAF477B0BC26CFE5184EDEEB8FCABCB86E975FCE9F5F1506B8EB9F776CA93BF663D16E03CF2BCF63D43B3ECBB85DF70737D8E5195BEBE74CD7CF45AE58D377C56FDCFCF5C78BDA2D0338039E3F18CF77ACEF72933CF7D50AB6CEDDDBF455CDCF49B3B7DBFD4BE2756A5F5C8A313F9C12373EE7BA50725E845C53E775BE82E785F5739DE7AB782265CC38F19CA87A3C5F7141E5F97ACCB9DEDFA3F35CE8D273EE345BDEBFF97E18F573A6AF33E8E72CECBBB916994B638ABF50622E9E851EC4DE4D7936D4CFC5D843C44EA8BA0578FE803C4FFEDE16FD3C223776404E383D4793F4EF34E9D62FD49E53293E7F3B0F6B1F41F9DB3D36F7A07113589E93E78CADEDACCCA977DBB9FFB29867E72B2E14B5B79F90E7D2166EE279E8FCF9DA3F42D3CFC598A18B997BCFC4F4B116855E77478F8F55D7BF7FE6E4E3ED4F0BCE83E735791E504F3C8AAF09C2B7D4084CE5C6606F36DBC41D7C53C6AF4CCDC795A54689EBDA6CE9BB6CD739A2EE8CE53A80E5E5791EA277BF2C6AFA79F4788DE75D499E97B2BF35E2DFD3FBB777DB78BEB2B74F359D667F38A3BDBD30CFD563A68E7835BAC8A57199DA8E6C8FE0793A07A6392F9B4D3895E721752D22791E9FB774FDBBBE7DACFB9D616EFBE3C7B0DF301ED1785D656637EF1970EEFD7C355F2DF7AF7D579EAFE9D5B46EF53B01737FC67B6EF5EF07C76BE89A6A3BFE688821177DFE873E27CC3A4EC2E44F21FA5A9DDDC29E646A1BFA76D743DCDF4A756FFBFF2E9B72B1E9B9726ECFEBE337E5D379BE6FF7F485D8EE5D9377401E3378BE4DAF9B6C38A6782A435C953177A88DE72E7D8DAFF39389E3B0D583ACC7F3F8FD7BD9AB3038C83AA2307ACD58736C372FA0DBACCF3AC06FC0AB9F83E545FBC59EDD9715434C5CF1E5D337E514AB9367EC9C3C974B2ACF87F875D3B5E7DE6DE6D8F7B6EF1B789E6813D1FDACB887CBCA77ADB9436DDFE336DD9D4F792C7B1F09BACC656963AD9DFF6E9E0B3BE38D0DFE3CD3B8A4D3E717F3B15C7F1FCA739BAEAE8EB956FC768C4F42F573D33EA2781E601106CBCB2E2CA0CFEE7A9BECD998FC183C1F9EF5D90F95E9F516A7FEE062992F00CF4F6B6FEFF81C8365CAE965F9AECC53B2D2A5A3E7A2964259B8EE6CDEB6A47E9EC6721BCF65EDE618A6EB3C37DADF0BF09C67E13958DE0A9B8679DC4FB8543BF13C7511E3B005AB893A7F3E6EC388337E3EADC661359883E71BF47327CF0D634A3DDFD8CADF3BD1DEEECE45BAB7BD3D4E2FF789F80DC9F205D33B519FB25BD6A814758C757B3AE176BDDDC062392FAEBF9AD695E33958BEB59FF3E73631FB8298DAF4E0070FFDFC683C0F6E0B963893E6EDEDE0F936FD1CFE7086DFF0CB167F36C1EF6F7FFEE92EBF906FFFF84BFF3A3156653A1B6A4E8B3AD4CBB96CF33CBCDD566EB6F5DBB6B1F3FCBA1A99A40996A43EDCD59F8FF7AE63DADCD138C7A4FBBB5C852F1B05CB8FC4F3C946CFD775D39C399C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67F9C1BD82CE6CC35FAFB349CB6BF07F7562E04F66FFC37674CC2E9FAF7E0D16A1B8E991B3C6F0D6B93D97169F2FDD5D884CCF7E99F7CCEEC0D4CDFBAB6737AF84EDF3B5663503B5EF62ACE83F5220D861FE77D96C7311602EB92863505F53E7358878CD53231281D6E6E8365A27F5C1BF2E653364C1E03CF7D0AB8FFBA638FC381D626CC1E68C7E25D35728A4AB7E37ACC0C395E5E0FF36899749EC1ED7ABD0D757A6FCC69DD957C15CBA3B763747D1778B712E7BB84F33EDACB318F3CD695428CF35A63D9FEEF2C66AF4EE9FBD426CBD784BEF9D8CC8A729EA63E3BF7EC09F324485D222E369D37666B9BD938EF1A4FFC7AF314D3C75B6F8133FF2E7D56CA9B34B1D6157D77E7DD6258D3F5FF4EE9467609EBC388F3AA01227FCC1EC6791FE9B8659D12AD2DF665D72B9135262C734CD4901913F52634F68380EEB94C37CE62AF5D8C43F1E0EEA7AE06351E1C7AEF5A43E2DC85FEC69189F9C902962B1FEFE1CC6D825395F51373CC972AAED2F45D3B85BD5DC0FA30E29C7E4EE1FF17EA648BB41B05E7182B393585BCFA29E61F39315113BC79BBF771188FEB17DF41C69CE0BAA5E431C478DFEA492A13DCF3A1C04FE8D3CEF3B96E43CB6DC304C6BF2F6EC3146D06F1C046BF5AD2294E4FE0DC1E6338E77C7A17F2B94AC355F961A77C117702EB4398BF3D3FDFBED3CB68E01CE936E29CD700E7E3BDD638057DCD93A88C435DCC09E7DBE9DC8275A75E8EF9F7E5A9A712C158B67C8EF5209AEEC5EE713E6C4B0F3EB299381F59F9BCC4790A0823B92179EEB495BEEAE8B1BE7CB3B54DF9F5ED4CDC56EE5961E3D63CEBE7D0319224DF9089577E1FF4B96DCCA0AE6F636FE03CAF1EBE5B5EACA4E77B00E7D1BCC7BDD401E7799AC2BF4D8DC3EDC81F8663CC3CEFA5FB031311BF43D473947D29EF5AA7F47CE130950D84BE7D4FE07C87E4F512E7A38E7322625ABBE7D5DD16DAD0C783ED20DF53079C47F3466C413CDF8B7AFC9489F5F23007FD3C8BB1467DDE4D661B1A1F6FC1A1032D26EBB31C5BE7E931AC39654F69DE1560E8E3D58614EB25CE471FE7BD8C73ACC7E2CC8B1C762E61783C7CF22A34CF5ECEAED7C7C6633CFFB5EE1BCA5C873EAB39CCF5FA3ED4301F1E9D9F6EBA69113EF6D1718673CCA7639CF585EE61ECC6C2F980B15EE2FCC6C639AFED14E2FC5E83DBCE9AE472C89FC762226B94D62E2C9C80891AAF373641315AB3A8DCECEC0FAE8BE7D4667C76CE01CCFB6660CD8BFDC1B7E5B93FD49A14B1787CEDBBEE719C0F10EB25CE6F6C9C735D1EB76B712FD53551737132E93F96187B6A9E633D3D57EB91858F9E219F7B3738CE55AC97384F2CB964CA12E789056B06345BA2F680EB32DC629C6853D6514FE8C4153D5C01BE3D1A7710CE2BCAE0864EFAF61B06E7522EEA235D1F299CABB93523FE4C84E76975D57C836E89F39CD70968B290B92D5BC179A2F6904273623AF67833CE62E3C7EDF31B50F9F0FF52B9FC08DC2672397FF1CE7370FB812FC2D1D5138CFF9F5A4419603F3DA74E19F9CA8D8DF36E79F8BDE027A3C6F2283108FBE9F8F8E4CA75567704EB574FCDFA2C7F69F73A6881735D7CEB1EC339D2D4534E9BBEF18A7873E10BE3AE25E3F8539F43BFD8E85F6B277DF3827A774AED25DB4EF7590E6357E2EFED42FF7D6C471CEB7BC14F26254F13DA6DB0B637E633C476BFED75C8919203E7F17C323DE6EDD91D9CE7C91F48149ED92D3C4734336A9FDE6B34E198D94ED652D3C9FA29F1E7ADD609166313C6A4A5617C8FE2BC28D6F71ACE153F22CC1937790BF7B9348E72BF6BD3EC919EEB70BE13B18B7DC5799EBA5C9D64ECE412EADB3784BE7D136AD6FE40DF8E2EB80B8D9370A2F63E3B7EC2FED7082F2E6B52348D23C1F96935EFDCDBF6B378799BC5C7A8FC830EE764EF63FD46E1DBA56F085DAF7CE0B31CE036DA6C16FCA036A0B4CDF644CF598EB8D1C779341F4772A9625ECD79991B9C147E06CE6F93945EE439A1E2B145B22605C6B5A2FE149BACA5115F0EB82DA8621EF3FAAF32F0BD8B3598761AEB5DFAC88E0ACE99DF04B912A5E582BE3F687AB07E8B07D39467FFD4F4B718DF3E673EDD1B3D4FC3F990C8E8980F66B7E879846F770997E575C7C956508B22C197E5E437178FDF0D8ED3A6387F5723930024EBC7BAAC8632FAF91B115DDE0DAC9B1B299C93B0C6875ABF0E6B1D533AE028F47CA21FF41CF570A22F13F5DB8660593C80326B7B57712E6B4C434A5FCBDA76C7ECCB7ADE323E5635B4CA76A6283D97B12B719CF3BF3703BF5F15E30F8261ADC09E5CBAC0FA68E09C4475611A3D1CE6FA677A3858E3EBBDEAE12276B57EE7B1E87D3940E96875BA1DD345E7D35B7657E32FB920BE30CF04DA3425FFAD3659DB2E911F3ECD8F5643D36DDB61F7312A6F68F58C268BCF1BA332FC0698D683F4F709E0713D14EB741B8C12EBA38273A41B457870CC85A4ADA19AD292F1D4519CA38CEB885AE6600C07CE5BC737292FDB0687CAAED5B4FC686AFEB3B4F110CF9356687105DFE4A6F0F56BCC5F3D31E7EA6C1799B267B64DA136F104C77AED8F39F611DFA51E7EE470DE5AC06F3C9EFBF56BD53186CDE5251F26267C985D94FEDA635A2C203F3011F1CF44B49F517874B586DD70E01CE3B05BC72FC2624BE66ACAD0BD6661389E0BB110CC3BD4024ABB77A7FD85702EB03E758AF1EC498C977AF861C7B9A4AFC78044E4E4E5A9560E1D915A3F712D739CCB5ADCF25C83DE03E9F7FE43D7853FAD9A1F71386A29B86E1B1A0B6D86773B8B9EABBCBB0E4F5931691DD5ED1DFE4ECDEBDA8947CF9C673AFB02718C5758AE8DD9A93F29F5F02384F319B4C9B4D0CECAFD38D0EFEDE1A7AEF26D35BE425B8F264A83B9CE37D44B61ED53B4ED8C6F6F3339F21314D3A8339AB6AF09BE5DC660403A467675C11CCB986385E2BCBA914D4FD3F4DCBA9A1F45E97996EF508FB5FF8AE05CD27594CF19DEAD76420F9F9503B7D786B225E6FA30CD1EAE13CFB14B3AE4DC2AC0C30F37DFEE87F657E241E87B1DAB31AAC95324E3AE82FE117D3687583EC8E56D195B81FA59A6EBA1B2EEB4F118047E3243AC870B73A691F4BCC679FC56D5FDDDF2ED5932415F6C91457C7B7534BC33C6254E8D4C9CA6CF573C87EE549833B717BA9C123B8497C69CBB9823008F610CF1934D0F1E352F42D51C83CA359F61BD4979CE67E83EF53AC3CDB7CB3ADC9C1647B72199F3BF23DFCEFD3AD01F4BC5799C6F9F9FDB62FE5A985B1ABFBFF4DFC26D350FED30E0BC62129147A903CE3BC9E783A0E77D7ED722FAC128D63BEBE3429C8EE5BCEE00F96FD56E1CD73DD544CE0EF69C3EF339BA9DE2FDC05D9B9C87F538D68F1DF546483E57704DC21C440F4D6DF31C6699B4281AFBDC14B9832DBABED80CF75B2F6D52F9DF6375C06731FEA5EAC3A757FD20E7C9473FCACF33237A387768709E89813CF47C2865925E711EC764363D9779A7ADEA4607DE7AF775F8018F4A64CEB0D0868CBAABDB8D6634A67344E5F36327AE339C07F35EDC9E2E169D5D0DFB2391EB5D6B57437EC10BFA34FE37E6C43060BD20CE07219F0F35CEA1A35C8E39B3A66FA53235DA2629CF5EBD85CB4160E4C1F900BE7F9C3FD5CCCDA71C8FF91FC5F9F64E7AF86197CF91AEAAF279B01DF70151F48DA6C9ED6A92DFB61DD4C35DA43CFB8391BE4379C7DCD808E839F2F4A8BB33CCFB212BFE7C81D27DF7615FE46119729CC77561F139315177652FE13CADAF846EC3A118C758388BAFD7ABBCFE5416C61B135F059E637A5CD0D33EFAD6AAF2794A6EEC804715793ED4F88144AE15453737CC383FA3FCC33E8D6E67F136A11E0EDBC7ADC7E89FB7B539118C7FB912CCF796D0C3F11CE86732E9C47445FACC78C38DF341DACF4706E7FA05E571CBA032B9392EEA4F01CB5399F6CD1DEB0BCC9FB65A439D3ED69DADD079E289FEE29CC47C3F6334BDC9F84B92E05919ADA774FEA947DE8463B69475C3BC2CC38C738C3775648D73ACD143B723F18B69F6611D1F24693DC5BD5D9BEFD0E14DE89C4F46CD774A8617E79D6C5B37043DEF1B63CDEA555A132B50B3CFE4D6F1F5FB19D21693D21DAB16E379C5FC31CC38C71CA18D86A49B84BDC7AD2B227E51E53B553E27CECFC796F9B925B8DFF2989C83F16DD347B798ADE2119471DC15F1775B61BC5AA62E990C3FCE8BB612E71D71B6D07891F9DD39B5E1F2AFE57AB8235A5FEF5190CF65ED3EB98DFE2D11DB791CE3711E28663F91BAF48F7C248C6FBBDDB8ACCC1D6BB46DE5B0190D27CE653D95B8DE513F36D45A0B6B25CE73621DFDEEB85FFD68E4B41905BB5A53E435CA151BAAEA9B32729A315DBAF03BE2798CD7145E602B994F66C4708E3A9971B44B0C302EF5C6C539C73AFADE1913DB30347EF4711F9B11B1AB8579BEFDCCBCA25DB54C3A9D473EDF4D9CEB6C451A7D24DD8FFEBC33FBB3E2EC3AE560DFF905F352B5EE781A56AC35586CF9E02EBE099F6CFAD06A61CEE94D7A1CF35355860AF3433117C5F3202B36A8A1C7F9A0684D26AD1E669C738C4F4CACE4A07583CD333118D21DCA5FC8B759415E2A3F5C97FAD5A1D027F42BBFF68DCBB79738D763DC6279525672F08B2388733FACAB2CFD97302F15E6A70AF24DFB313D6C89F312E77B04E78E69C046A50A5353A7C0304EC5F8F73D944B4162D8F38426C6633A9488AE50CE059E3704343DC438CFD9375EE2BCC4B95E7712B707C6E36DB116C54D63F0FC5D7FCAE8B8658DC1EED86E776E415FC527979E8145D7875B3F7E91C71FB8BDD6DF181CCEEBF536345BDF2B715EE23CFD39E2FEBB2459DBCC5A25F07DFB498E01A3CB7A43BA7B0CF182D4DC56E4F3AC1CD2BB8DF3E37760BCD866C9B717C4793C76A4931D387BBC14BDD62EE05CE70F209A4B8F2DBFFC123C31FF9518FDEE02E76A2CD390E33CF98EC327FF1E6FBD05CEFCBBA57CDEA39F8CBE157ECB5CD70AADF3EB2C3F5C5A3DA1BEF3ED2AC655DB8838E6624D0AE328B4694BC7C01E583431492EB8818DC8D5F97CAB7DB70BCBECA2CCCF57E27CD8702EF3B7266DCAD1736C7B23F3AA3CDF702F387779BD6F22FCFDE8AF7DDE07F3435107DC0B6B822FBF741636EB4B7B1FE731BB2F51642C22E7C5F83CA9CE97BB80739E9F6FB86BB70E33CE1DD387C6820F271EF6E1CEE5EE705E77E6E133C77D384EAF81BFFBEA749DFED6E77D167366D74F8241C7C78913CFC10197E7A0586CF8B0D0E4F835EE498F47B2D0E77EBA5B9C2B3A343A8E23793362BA0322E896BA37CC4FB913CBA4906506DC5C516799D5B7E6FBD0BAC6F76FD19F2DEEABA8FB1B16B7DCDCF1D674DFA563E85F80C75F889C63B00545F2CA614E39A3505EB9B5C2CF39D4712C266FF375FEDB0DCE2B954AF0B718EB56A5D7AAD779CDB14A057FA7145CF92C56060C45F797A1AFB3596EB66E714E984E19F98AC38F5C6535058F999E887F272C669EE5AF8CD4240DE311B13619B7E38CED00C6CF0CB419B49D9EF6583C11E64C68ADFF84C71AD1FEF8C3E99FB03A5AD8372FAE7F97EDC7F5AAF9CDE06F26292F34778F07A71D0FD68D2D3A677E63E0CF2C5B63E632E5DBDF67EB26BDB76DBD46C7CF37F5E7BBC29FDA157152F8EEC69F052DFF7DB744CBFF9CA3C0B7DF71A47F7CBBE568AE4588565F97990F1A318AF909E6BBC739E309945AE05C2FC8AF77D347454D51FA0F636E2C94114C9EC3D4A6DBB7CC5D87CA86C0F9C0F8D575314E26FB7B5935AF9C32C7CA1C9FE81313D648F7823E22CA7EF56F98CCE3EA6B360E7A5938BCA9C9CF97428745EE322E8F7950FBDC15983A70098AE585ED4E6E1B059CD7E7FB87F368BD055F6FDB52E35832F43BC86F59766F38677E5E2E096A12CABA840CF7C2072CAC23C5FF06B7592DD297509E3D35205F9101615C954B22B11644DB47B8D7AEF27A3C2472DE00ECAC71FD5EEEEF488ADDA3279FDDEEB05EEADB41D3E74D08EC6AAA6E28E17FD5BDBE1DE532C79E62BC26F29E6B8DE7E0EBF66BF0A53AE54B1BE7587C3CF2A773E63E9E7B9E90C4DCE0BCB429F2E4F41BE793318C4FA6F4531FF46D024FF6C1A8EDD93170DF7B400EB6607189C0BC310EAF7DBA05D5E6FFE1E75793B5B89CAA03DC1F38CCEF385F27509DE7B9A158DEEE2AFF8DD2D9580E97427E766938F7151D8C9FB14FFA3B91609FED781DC61449E8832DABB24770EEF560BBE8C00775C2B9FC95FE967DC0F9DD77517C1ABF0D8D1AE731EE365758BD41E4D5D10F46E6EFFDECC41AE3671C3A17D4E75E448D0393DDF16F6AB541D4649F4CD271CA5FCCBEF56B78FBDCDBB1BCF6FD5BEE7678AEEEFDD5C7E89D6F869B6F02F8B8F34B20CE22DC4BE5D97BADDBE0E58545F858E56DC6FBFCFEFD17E9FFAE78E235B68FFF4663E8D177D0B2E6D99C60D1B982E5888AE78672BDA8FF50217A9B857312C1AF7E1F49EC73AA9DC79463B523B9E9301EDEA474632471BE53FE7079E8B9F6FB778F73A7CEE991E4C1B9D57E2BD00BA8FB1BA2CEB31C9F726E58F80AE1F4DCF7FB8CF1F5E85ECA4FFCF94B97E0ABDFFA5B81F541C8092116E47BE37ABB3A13ECF32A0F2AFD1D3D4FE6E6EF5E3EEF858FD6D4791558459E82AF031C5894CF29F50CC0D6E5BEA0FE4FCE31C5EA410758CFF6812E719EC4F9A1D56F27E979EA37EE4D3E8FCBA29F9BDB0457ACB76D1BD6EC25F80F14F32BC67DD0766A5C5E451ED4FC30382FCF2273CC14C5382EAB9496FFE937DAF0F097BFDC5F9C2BB672EE87C0F181583D6C34D93E62DAC1BE5FDAF706FE0A729F8AF3E39F4EC1B9AE3EB42E27832EC781F63C32507AEE2E141953AAAEC3E358D7F02325CE21A2F3C5C6F252E5B0ABF517E79CFF9CAE7C3DE043591CA6E04723B642CC4B6A6E40B4AE901EDB3CAF4C278C77D2B935194D3FB385362CD23FDD9C321EB91D04786D5B8AD596D564FB88B2EF57621FBEB7DC877D6488FC81B33329388FEBFDB2F01BC77AFC3C2D4F17A3A745EBCE6B9B075587C002A5F1F54F75CA2B1CCB85EA7AA3974F6607718E3557A6EB54567EE4AAA8BF5210E7F11CFBB4494FDA49F12FCC7B453468DB0A9A6ADF0BEA4C05FC1AC739D7E56DB0BAECC8077EE6E687E00B8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E37AB5F90636F966B0DBF333BAA4D0562C9F683DA64837667EA0719E2F600661D1BDF8B8122D56C883EF60D3D62FA174FE4C590D506633D49273A39FB3A9F5833E8F499F5F5186D3725D4A10FAC9768CC3C63065182EF8ECEFE5368B7F6B2971D524DCC1A8F753783AC7F1C0EADF62DDA64B65B510D9BCA73663866387FB7348BE38BC1F21F485AF636334893E77061ECB38AF79D4D072A0789EC5226D8C47F89BAEA0A9E94C39AE788E62AC789E472DCFC064BEBEBD199E52A91A637795757441D804BFF7104CD643A8BD36576572D4B3BC801ACE6575C3622A8915E6CC56E15B4B892B27EE40163E85599AE47C272A8D176262795CC5F8FC3CC68B0C7216DD6B7208B7905E3C780556C32958AC2948EB5E832336057B3403D19553E7232EB67E91822F70A21C57FABDF6B9165C6532E5B8AA39263C9BED57AECB17E1C5B6172E4FA53A83B1128CB2DA03353C0A1B1FCC3FA7AB29D2624B2216F905D6747C8C036DBF41C7A65761BE9D837CFE3779FEBE94B8EA34CEE0A4750AFE480A87DD59EC58F778D9BC0F56678561AE97CDA9275C799CCA3CB7863DDFC56E718AECF519AC6FBFC3FDD70D8429AF4FC195D97E6ED17155D69F7783ABBBAA2335974FA13AB63C8C9F9987ABE04E5A98ACD378B63A26988C917C9308F96E62A340635D6843BB3B0173F6D37CBB2C25AE4C861CD63967606C4B931EFB19C271B566ABEAC7629BDF78147DAE0C5AEB5F84FFFCD71116635C5797864F63C03689B58E0CD9F48F71BD9DE5C585F9BF18366EB883C6F6CCD2E34A6B576D2C686DBCC8BE8EF9E14AC35622EF3BB51853E88AA6D1D37B0DDD1D13B07BF4359B48DF17BEC0EB9D58841EE25375F3689654C1A7AD8E154120DEBEE51F111898C1D68EDF71D9C163F00C772C479964E252F3ABBDD62CDC12F12B7B166D42A2A09FA83AADD5E0872992805D584B7D45EFBFFF2918F60CF31A3BAC96329B0362351C288BE318A85DADE6EAFEC945C395CE0790D7DB67ABB9BF6CB82AB1810CAB60B578F3B961FAB53A589D07A7ED289A425F86C371084661CB3C1E452ECE71E5FCCAC9E3529ABD6EC500B6ADFEEFD861F934BF2ECB52E28AD5F262B532581E6F47E767B00DFDB8B86E7149EE2413F73DA117B0C9FF2E9AD65C429F2783C64D07957AECC97405D91247ED39A7F3C7953936C0EB7EF0B92E2ABFE23930748CD7BCBA8F703537EE24F81A1270BB1EC7DDD4ABA9B4B1B9CFEDC2593EE756AB55BAD47A3BAF51245EE073FAFCAC86855EB668367B51BC4FE67C96C503F95CAE981A6B4BA42BC405E525C395E2771A8360FD6CDE7ED1BBD902FC1FABB51157F2E117195B1ED7C3300827012CA21C67FDA2E5E8ABFAC192FAAFE49C4A73D468986B2E77D57C86C5C115ABE52308C7CBF8048BD9F89B0957865409EE970057D4374DA3C7B035741B6D9D7F838E28D9299D8FC12EC51639CEAECDA34E2D2EAE34B9B30C7A3BC71472F3E7E9CB882B37E91E36DB41D249062AD8E3D5E2CED945D4EB74FA31D9F3EBDB92E86E1BC7A03B0D67AA9003B2B8323605ABF5CA12F86A96C9DF7EBFE04A1F7BD1746EF5FBE33DC7A98D0774767B95F1A897DD4BB1D17D0D449B433F418BF41B34B6E420749E5FD4DAD77A5C75775FAF1A07B99F7165261B211CD3E6DEC4B9DD30975E11D6FEC54A758B45C295365F8FD90D44E29B699C0FC5792DEBC2FDAAC464547EB21873A066DBFC4292EB974A7DA9C5C7B0D53A8460F02D3ECF6729B7A58D0F96CE179C6D2BADE350A817CD6283015C5838AEE209652DC8780AF5EF4FC3783ECDED00896CCC43BE9192FB550A2016EAA3DFD51CAAD9F413D54FCD6A344812EDE3BAFA279ADDBC08F1AB5068049DB11F439927227E2E71E5B0E4B07E430E8DC1D971E5123DD8B4E1BF60436F0E0374FEDAB53934B79C817FCB26845A7F0BA929079FFF57A85F53BCE6AACD24C3D23017AE246E5BFA2EBDCD6B8671BB329EE6F55F58DF6D3107784E74735BABBA26CE42B72866AFE75C9D0244617AA6402C499C7D33E2D21846E859C3F2389B358D303DBF93C605AB27E25CE06F68D4223D8BD57D59584CCF92BDF2240A6BFBA844B63B2387ED31D81C8F96FF3D4F63B3FECE92FADB8D848FA0521774365CD5D5D5A1DEFA2B78EC849FA052C3C16ADBAB8ECF2C7DD6D572D06DF502E14A9C0B57AC06620ABBFBA7D1EBCEC0E69C467B670EFDBE49EC689D82533C821D9BC6B17BDB65080F5F5A20A67A89CECCAF8FC5389F236DA07D5FD35F62D4FF37D8D5F9339C0EFE05469BFE231E6FFD53F47966D0E6F82EAF0DE25F7D0B7BA2FF801DDD2423ADBB178CABC6C6243A7A7EC97DEF82F0328AEA01C46E12643E86219985C37D95F483AFA1728D562D8F35714F70C5EBC8786A97838241890DE6E56022A1D6FB61757FC60BB240D5632D0C57F6B971D5E68E639F7B125BDD1778BDECC136A58E6947A752BF2F44185B1D227D23756D01728E61EA10D728E76D9BA4953A4B96FA73B01A06207A07304ACFB5AFF1190C368DC0647E81F79FBEB6F15CF517F3F18C2A3624D3AF8CE62BC5FC5CDBC7B4F51C988ED7ABCA49AD06A558728D46B1E5D7AF440D23991AFC25855817AF7B0049C79FD471A0ADDDCEF23224A926FDAABD6D0852CB0D6C6DFE1D7677FD195A5AFE1641B2B5FA233F41CFEE3B70B9E258E3BF8D6EE70730BD979DA7BD77482592C9DB8EE0B11B1FC14BFB9A36DDBADE5D814BB09BB7A0A36E35CEAEB98993EBC6F142FB21F89DAFA2B5E524C9C97E3E7FDA65DE457250C93D6C22BDD0EB3B04D1B50F76FBBE82EF2DAECEEBAFB6066FC9BC03A14EA96B22D46561B62875D12D161AE3EA67813E3B5DE5F5338D0689644C2F8C261F6CB61D300AD6CF8F9F41DD3BBC470AB82AD29FE7C695C54A72D0D08F6EC3051C31C5B1D3760D8F1A12D8EB7C1A41FFDF63AFC3832EFF772039DF45DBF12B157125582D73F2A9FD2F7D036792DFC689C99BF370512ABC4530533F9A49561B8897BAFE06FB7C6FE2ABF6D761A8538EB3FA46CCAE0E065385FA96DAF5F93552B4DA1F09A576A07E7D417DCCBC045716B3822B0B3D83DD91E2B6A8C39125DD4AF96CA3CFA23D5BB10F8DA64D80A153E17352711CF5FEC7551AA1E8AF159E57660FD5620F16AEE922B9B9D17A9934EC01EA1F567F52C93F17EB6D342E1F244EAFD4E6603E0F165B65FA3C8BE794E3AA37CFA70AA26100E7AEDE805992E7F79ED4F7CD5296F8680A7B8847EC273BE45428852BAC4FE973738B82AB0ED30C1A9B4A70A58F4F68F951796CC905BF4A511C43B7461AB74393EAF9491D268B3F9BF724601EBE44BCFFBF128ED2E576115F4B5B8DB5DDCF711C4D37A0BDCF99C5BA2DFFCC7973B9CEA0E24AD327485F89F92E6030328390740D9B8233582B3C9AEF03EF9E14A2F2A738244F6197CCEA292B737C7CEE76D8EC0FC1EFFF6BB4347F829D911F438A4D56E15387CA31A5F1824A79CB95E246CC06761D242C934C93DA51BFFF65348C3E0769F8220687AFE081D1F338489F9B865F827DF44B080D5E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BE1DDBFFF468977C6E42789D7C4E3E0F2B9F9B7C8B5272019B75E631B38D1FCFDBB98483EA0982282D7F38E100D8D1F7B69FC9598C38F18723C8E7C5CCE7286D1E37E57393C7B16FCADEA63C2EE79A72BD797DCAE704417F3893CF0F759C5763C7AD219F93CFC9E75978BF0922159097886CC8E7B25D33BB55759EBC483E279F93CF33C41C8248017DC8E74481CF27C8C1E473F2394190CF89C2E773338E0C9139C8E7E1E4F39716377A659FE8DF65D6615FB6BBC6F6589DD9DE2CA5DEDC96F6F679F6B589EE30FBC7DCB6DBD87D603E6BD7B154FA807C4E1432B6D5D669FF1D942E1F20C1FAEA29BADC5E57AFF634ADD06D3AF7B7ABD3274FAB2D336ABA9D83EB01674E9D555B67D7AAAF8F1EE3F32E223E0F8AA9902B0C1FD99410363F9B6532DB366FFBF1BD5D6FC2BE36E1C7A5A3E29E9FEBB999F327BBADDF7552E9833EDAEE19FC4E558EFC28EFEF3ED751102E7C3E68705C69AFD535EBE63C5CAEDA963679E3F9E2C80B6AE3D44FD48EF95FE8BAFA0103BDB6B8DEF4DB6ED7FBEBAAAAE3D6EF1294CF837CD7FC8E2F4CE31D32C7EAABCBCABA8DFFB28D63266FDB9C60CA79B60CE9C739E4F3D420FD8312B0E7532E7D88DFF3CF84CFED772E1F3A2AFAE61199F2B9BD6EC7DC46F9CE5557A9FD6B37E86DC8DC2B27BCA7E5EFB59555BAAEEEB1C7E3F85CE473941D6D7BF9BC8B88CF172EDEA7A17D394734AAE696633AEF00EAD66E38A2F61D3CA366CFDDE9C53246BBBBEF99A94BD4554FD9A2D66FEED0DB88B5306CF812EFDAB2DE03E5D2E5ED6AC2C4F5EAC5973F8E5EFF0F29E73648457F3EC7A7BD8B1382E4765BE76EF211793B583E379F5990BEDD65DF08BA963D1F4B96CF878F1C95169FE33B907715A5F033B6BF6C6A571F4EDEACBF0BD7B7816F29E85B4029DF1FC73B221D7DBB00FC8CF35036D7CC8AD3BF9AE7E17A7CBEC52D9F638CF9C9B515DD62239DBBF8AD1E9366CED919172FA97159BBEA3876214EEEA8ACDA14D3ED2CD8E31B6349B6F12F55992597B65F727678ECF0E9F685CDE7BDA2B24CBAF239BE0DE163F33D3E73E11B75FD0D9571EFBBEBDB08FA1638CE117E7650BF6D3BCE65AAD7238A5B3E876C81F16A62C5064FF6C0B1F1EFAE53F3E6EFD632FACDB77CE2C920635E5FE9C91A0F4571E8E879BD8FF8498FF49FE7944944B69152A94846F2B99F7DD625639BFA5A531F6F5E4374C47EF226F5EC99DBD15DFC6CF78FAD5B4FB71FB2A56F17F9DC7C874D4E1E31EACB38F9DCFC364CBE0EFA16C8EB848B7FED1859763C2C33D696ED0B25E7B8AEE58AC9C5675E3CF279B67D7B7A5FF9DF53FE7036279BDC817F7E3657975E3DC87E6E5E5BAE4BA4C6E7AEF9929F5F42227D7A10D787D51F2ED96F81E31DE11A9785976DAEB6E356DBE3B89C17898E5BB60F9D1DFB92EF5FF1D9CF8F9FBAA4631942870879C1B4EB6DDADAE9C54A42BB19353B7489BA556B0F6BFB39B6613F47CE02574C37338F413AB64C3F7F38D30FCE2C5DF29F9CE792CFE538E5F3ECF2B9D9577EF32997EEC44F3ECFC41FAE9721B3A4229FBB7273005B5B8EABA3C7FFEAD5DBDF06BEA544DF0241F8019C0C3E1679DC94ADEDBC5226FF9B7C6FF3B979DCCE874114877C8E3146E21363AC91F14BFCE2E6D6B7E9E318A7700CBC8F710B759BB775EAB6CF3CBB5897F0F1B16D864F0D6950BD7FFE51DCD89AAA8F3BF991C8C47E9E2E9FCB7760E6E64059DE7F9EB643FDF6779FEAEFC2F56DC4CF61DDDF0241246BF3967D972DDC3C26083A2E7C4EBB7AE9D8CFDF18BB4A97E9DACFC53E583169A33737907B219F13B9E6F374D649BAECE7F80EEEBD6F564AF673BF6F812008F239E3BD1204E3C31104413E279F13E473822008F239F99C209F1344CFC514248A2B6F32F99C7C4E90CF89D202728131BF69768067493E279F13E4738228163E7FA031C66D28C9E7E473F239413E2788DCF079EF518D0626C771D4AD5322EAC9BD31AEBA697C448DB81451BFAB8AD549794F5D440D3B1B6B7FDFFCAE73FFBC33761EAE2179C165FBDEFAAE3A39977C4E3E279F13E473A210D67787255FAE89EF9781BFBF8B83C9E9E0DD7F191A518FB746D4906331FE1E7428A206ECEF2AFFE9D118970DFF6B94DBEB6325CE05F7FFA1B1BBBC7E6D7944F56B8AA89F0D8E7179B1E8FCC9E7E473827C4E10F942223E7F6C7B44F51A11DB069F83935142569752F8FCDEF9312EFFC3E22E8E83ECFEF0DAD8F1EF97C5EAFEE6AA882ADF403E279F93CF09F239517890B83EAE5CD112532B8CFA76F0EDA3CDB1EDBB66C5F8BC4F6D440D3DDD558ABE1DD77AE6644CA76E729C0B688FF3A86FCF2F9F4B2EC844209F13E47382E85A17E6972B3A9FEB9C6C9E4DD7874DCEA77F7B78F83C11289F1344CFF1B9E4BEA8B9AFAFDA565BA7F71B5F7A45B57ED1404E2C9275DE07BE3AAB63EEDBB977C2AA6F178E36F9DEB4A9DB1C5ECABC4E7D7BF8F95CF29B9A79D2CC9CA7767E6D332FAAB96F9F675FCB3CC76E4F94069FBB7251EE5FBB3E2B5C424EA53F5C3AFE70A6EC0EFB374AD3A68E3A53A637EDE4E473F279D8F8DC9537D36F5B385F4AC9891A947BD39533DDCCAB4EBE2C2DF91CA52D9F77EE6BCF98CF9993257CF6F39AD9AD7A7FF6DC9D71B674F4D74FAFAFD4C0FE8B2F37E976B80ECAEA295BBCB6D23E5D1B7C22FBB99FED5B6CEAB68E3E53BD3DF99C7C9EDADFD994107EF9CF6D0E1659DA951B3D553E77C9EEF2DBE44CDACFB3A1EB25AF86CB7EFEEEC4F59AD367CED9D94DF77EFB1D33BC7E439EE8A6955F75EB47E1F34C7430B49F93CF0B85CF250F7526F952456E36F5EDB64CEDA79FB7CF73B575E9ECFDF4F9447660CED104AEB957B273A96CF1F9B7D17BB81CFD4D3F7C9B664E75577C69700BF2AE824FC009B0E97E50B9D193F7709C3C9C5DF9DCCE15BDAFFD8C5AB1FA90CE11AD54C493B3515E7DF57BAAFAE366BD5F11ED9755EB0E7BF239F246DBF279BA7C1ED38D77E9DA1F68DC17C7E9A2634709C077FD9F8744D4632D11754DBFEEFA76ECFFF71BC8E7E4F39EE3F4B0E53F4F852B889EE1735B1FE29AABA5C2E789743E0B171FE866BBB4FD4D2F27F86E2E3BCEA9B4AE5939727260BE08D1BBCBB6D44FFA70531C2F509E2F0DFB39F8DBB69FC7EAFCEDE70FAD89A81FDE1451CF9D77FBC3513E279FF71497A7B37ECECFBE6D8FF9262F98F2B69F7EDE556F9FE3921589DCC8E7E80B29CD7E48553EC7FB267A216C273B9FCCB57CFEF1B4ADBAAEBCFF3C2DF799F21EE5F3ECEBDB317F3A7EEA921A3B6E8D3A73E11BD5DA7652979BB676769B5F99407B9C87EBA05CB5F6705C5BE855809EF06FB7E57360607B44FD6274EC38F40A268797AA2F5C29F17998E6A6E9D8CF4D9D7922FBB9CDD1AEF641DCE2D2EB1385653F07974B9C8630CC6F6DD99CC85F1F40E77EA8E3BCE67270F3E2A507D4DCFAB66E7A11E8D40159E3064E37EDE9B65FC4D2E5ED59B19F33DF1AF93C8CF2B9C8452223A52B9FDB7C6BFBBCD93C9FC8BF3D486E9773C8E785CDE7A2134A553F84F9E6F6BA7A6FEE79E6D4590DFAC315079F6F6F3DA1E559F039E65627CFFCA7AA9DB74B7DD9D4EEF9B74B3FF52AAB5655D55BF4FEC62D47D5DA0D47BCEB80FF4D7F38CC0B468F59D123FEEDC9E64FE35C807C9E699CC4D7DE5899D47D64C2E70491CBF5E7CD3367ABF3172EC5E994B8FEBC78E3C900D0B9DBFA76C8E3EB3777E8EDE933B6C7E9DBEDF3E1D308F484BEFD576323EA910DB112F159FFB16F3CAFDBFAF5EBFAC7E2CCA004BFA1441BC48A453E363947CAFFEB67B138EE8242F6A7239FA737AF95F109FBFEF380B2381FF79E8827E3F23D37FDE1ED6BD8BA78D7756C7D3BFDDB4B6BFD79FD93033DFB14D6A003E4C3E2B49F4B5DBAB6EF5CC4873373AF80AF907BC5E430703038DBDC0757A3947DED43B7BA4BA637F3B2C87A7689FF5EC8323EEDE789D1FBCAFF69E583D5133FBE4B8D2CFB83DEC7B101D7F4E971FB79503C195B1FEE5A439E28FE8CBDC6DCCFF64E70FD39515CF673914BF6B69F094DFC769B4FCDDC2B9243C5D6BB9B75D846BDE45A41F9FBCFE275F46669F2B89C433EA7FDDCCF7E9EA97F7B503C19DBFE6DCBD6B6FDDC25B7BB7CEDE813473E278ADF7E9E8C9E31177C4E5F36F27918ECE789621C9A3E713D154FC62F3E4CAAF1DE5D6BD3A96F279F13C59F8F255DDB37F99C7C5E88F6F374F20C9A71E1C2E60FC77832E473820803C8E7E4F35CCBE7769C4491CB83E473D3B7BDA7E2C9B8E4ED54E2C9D8ED6DDB39413E2708F239F99CF1647A3E9E8C5FBCD054E2C9B8ECE5D4B193CF09827C4E3EA73FDC77DDE4F230C79331DB533E279F1304F99C7C4E3EEF193E2708F239413E27C8E7F9CC4F58169793259BF1645CF2B3E9D3EEF2870F3AE6A78B27C8E704413E279F33BF9ADFBD65663F77F9B0F9E56871D9DB5D7303EAD8C9E70411867832664CF64CE18AF3DED3C8E56FCA6F99209FF7ECDF93CD783236FCFCDAFCECEDF635ED6D827C4E10B98DF71AE996FBDCE4C25BA744D4937BE3390B31DD108F5D62BBA13D62B3A31D4ABF3872660CB87BEBE3AF67C78D4BF53751A6FB9B728D54B9DCCE1D8F67493EEF99BCE7F8970D3E2708F23991AD7C3B6183CD4936A78303FF65682CC78A199F1531DDC1AFA2AF1F7428A206EC8F95AE38EFE6B9D7964754BFA6F8BAE17F8DA8FF3D2CD6F6BFFD34FE37E5FCA0DF4499EC6FCA31F3371F5C991997CB73AB1C3939EF7D5ACCF673DC4BB6F3B1704D19413E27D2C9C7821CA812BB1DFB38B6696BA78E1907481C394072A9A13473B7E07C94A847DC4CF337E6D4EDF2CE9763E66FA59A8FE5B1ED11D56B44777EFCB757BBE4DB64F2B698E7220F4BF986F8BAFB1745F97679443D7D34A2FEFEF7F1BF2965D06FA24CF637E598FCE6937B22EA97AFA76A2BEFFEDCBEEF888762C60134FBD6EC4BF4BFF95E24DBFF28FDFABF57D928EF1AE63D149BFD3C93783241B15E09F23941248AF73AEDD36DEAA9210DAAB9E5B817B71AF9CC073DB550BDF9D66AAFAD8CE1C8C5263C6FE66E59BABC5DD795F79FA7AF2163F68C993BBCDC6D88C385B6F83DD4A593FF1C7CF868737C8E73D40D6C8FE7D664F2B698BA6F330FCB632D31BDFE3327BBDAA4FA9B2833F94D5C2375FFB7C9D6B38BF8C644D3F1CA47C6E2FD9A7DB96BCFD7BAFFC1C3F25E98FCEFEA7F9C23A55FFF2BD5DB7B874E9DBBAC860C5D5414F958ECF8EDE9F8C399B670D34F9D5C4690CF8954F2B1DC7EC70CF5EC734B74DD9D7D6A74F96553BB7AFEC5656AD5BAC3DDF8FCA5579ABAE56EC1B1D16356787C6EFEC6E0A71BBC6DF039DACE5FB847CD9BBF3BADFC6A85E60F67CE0172F53B89FCE124BEA9F497D997E06BF4FF92A507BCF7C2E47357FFE31C29FDFADFE473F43FAE5FE8F2B9707A26FA767B8D19F99C209F1399E46359BFB943D76D8DCA6228214F41DE36F5B3C2E9BBF79FEA96BBA5F3E4455DBAF4EDD897F6D8861E77F7BE535AC64399AABEFD9F87C464D96BFAC5F296239F39E4DD1FDF1B2B5107BEFED5D8887A6443AC44FD3FF68DE7753917B9D251CA757E5311B35D4B1B297FFE4244FDF2B51847621FE761FBC6B7BADAC08FAD6C445789EB99323ADAE01C9C2BE7A3C4EF413F2F6DCCFBEF297DBBC8E702B32FD1FFEB377578EF45B2FD8FD2AFFF45DFBE795B4C97DF71EC42B7FE2F243E17B99CFE7004F99CC837C214F33A157FB887D644D40F6F8AA8E7CEC7DB9E6177165D35EA701C75D2CE968F651FF962ED3A57097FB81BDF8E9783A153FFE3B2F8B67D1BBA4AFB77CDEBD9DBF66FCAFDD31FAEB8F39F1304F99CE8097F389490CDC41FCEF47B32E574F16533EBCC6390E1E45C91EBB2B55E0D36EB5F8CEE926545AEFEF737BB64671CC37A2FD8A051262B9F03720D94E07AD1D1432F206BCA443EC775AFBEBBAB0DFCDAFFE94F5D65B2F239EA452EC76FA25EEE3FDBEBD582FCE14C7F48E94757FB74FABF54E2C990CF09F23911067F388CBB8B971ED0FE50A6DF93693FB773433F545EA761CE114646967AE7C879A51A4F2697F6F464E3C9F8F9C399FE90D28F767BBFFE378FB9FA9F7C4E3E27C8E7444FAD9F8DE57D7EE7DD75EAC5979B741D7CDAE113B7EFE01935E6F5955E2E68B403B06DE684C6987FF5D5EF69485B8CFBB8064A39CFB4A92696CF736B3F07443EC65A723916C49BD01198F72072B6CB9E2EF78012F7E027AF9BF700D93C55FBB95B3E77DBCFD14FF0874309FF35E9D337C6AED225FA3FF2C252DD8F767B57FF577FDCEC1D439DABFFC9E7B9E773FAD691CF09DACF4BC97E6ECAB2FF3139FE58105CF7E0B2A7CB3DA04C644F977B40998AFD3C768D46DACF0B7CFDB9B966CD6E63C67977E544B74B3B066C502C59827C4E149FFD1CFEC9D08FA6633F37F5B1AEB82361B59F8B7C8ED82FB22E3C193E37EF41646C973D5DEE016522F95CEE01DBF9B09FAFDD70C4F39F48C77E2EEF80ABFF7B92CFC33437CD341F8BCDCB76CE72BF3AB3C4355D7C6EE77621C8E744F1DACFA52E1DFBB96D2FB5E38E94BAFD3C176BD033B59F03884990AEFD5CE205B9FA3F17F2B9CC3BF10EE2F7313731E7A832FF70F9F1A1BDF86D9AE7DBED5CF164B2998FC596D55DB2B5CDCB3227B06578CAE7F987C41630FBCC8CF14B3E277A2A9E0C7CE176EF3FADE389987143D0CE35A6C5C6FA6A0D9BCFEDB823A9F1B97F7CB86CE46301A43DEA1177D5E64289CB2E1C0CBD00EACC7A9C8BF3CC3871663E16D10DE0774CCE457BD461CDF9884BEEDF956BF4447C38BF7832B3A39CBDE74AFF4FFA70931A37616DB7F6AEFE878EC7E673BBFF73A56F97FB407C1B335E2DE628E63CC49E8B605E030E97F6F6F9F6B9662E16AE572382FC17FCE661C9CEABFAE8773058E75339F2A3BCD8D18870E0FEB251AA77F4FFB4F2C1EAEDDB1ED5FDB360D80835B1CFE3EAF3A1C35575BF816A64D91F741BFC1F74EDDDDEB6F4278EDFF6BD9B34CCE373063D1B773ECA64DF9144FE70D9CAC722EDA16F876F9BC8D0E05BD4F55D1851232FC7CBD4F0C5BB715CD73EDAA13D62CD98F670C9A58212BF6B5E43DAA30E71DE656E72DFFC58F9C8A688FAF3AEAEFBCF349E8CFD7CA54FCCFE923EADECFBA43E8EFE7FFBD647D5133FBECBD9DEEE7FBC3F661BBBFF7B5ADF6E02734FACF9031FE377CD39EAA77F6989F3E733E7221BB71CD5F606E16D39DFF40134F93C5BF16492C9C7E23A66CA7CAED22FD69C791ED1D37AF2EE7A95A0BCF594CF89E2CB979A9B7C2CD21E9C0C2E35F9F88681D1635F76F78DFBD797E37DCE712E6CDC37BF177F3FC8A522A5CDE7D25EF8DCBC67947FDA1AE378B9FF6CC7870B7BBE54C44E7DB8BC7FDAFA7691B5A1EBC7FEB98BDFEAB887D09D23678CA96F873C8E1878D89E3E637B9CBE5DCEB77D0CB21D4F26997C2C2EF92E913F9C1F57D89C42E446D76ECFAF52B17BB8F83C139F50739E8A352DEF4FDAA8EEBE67A611CB7132B9A800D7ABA1EFB0460D31381FF863AD964FB05669F6DC9D5EFF4A3BF31D30C73569377C44A36A6E39A68F4F99B655F5B97B665AF7958B7C2CA23F477BD4CB3A3533DF39EAA0DB376DED22774B1BD1A5CBF980998F05A5AD6F376D03E6EFCADF23BF2BD7C8B6BEDDFC5E652DA2F429D62DA22FD1FFE0AFD7A3DFBADDDEAFFFA18FAF9EB2451F73F53F787AC0A0C1D1B67509F9BCEF1F1E28297F3897EDDC35F69B5C6CCBECB63D9D7C5EDCFE7099F2F9BD7D67EBEF56D6A8362E6BD731985D7625A230ECE71883870D5FA27E75E35475F2CC7F6A59069C3C73CE4EAF7FA59D9F3F14DAC5FB093546CF6F4DFBBE7291B7A454E0673FFFC9B5159E3D1C7C2EFD87795DD3CAAF74FF1FEEBCA01635EEEFD6DED5FFF29EC8F55DFD8FF1077C3E7D464D423EBFF7BEBE19F9C399F34BC4A1874F00E628323711B9FBA7D7576AA04EE632B88E3D3F0520DBE35BB16DE7A27BCF563E163F7DBB2DE799FA759BFF5D9CEDD2D31385C9E7E9F860FA7D2F7F7E7281DE96782300EC55E4C8C28F27333EBA8DBC67C9C69391F700E3DFC48A0D5E7BC86723235F92CF43C8E741F1642AA29C859C7AC9C69331C78187AFF896897C6EF73F78BABCFFA309E5F36CDBCF314FAD9DB72B63FBB9E410B4EDE7E9C84AA9DACF09F239398B208842B39F67BA5ECDB69F8BCC91A9FD1CF9E3806CAF57F3F375A64E9C209F13858EAAA81C077B28CAF5D55374F9C1F53768C03E597525D774E7BE76D534F62DB57BD97255F7D8E3DE3982CF070D56B5E5FD55CD7D7DD592175F525B02F4BC4461F37931D9CFCDF5E4E432827C4E1432645D233859C6C886283EBDE3F7BAFEFD6BAFD33C8DEDB6C6656ACFF2956AD5C48A582EEEBEF7AB6DB575DE35D0167CBE68D4F3AAA36D2F9F6F91CBE7B6AFA76907175FCF6CE53E87FD40E4F35E57E698D9B49F93C708F23951E840C6505BD6DEF0F134F5EED5FFE0C9E7C2E79FF5B9BB9B8C26E7423EDF1660AB258A97CFC59E0F3F3EA9135FCF6CFD3DC2E599F2394190CF0982209F07FB7A82D3C54F537C3DB3C5E5666CB84CFCDB5DFE70D4B513E473A258ECE7663C4191B9A574E9E7A5DE6E0BF9FCCCA9B39E9CBE2B60DC95DF336DB1F6BE9CBF6B31BF2FDACFB3633FB775EC12879D3C4690CF8962B09F43E76EFAC599A5CDBF328E82B7CD3A94B5FD63716C51BA78D8E601D997398539BFA83274AA8C5D1C6EF9BCA721F2B9C8E599C8E72E7F38FC238F11E473A218E5735B3EB6F9FC486B9BC7B9C2C92E3E77CD1DECFC02F6EF9BFBA61E807D5558FE70D98E7935DCC8EB9EE97A35DB1F8EFA76827C4E14934F9C4B3E0E92AF453E37F9DCD6B7DBB0E573F93D533E9763F2FB02F65361F9C3FDE007E3E2E2D466EB6F0A4B7E3557EE15827C4E100451E87C6EC795414E96DCFC9D99D9CF5DF164FCD6B2F9C9F3A8C73F3BDE1CD7C391CF098220683FEF6E43776D67C37EEE9793CBCEB512341770E57861EC39F23941E412DF2FEBCA9B4664063C4BF279CFFF3DD9B69FDB7A739B9BCD356EAEDC2B66CE15D79C803A79F23941E402CCC7D2F3F9D5C8E7E1E173DACF09F23951CC7C6EC2CC3F9E2B98B9D0C9E7E4F3A07B30F3AC659A8F45F8D88EDF8E7A59936EEBCDFD72A3DAED4D1D3CD7B793CF092257FAF6C877DF7978A0715F1CAFE2F87FBF2186EBFAC7380B25DAE0D83D7511F5B3C15D40DD6F3F8C9DFBE0CA88FA4D45ACFCE72111F5584B445DD32FD6E6C6B763ED62BFDFC5EBD8FFE56B1175EB9488BAB326D67EF85FC9E7A5CEE7D9F28713EE0EB29F9BC74DAE0FB29FDB7C6E5E87F673F23951DC315CC282DEA31AE3F81C88D5757114F0F7BF8F78BA79B334F5F5D8FEDE8F62BC2C32B7D43FB426A27E7853443D773EB60F3E37AF25C0F94F1F8D6DFF6274440D3E4CF99C7C9EBDF5E7A63F9C296FDBF9D64C3EB76DE9B6BC6DDBDBED7903E573F23951DCC09A1EACF1D9BDEF945EE3836DE487462EE84D5B3B75F9D1D4665D56556F51AD6D27BD754173EA76E93A6CA31E79A6CDB543727CF3B64EBD7FEADCE58CE4F3DBA645D4FFF90FF1F2394AA5BACBE77F7355FCB9E22736B03DC6CF527FC3C0D836AE61CAE7381FF2FCAD1F47D42D9322EA7FFE96F239F93C7B7C4E10E473A22780B85A88A935E8A985AAB9E5B85EBF0B4E9F5BDFA6CB635F5FD425F8F9A9210DBA0DF879F1D2031E77A35CBABC5DCF0F648E3063E60E75E6C237EA8DB756AB965D27693F279F173C9F4B4E35DC4B26F9D5988F85209F133D01C949F5FC8BCBF4FEC62D4775DEE82F9BDAD59F1EFFDCE3EC4DCD9DEAD9E79678FBABD61ED6DC8DF900E4F7D16356C4C9E7839F6ED0DB9FD5B4A8FA05BB93E0F3460393BB719400B2B894C2C1C3CE763F0EDB37CEC5B1DB3F8995A87B726F57DB7BEB6375B6BE5D78FDBEF9317B3BF6299F93CF3341A27832B46F13E473221BFA76C8E790AF51377DC676CDCF90AD45B70EA06EFDE60E8FAFB12FE7779EBCA86A66B7C6F139AED971EC8296F313EBDB273BECE793E338EABA4762803E1D75520A3783AF85D7AF2D8FA8BE5FC438F9A6F111F5EC995809FEFE97A111F5786BAC5D9FD91135E2929BCF651B36F62776533E279FC7DF4BB6E2C998B66EF218413E27B2693F871D1CF6F04CECE7725D7078A1D9CF655FCBF8B49F93CFBF71E759A3FD9C209F1361B79FEF6D3FA376EDF93A23FBB9595F28F673C693219FE72A1F8BCB7E4E7D7B71C18EE7976AEC1FF239910DFBF9A18EF39ABF33B19F4B7D18ECE76803B9DCB48B4B5B97ED9C7C4E3ECFB5FD9C9C5E8CF2F528DF7584E4732257F673D8C1610FCFC47E2EF561B09F033F7FA1FB9A75D10140EF8EF3C8E7E4F35CC693718DF3E4F3E281CB4722953EEEA3C7DDE077AA72E447A18921423E653C1941327C0E59FAFBBDE3F95C62B9D97C6EDACFFBD446D4CDEF7571B7C8E712130ED72926199D7C1E7EFB7932F95888C297CF8372E6A52A9FE3BD33D74BFAC967A2174509390ABAD7D7DE58A956AF3B4CDE2B01F91CFD0E7FB891912FD5037FAC55F7DE374BCBEBB3E7EEF48E4B09FCF4FA4A0DF31D41FBE1231A5573CB31EF3D92F6C9C76F0FD6B73FDA1CF3514F56DF2EE7E2D85DB3DCFA7653B6279F93CF53E1F34CFCDB09225D3E47897F7EEFD94FAEADD01C2EFE4B284F9EF94FD5B8EC0039AF0420FDFFF4338B74BF8B7E7DE69C9DEADCC56FE3DE0BC1ED77CCF0DE11A933D7AA9928947C2CE473F279AEFCE10822553E37E7907EB18C44EEC2786ECAE7159336C6D94389E296CFD1E7839F5EA8EB443EDF77F08CFAEDEF3ED56BB74CF9BCFAE36675F5D5EFC5BD23683FB162832797A72A9F275AAF96893F9C3D57101F38C49591F3E59C62D0BB93CFC3EF0F4710F487238AD57E0EFEB6EDE7B1BACCFDE1B08F75E6A6DC8F9832FFCFBF76E77BC483239F93CFC9E704F99C2886783280AC21CF5DBED49EF387C3FE80FDF13E70880FF3BF8775F9C821276AB1F8C491CFC9E704F99CA0FD5CECE7B9BE87625B034E3E279F93CF09F239916FFB79B2366FF239F99C7C4E3E27C8E704113F5637125904F93CDC7C6EC70235EBEC35CAD83673B5D8EDCDF35C6B9FFDCE933827661B7BCDB4794D73ADBC5FDC5AB3B4E39C728D3DF99C287EEC8A7EDFE217B7ADB6CEDB3E73EAAC2E715CEAA5DC5E57AFF634ADD0C73AF7B7ABD3274FAB2D336AE2AE25ED015C6BEBEC5AF5F5D1637CE6E4F3BCC7874B140BD4E64DD731BFD2E6EBA01CAD2EEE3779D9BE6E32F765EEBBE2A830061EF99C286ECC297F4443785CB85CE2087E3E68B057CE79B85CB52D6DF2E6028B232FA88D533F513BE67FA1EBEA070C8C3B6FFA6DB7EBFD7555D5BA3D9F37F93CD33CA9824CF3A5BA7813C76CF938193EF7E3E24431656DD9DA96A35D75A22F4886CF5DB1F008F23951BCA82AEBAD61F3795574DC00079B7CFECE5557A9FD6B37E87DC8DC2B27BCA7DBAFADACD275758F3DAEF7A5BDC8E7283BDAF6F27993CFF31E4FC6E446176FFAE5EA72F1B3AD5377E9BCFDF4F27EE7F9E9DAFD7EDB4F176F9E976ABC53F239F99C284C7DFB8A71E33592D5B70B5FA36CAE9915772D81B4E733269F670B126F3397F1E128D716568ED46CF515F99C2886F8362EBE173DB9B96D1EE7F3239FE7F2EF114ECF443E4F561F9E8A4EDD96A55D6D5CFAFC52CF676ADB0F6C1F44DB7E605F43EC27AE3E92EBA7FACCC9E7442173B9E8D66D9F36E16B93EF5187F6CCD5473EB7DF977C209D7CA97E3A6CFC4BE42B67EE9B5C64DBBA6DEEF7B387972A9FBBE63D269FBBFCF693F56174E54B4D35BF1AF3A51285693F2FF3F8D9E4777B5FEA84CF514602720D11C5CFE788A1000C7A6AA1DABCAD53E708440C05897D8836C815F8CCB38BBD780B763EC029D3B6AA3E77CF4C98574DF26098DBD9B69FBBC6FB44F673DB861EB466CCB556AE9475E37EBEFCF6B371F9F5F9AD25B09F7136F2A59ABE1B7EDF83BCDF124764C0A02F34B0DD7EF89C5AB5F6B0FAB2A95D7F17AF8F5DE5CCAF6AC61F915C9A12A344F2BBB8CE27085B3EB7F95DEA84BF85C34DD9BD2AC57195081F9F831B4D3F333FF85D0363CCB0E14BD4AF6E9C1A17E3F0073F18A7C71CE40A1C3A6C715CAC0333F6C1CC39C9E59E923C95B49F13F9B09F9BDF82DFFA0A335F2AB87CFA8CEDDEFBBEA9F9A83A73E11B75B8F3825AD4B8BF5B7BF91E648E8C3C9A765C0B949D272F7AE78729DE054110B9F105F74336E4738C5BEFBCBB4EBDF872535C8CC337A232044AE40AFC5FD7BCAFC71EE40BB4F301423E1F19F93289788A8D59E1F344F6F344EBBC836CB289ECE72EBB31EDE7A9ADBF4BC57EEEB2A727634777E53F376573179F9BF13E5196F79FA7BF0DBCE7A7CE5D5677F6A9D1ED222F2CD5DB767B7BAE8B3C9AC8A769CBE7F87ECCF339D61104E573DACFFDF5E789ECB42607B9DA27B2F9D21FCEDF7E6EC707C8C47EEEF2594896CF693F2718EF952845FB7955F516D5DA76322E47E0D8716BD4F15397D4A6AD9D6AE9F276CFA62EA5D976F7FE5349CBE799FAB7BBC67A975F9B9F2C6973911DB3D5250FDA3228E5F3AE6729CF414ABF5878529FE859FACD9D52E5F374E473532F0E685F91918DDEF1AD2DC7BDF7DDD5DEB645D9DF09F270E29B92EBA2248711CCC7C27C2CD95AAF867165DAA7DBD453431A547374BC9231E9C0576735A7CFAD6FD37A47D3DEF750799D868C5323234B93F687CBA5FD9C603C19D737E0F7FE79FE9ED1F3F1FE9B5C8C63B03D99EFBBD9DEB69F9BDF881CC7F7044E97EF494A82209F93CFB3C1E7DB5B4F68DF9D679F5B12C7D91BB71C556B371CD13EBD7F7AFC73CB9FB75ACBF4685B33BB558D9BB036697F38F1DFCB453E16976FB57D9EDF355C7EEE7E3EF4A5ECC39668DD816BFD40A2D87C2E7F7857DCBE74F85CE21AB9DE33F0ABD8BA613F177F38739E3BE9C34DDEFB6EB6B7FDDBCC6F44EA5F7AA5C9F359219F137E7CDE7B54A381C96971D9038D313E43493E2F1D7DBBC822EB3777C48D4918CBA01B844FAFA967175D3CDA631F6D2073E44ADF9E4A3C99446BCAC5169FEC9A75C65CFD2EA1AF61906DDCB5BE2D68BDA14BBF9E4C1F24D2B7077D0B226FCB36EA757CEC28A7A35CBFA943BFEFAEF6D2566471F9464CBB144AEADB093F7CBF0CFCFD5D1C4C4EFF7E598CA76E9D125177CD8AA8DF5545D475FD23EAB6A911754F5D44FD6C700CD8165E37F7C9E7C52D9F17A23F9CDFDAE7205F2DBF3C297E765A174F95B2CD3CC88EEE9A1B255A43EEE7F3E66777F7F39DA33F1C91ADF8AA61C0038DFBBAF179ACAE8BA3C0E9D8FE8FC9912BF27CD731B39D6C83CFEFAC219F97B2FD7C6FFB19B56BCFD7DA7E0E5963F49815BA1EB167DE7C6BB5DE7EF0E13AB578E98138B9DEF6099A3173879A377F91EA55F6A87AEDCD5569C59F257712D9B09F278A65E4673FC731C4544AC57E6EDACA11AB49F4EBF3E6EF56E72E7E4B1E0DB98FB9FD1E601C44FFC306698F75E22B2136497907CCBE977749C6D5607D7B3C6C8E12884E1DB23764F56167BB8E61DBD4BBCB3EF9BC34EDE7873ACEEB3149ECE752FFFC8BCBD4AA7587F5F6DF5D3541C7CD326DEBBBF79F8EFB2E063FDD70C57EFE6BBD1E77C0A0677BCC7EEED2C3666A3FF76B4704DBCF5D31DDD2B19FDBFD92A9FD5C05C4C4F4B39FE318DEDD54ECE7A6AD1C5C80BA27062C500D4BF691330B80CFCDF7007E107BA2E31A6C2D889769C7D0C471F84B98F290BC1FD2F712A340C655DACFC9E7B9B49FC3CF0DB1ACC47E2EB207D6AE99E7C27E6EBEDB626734E7B91DC72E7873DCE1236B33CA7F9E6BFB39E3B6A76F3FF7CB179FACFDDC8CFDE3A77F4FD57EEEF7EE05D9CF0F1D3DEFD9BA93B59F9BB672B33DB677EF3B45DE2C10F9DCDC461F22CEB5BD6E176327385AD634CA75ECBE17FF618CABB9B29F0F6C8FA8C75A22EA9A7EE473DACF0BCB7EEEB285676A3F77AD732792B39FBBD6F4A76A3F37E307D17E4E94AAFD5CE4EC74ECE73FBC29A29E3B4F3E2FE57C2C5242BF04997CECDBABB55C81D8AEAF8C59E1C57B7DE5D51557F44D93BD39A91D4313F1327B9555A831AFAFBC22A367E6DFEE978FC5250FBAFCA45DF29E9F0C6E9F47F9DC5FDE76E5B1F17B967EFA79FBFAE9E46571C9E789E21F04E56341AC25E43880EDC9FE56FCF2ACBCF6C64AB57ADD61AFBCF7BE59DEB7216DF0EDC86F892E803160F30FFB3D40DFF47B68AEEE7FC4EF37C748F4BBE4DE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4C7B0BDFA42E37F5727319FB05C45EFB7938623B8339A6990F44E71259CB7D442C1DFA5D62ECE41BFB52555B7C89C104738CCF68B79F872ADF64A0E3C204B38FDE0FF7CDCC2BA3EFA9DBF1CFBDFD671D6BECECAF86FC58BEF2C9CC58D7A0F36061FB40C6E13279FEEAF8A2FCF3C50E3BBEFD3BFB6AE4BFFFB644FDC6F86AEB2D1E7FF7609D07CF5F689FB618DF66C7C183E3887DFBBF5FB9A262E7B00FE3E1A878E439A69ADD661DD8AC77A7C7690EB778E079A06309C424CF97F3815C7DF77D150B15C8FE7D8E73CE4FCF7AF445D1EF6130E32E8693E77A6C9750F03C505F4130FB38DBBFD71A0FE7ED3D08341E0EE33AB75CCC92AE6B453EDF3D6FFD9922E56F27CBA95817C6820D861F947B9E6F32DA8D9DB9B2DD300763F6FA6351ACF0DCCC07323336E92A1F88AF76552C838D8F7C32F0B7633C6CB7C78B06CF9D39D2827D8FDC8C05B1D67D42C5736F63D2E9FA9799EFB5E083AD7273786C55BBA2F0C38F544C7BFF8D6A9FF5B5A5B13AC8558A0AA48C63DF9EB5F5E1751367E5CB3EF7C6F278E17928E3A4B00CB911E7A666D4F86AAD59D9CA768B559E8762FCF460C66C753B1E94AF773050BB3E9AF1701C8B9CA2C8F358F7B73F1AFBCAD7F3E8F1883B42DE0E675CD06A63827B1B63345CF6B96DA777F7494F4999D4A59D52FDCF275DE4EF76FADB61DF41CDE73395ED36333A11933CD77DB676AC71FC01DD9E1D089B71CE607D0318470D32C767F1178B10E978B8ACF4729BE3A6C0F477DF2F96E73664CA0B2F5E96BDFB6BAD6B2B9723C79A24BF6080E5129514DAB4F96325671F1E4FBEF47B7CA7BC6FE1E3B98E29765BBF72C620E918457F6DCA81F239189E237E0DD7833C3268332DDEF13B39F7939FAAFC706BB98FB19E4F2694EDE7918A8773B607618AF770B5B152BDF53FF7F59F75DB8B8E8743CEDF19239FAFB77CAFD8077171D3832332D2DCAA72067BB3CFD396FB8E81E7C813BA6D7B99BCF0528EF51F72C9732A41DBC6CB57F5CF79FB367DC5BC30D746E4E2E182894172C3DE48F07CBEBE5195CF53DBB64BEFF32FDAEAF9C5F3B26095CFB1CE73DD772D580EC71BCFD7DA7EAEEB31BEDE1F1D175775E0901AEBD65FCE5F9D1F0EED2B3A6730FDED14F547D763C27B2B0B9C651F736D848FE7666C9C1B7FFBAF377F2C978CFE856EC716CA0E30574B20DB079A4FA6388AF964747DD6390689190381EDE03F778EEDED9C267B1BDD6A7518DD674D8F7FDE9177D56FCE5FECD375AD50B5AFE89CC1FEE2DB292A99EDF340E3DB990B33BC3C37DB2CDDD8E7FEF27D4453BE629DDCC63C05CA497D1F8A5CE5925DE98BF2C6731D9306BFB333AE514FD7DA4E9E8831371445455766FC522F991D359EFB8F87EB8F8FFA55B8F2C375F7C948739BF2199879EB02B197DDE48733976BBF9533C77BACE49223CF298A72FAB75066A27C24CFE3231E6EB563465B60ED8DFD07545B696FE9751513B796FBA8E3EBEEDE7B28CDE72F4AF9175FDAF98FD6C2738A3CA7A844B4CF35D3C9F3F8E8AFB623E5B49C74B49FBB5524788EF1B1EA4E9C94A6B3E7A5E8A31D01FBEB3DE2EBA66757F88F82ED7F877B8BFEFC10DFD9F0F01CCF44CBB413F432B35FA5B9AD96F318BCDF1445C59B7D1E88BF7DB598E258C90F13AA7C32667EB8D9F12959B8757B4D1C22CFC3CF733DCE0372BD9AFDD175BD4C73DDDB987D588FFD2255FFA4288A8A667F35B3BD3DD178FEB5D13F59E7879BB458DE5F512513DDBD323B311D720E5D2D1C9082E241493D582FFB0FD449DEB57E3974A45132B3BB557E12F46FE63BEEDEDFAEFD28BA7F84698F3BD96DFA06F572731DEF7774D5DE35ABBE0B7C13F8162AAA46D514CB787F28F27CF57DB2D26B65E7E693B237A5D443EFACDF1992588958BF8FC58E6B447FA7F18E6E196E6C915B33F36BF2C19AB9734D7DBEBB455E7A394F7EF9FC55F9EDB60AABBCAA927FF8C70BB26973A11296FB1A27C714FAC3B9D9CEFF714A82D8A72CC87305BE1FFAC4F87BCF9C7E779611F15AAEB54853EBB49AA6FCBE523EFEEC869A47CE1EDE1F8A3C5F7D1F6DAF98E3D7866A8CDA78E07934E2FCA6E7EE4B59C588B2C36177A0BCD2B67920F679A8F22806739C60CF1DEADC8FCEB119F5F88D2C23E2D73EBF78A96BC53741FB9C22CF03E7B9EE9B459E472B87C350C4D918CF3C77B68793E7899ADB24B96315EFFAC9734891E791E89B18EBF7312B86AE51E7165DADECD2B9E6969EF3DAD8F828A74DBBCB3235F873EBFD76A4E4F3FBA5026CB79AF7C8A11F4FEA1F1890F9DB77E5E0EE9DD2D2DC28E5A585B270F7BE8C8C8ECAECFC82CCDE5A94FC9C8B4BDFD7B55C356D6CA8955B77EEC9B52B97ECE37474B44B5ECE05E9ECEA90C1A121B9515162EF575D552ED91733D494EF0B799ECC3C8F956BF43696D7EA65DCD09A79FE28B76CBBCB72F5510E9C70D9E72AFF6A41B1CAD90A615EE7F4E1779FDC2C8FC7B1E8A76766A5B5B559713B27F3B4E26E73538362F7D8C4525C485B5B8BDC79F0B5F4F4F6A8ED47C6C6A4B3B343BABBBBD4FABEFE3EE9B2385E9077494E1DD9232D2D4D72BDB4402DBB393BA76CF7FFB5E1EF69C393E7E4790C5C23CA285D5E61BCAED5CA2E9D0376290F6CFCF8DBB57DBE69F32157FE738CA90281E33AA70FE3CF9397E5E677116F767AE1D5CBB6FD0D9ECF2FDE512CD63C9FBDB520E7338EC9F8E4948C8E8FCBD4CD19C5F36D6FBF24B7EF3F7CE44B3C774AED03D5D7554B7B7BAB2CDE7BA0D6BDB2F129BE33E439791E63D7E8AFAC32F3C2C613CFB56DEFC63ED763AA4098C77233471F959C71EFF17AEDF0B19B7E7193E7BD964DDED4582F9515256A9BAACA32C9BD744EAE649FB7ECF16CB50CB63BA619275295AD0F152FFBE6B5C873F29C3C8F3F9E87E3DA1B22985BC0CD7E0F96FB9B3D58A5DF593C97EF5472F15CB31A5327CF17EEDC577EF6B443BB657874544A0AF3A47FA05F6E5494CADD07DF2CF5A19D9A968EF636B970FA84F4F5F74B4F4FB7B2CF4F1DDD6B1D63823C27CFC9F318BDC6ACF4F2A4E7B9CEC1BBDAF878F11A1F4579EF9BE04FA736BF1B97FF717C7252523FDFAE985C5C7045F11CBCAEBE512E43C3C3CA5F8E697EEE4515E7D6D2D22805F9D972E9C2571EBEF6B985456593A32E00CEC3E6D7BE76B4B31F3FF0594CFD6F334F63247429E540588E1BA95C16E479625E6320D7439E3F8A1D449F7DE4DAC3EFD3E7DAED1C24CCB59718DF5E3CC74E9C38F8853DAF19AD6D6FD3865FB8734FF11ACCC7BC5E8765685787CDBEF7930F65607040D9F6E0BBF338C95AAE86A2ED51E50B4DD9E5912FF4EB08B5F191E789EA6F4F6C9E83B3DEEAC16986BE5ECE7D806FA9D8635DB9D7F828F01CEC86907BE48D37AFAAE50B77BF615EB104C9FD10CF3C6F6B6DB66D695F420C3BE2D397FAB28DF9DC0E6DEDFE8E459E07A981219BE798EA79F29C3C0FC573D5B9514E3FFD8C54EE4B55B9E5F7FCE99FC9FE75EB429A6F3CD23C0FA57DAEFBF521AF587EC18034B5DDF4E82F80E56427794E253ACFBBD87E4E9EC7BC7D8E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FD53A01307BF58F19FD147A67679FBB98545E5D733EB1614794E9E8757F8EEFBFAFA6CBB00F6F7C8D898FA36BD6DAFBF7908F57E3D9F9379C69E47B9A4ED13B38D7E7A664ED9246867C7B9B0BCA1BE86CF814A48690E23D664C1E2BBC95D6D5B17E4655B76F994EAEB899813F405411F10701EB635FC62278FEC517D4731BFE7F75B553B567D5DB5CDF3E3073E57F5848B67D3D414B1A793C6F757717D2916063E32D433C0656C67DAD7F896D10ED668D5C3F17DE2DCFDD6F9BCFD1F5F3C87060607553DBFCEBA7EBE03E439794E51542208362F7CE8F04D83AF26CFC172D46D91D7016C457D1771A685572FAB3AB3C943E47AB8393BAFE6D1D6A539AEEA04561D003C86AF1CBC1E1E1D595117CF3A7F4AF9D7E0ABAFABBD215595D7A530FFB2C736F0C9A12EAFD5D6DEE2E1A3D3F1333ADF84C973FC17B4D7E97DD1CE86B605CCA30F2AFDEDE439794E51543CCBECFF89790F9E5B1C460C2AFA6C221713F23180E7E0B2D9668EB675B46D81F710FA9F80F760368E81362E6CA7635BD08E8D3EA13A77848E7F81FF1C2CD6F5046C837896A5BAC1ED253F9D658F6BC1FED73C475D6289D39FA9E3637EFF671F293F1EDA0A9CFF3B27EB8C07EBF92E90E7E4394551F1DC8E05F681BDE5A585AAFDD9E96FD7CC6F6E6E905B77EE59F673B1DCB0ECD98E8E367B3DD88E6DF46F30196CBE39774B31BB20EF925A0E4EEBB632F805D09E05BB5DF31CEDEAB826DD0E86E3224F848AD9B3A69DEAF712CB114FD3D050EB9163421F47FB059CFEF6A1E161754C083C47BD03FF0331378801E03B419E93E71445C5673CDC03C573F8A8E16FD6FD35950DBDDC2E0D1F3CDAAA116F82FCC768F7AE523C6FF7E0397CDFDA978D635E3A9F6EAF1F59F673A38D1CFE76B01CF1A665C5D754DE661DF3A2F707AB11230786572CC7C3A93E2ABD3D2A3E1EDB5CBE785AF90E4C1B1F1C4F3FB64FF9E5317F78EFEFD514FFD3FCDFB806C4B9575594D9B63DDF07F29C3CA7282A9E8518379D5BD1E73616D3BB97634361C73BD783F3B07DC151087E7967AC1962C8618FEB1839B4CB7B3B17F80CDF3D62E2F46F8F76F673A7545CDCECFC82879F1CF366DBBA564D7585F20798D7A1FBCC21CE156DF67C0FC873F29CA2288AA2C8738AA2288AA2C8738AA2288AA2C8F364D1D5C20129281E94D483F5B2FF409DF5AC5AE4D09146C9CCEE961D29E572F94A6FD8CEDDDE35ABCE9B77AD5F9DABA26A544DB1CCDFBEB82E7DBDA7CFB5AB69B8AF97A2288A3C27CF63559DBD73F2DB6DA572E458931298F8C69B57151F212C0BDFBBD4224DADD36A9AF2FB4AF9F8B31BAECF198DEBA5288A22CFC9F358D5C2DD6F6464E28EB295F30B06A4A9EDA692B677B13C9CE7C6398BCA86EC7342A85FB8B1EDF5F5627FF29CA2288A3CA7BCDBCE50CF4064FB9EE27CFADC81EEABB98E299F21455114799ECC32791A69A6AFE5DCCEFDC8748AA228F29C76798BED6F8F14D34D969BE77563A7FBBA66329DA2288A3CA7FE1894CF3BDAE78DD63553542C09F125E837823A2D54D738A9BE8D70C6C350E439459E93E714155A99FD3F5E7B3D9FF1A214794E9E47E5BC59E9E5E43945AD41C8C3803C0E3979BD762E09E667A0C8F3E47BBE505159B93444F8B9E19C3D0343B277F39600DBDE876493B5CF8E945D11BF668A8A2731A68422CF93ED9B5FE26AA4D98873AEB51E419E53546CF541A5C8732AFA8A161BC9738A0ABD5D1E8D3EA814794EC586B2D22BE3EEBCD1BA668A8A0796B33F27459E27EBB36E8FBBF346EB9A298A31AE14794E91E7E4394591E714791E58DB6ABC883C27CF29CA8D4A96FB75B8D1A59454DE332A6178CE3834F29CA292356E95F1A214794E9E93E714459E53E479ACF37C6AB9AF7534856B08F49B4B4BEF0FAB366D2E0BFB39BC9FB724A2FBF60CDCE6B74D91E714799E003C8FF63BEE6C330F84E77C2743F14EF33E52E439459E93E7E439794E51E439459E93E7B1C973E45D454EF49E81C8E69CC079577B97FCBD9B3AF73C794E258B7A0378DFC9738A3C4F3E9E83E35A91BC17FA7CC19C17EFD993EB9FA27D4EB14C26CF29F29C3C77D8E791BE17E038ED738A22CF29F23C19790E7E39E5E4A25E8E314535EFCCED9DC7D6DB45C33E5F0BCF510721CF2996C9E439459EC702CF8BAD798C01AE97A34FB577F5A8EDB51DAD6D53ED7336ED55CD674CB14C7313FB7A7B3EBA1D3B1A3CF755C708579B3F794EC5ABBEB6DEF73EEB3B7DE8B20C23CF29F27C755DC8EA92AD1F96CABBEF17CB731B322DA6E4CA8B2FE5C89E7DB56A3EF5607D403C077321B71C72B6396BBB5A3351CF6B869BBFCDED42E1BB8EF6BB497F3B954CD21C2FB3EAF05D05C5D2969D23E59FEF56E549E3E9B332D937489E5341F17CC3CF364ABEF54E251BCF074616E5CCF90EC56DA543F5B2755BA96279303C776B9F863B1E2E9E586EFA14180F47251BCF9B2C9EA30CA93E74448E3FFE849AEFAFACA67D4EAD2AF833BFDCBBDF2BB3FFEDB7BE25F54D2DF4B77B3066C8D575359043EC7F4E5141F2BC2F6597DCB9FB4026BA7A65B4B543F561EBBC5A280B730B8EF26884F78DB285B6D9DF7FF299CF58A405EB9D22CF1FB11CE313FA633A794E9E53D45A78DE6895BDDD8525CAE73EB54AFC08C737A09CF679BB550764FBB93B966BADC674F23C747DE59D7103E1BC8F0FACF37C6DD9450F97E3914C3D08615B05DE9FA73296F4DD8375F2DFDE2D94FFF0FC25F993A732E43FBE982D7FB1AD44FEC7F652F51BEBFE2AA55C4DFF7C6BB1BD9FDE564D5FBA6CFFFEEB5DE5B26E4BAEFAFDD3AF5AAC7B36CF772A0C82BDAC6D674C21F077A4B935243C2FFC37FF56DA73F3A4E562965C7DF73D9F4C27CF635F771FFE6169FAE01B253DCF78B8E8F0DCE4F88E94727BDE5759499E87260ECE291DCBFFED75EBFCD451CBBCF61F806FD2396E4EB171FC52AB6EEB2BAEB864F9DC69CBFBAC65AC9E9D9B0FC87B7FFCA32DB0FAC7D7FA14A79F3CD124CF16F5CBA6EE19F5FBADC507F272EFACFCB26942FED51369F63E7ADB3FFFA058B60CCDDBBFDF98B92BFF74A15DFDC6769BC9F4B0F66141DB36DAB8317F61E3CFD75C4EA33E095F7B8175ACAE6B85D2997F4D06AA6B7D6EBF23A5DE1E8768474A8BFDAE42D9D6FB8C7A00A6A87FE01AF53A53C9F2CCEE3CF85AB22F6648FFC052395B5D55AE7E2FDCB9278BF71E486951BE54555E57CFF0E6DCBC5A070D0C0CACF8AD7C280DB5D2DCDCE0718EB1898915E7ADAC28914BE7D3A5AFAF4FCE9E3A2CA3E3E37274FF274BB15A83D6B167E756EC535F572D372A4AC9F330B79F83E36C3F8F4C1C9C992BD6EC9BE72F2F8E791F75FCBFD9BF006518E286CDD8E1A633E764C1B2ADBCD9E65A281BB17DE5BEFDF6187EC1BE4326CF7F64B1FC1DAB0C816DFDFDC3F5B2B166D4B6C39F6F9E945F344EC88FAEF6C913BBABEC7DF4B6FFDDB2D97F7663C4FEFD4C5E8F6CAC5EDA7F73F910591EC6B2073639DE07BC47F08B177EF851D8FB9F6B6E3B196EBEF778BFC16F5F3CC76F4CF5EF647A6E3516C3C16E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AE72EF7EE577C7712AF6EC8B599EC347AEC75D5DCB71FEC5638F05DC7E1EEC7971CDDF5EB7CE8EA7DB61B46147B3FDBCDE4F9F8C5E9681541CF05CC72AAFE0F9725CA88E7F4A86FB087BAC618D713166598371EA751966B60FC632CF719D8FE295FCD747BCF94F711F7D957FFEDED560DEE5B33F7E76A91D7CC7EF24F397CFABF674E4861B69694BE87C32DAD65D6BFB79A4FDED3ABE5DB31CBFFDB5C59BFD04CCB677F3BDD1F9DB318F1C7FDA5EF115DFFEF5F2185A68A3C13E88BD58985FF4D93E4ED650F1E06F37DB73E1534DD6FBE82B46CB5BF917482C94B3BC8C759EEBFFE686E7DE8EB9DAFB180E9EC396C61476B5961A4F25EF6A42F33C54F67930FDD502AD0338AF59DBE76EFBED39DF39E7F6663C9C47AE5F3FFE76333F5C5FC50D9FE3EF90E754BCF07C474A8BC19EE4CD4FE9B6BF72A0B1CDCEF2279679EED99FC81DCF9DF722D23C8FD7FC70E6D8DFE63666DF6EE691F36E9F3BEF87190F1748AE5F333FDCF4D088F4945E27CFA9B8E6B9C972B03D99EDF350C6F4986579A2B69F6FDAFCB19CF4D2561E8EDC71B1921FEED2F2FFD5D35EF53E049E1FCEBC3693E3DA0FADFDDAC1DAC2CC0FB7F69C6FE0B8531C0B850AA77CC51EB969E335190EBFFBA6CD55CB31CC5DF636C867B996B237989C5FD1D03458E3F25E5EF2B19DB7F6F3B415F9C56297E7665D25D8F6F368D4C3D612BFEC2D3F1CE2EB90230EDF16DEDF290FFF4A866BBBDE5F7E387DEFF4BC66B8F93B16EE7132F2DC17D3C91C2AD6ED7348F7474AD6FE743A7626543EDA47FDCDE3C73E0F341E2E166C47B47FD6A59D929A23C764767C4AE6266F067DBF30EE39187EF7DE4319A8AE931BFB52559EB812C3776FF2365639449E8796E99B36E792E514E3E1E288E76EE3E10229CBBDDDCF44F2B7EF4839EDD5DFAEFBAD45E2B91D7FFC0919EFE8567964066BEA65A4B92DE07A9C9EC7B8E790EEEB60B611F40699072599634C23C1733C2BDDA7C29CEA79FDECB4F43EE6BECE798A8A479EEB32379CEF71B2E6BBC94AAF95BD29A5F2CEFA9D71931F2E98FE6ABE62A323F5DC719E5BB3B7ECFCEDAEDE6523EED98CA773E687F3D57F29100E85FB79273BCFFD8DCD976DC447601BCD78735F2CC3BA03EF9F90D483F59277AD5F0E1D6994CCEC6EEBFD2E97CB577AF91CA898E7B91E6B229C656FB2F21CFF3BD831C3A2699F07920FC78C878FA7E7EEABCDDD991F2EE7B5D7E3D64F9C4CF6B999C708651A966976EBFCFBCE3C47D877D7638FA979EC83756F7EF71D696A9D56BEF537DEBC6AB7991F39D6C4E740C53CCF75AC0F791E7AE1DEEA78AA78E5B937B9ED03112FCFBDD8477E38FC1EEFEC09495FD070093197D138CE8E94FA359C2BF07D23E5E368EF9A95FC8201D566DED476D3E639969335543CB49F27FBF5259E2D131A9E9B6D8E66DBA3DB76E47879EED188E7CBCEED958C33EDCAB78B7930E3F4B976DB1674CB0FC43084E61EB48775FB705CB3B30FA4F98E5254A2F1DC2C87CD7623675C8819B7A4D76B5FB13EB6D92619E877439EC727CFF57333DB1F03799EE4B96F81E325E5C38ADDBFDD56AADA68B57F77E1EE37AE63A9C9F33FAE183780650095883C376341D03EA4396CE6297732DE3906815996EB6D02F51F93E789619F93E7A1D3B5A201C56D701DB1563979BD8AEDE07AA4EC7333CFAADBE3E8BE1DB1669F6B9B85650D950CF6B9E6B237DFA9B9BFB73E474E7B3C509F16BFB1F8E479B2B4B3C4D275F60CCC2BF97BBE3AA7DC5AD8883846E4AD0BE4383AD7FBA6CD8702EC135B6EE4BA6BF7FB3CD05761F1D66D196DED58537F418A4A149E87330E2790B85DF29C3C27CFDDB1DC4D0E329D376E292F6C7CF8DBCD5C776E785E7DE888F22922B7006C8AE60B99765F1C8A4A569E47A3FF08794E9E93E7C1B3DC1FD3CD71C9E2A9FDFCD1F833FE79DE969DA3FA1A947FBEDB8EDFD1FDCEF88D53E439794E9E93E7B1789D26CB755E512D7FBEF7505D7BA0C759CB79DDECEB265723F3AF52E4F9EA7D64DDF62D26CFC973F23C1CCFAE252AD71E6B3C7FB8CAB879E6BD22D329F2DCF776C1EC13C8F5B989F7A1C873F29C3C77CB73E47ED17DFCDA3A67D47472E69E9A22370CD6B15CA0C8F3D0F35C7F839D3D7332B7F8507D6FB7EFFF417D877C96E439799E9BF03C3F99B2FA78F6C5CB39F5755EFD340FAD1C8F5CB751204F2BFAF27FFA45956CDF79DDCECD431B9E8A2765A5573AC6345FD2A6CD25865D7CDB55FECED5F2539A3917376D2EF37ACEA2B2112F6385A7AEF8F62AABC7E4AB336D722CAD59EA9BA62437BF4FA6E7EEF37992E749CEF38C15D7D65550ACE2C3101BE6CC9B128F3C77C3D740ED73F4D7BF78A94BF5E5D763A840E8DFCF5CAD546294EBB1619F3BBFC18F765C9792EBC3B2EB934A3978B8414E9C5CF28F5D2B1AE47323CFC973C7B5E9FE5BE8BB85F9C19ABA15E38A242BCFC1727EF314791E1D9E53E479ACA938401F7738D5E7B867E89F75E7EE03955F05B95574DF2DD3FF152F3CD771FCB09B43E103671C0E459E7BEB173A19709E18F23C3E798E7C60692BDA249796272BCF63A17DD5DBF8AD58863ED8A32D6D3EC74C88759E1F3FD9ACA6F08397558CB81A47BCF6D809999B9E55FF77767C4A166EDDE6774DB15C8F91FEE75464B59437CC3BB3699FC720CF2D7BDBDB58ECE0B962DBD48C9C7F6E833D267B3CF1FCDCC54E151783F898968E9BEAB7BF7D6A0E1F95DEEB15AA4DE1DEC33FC8F4D028BF6B8A3C27CF699FD3DFBE6A2C9533874BB47DB84E7F3BEC7308E3B1EB31D9E389E7E038C681457C4CEAA17A57EDDDCDE72F4A7761890CD537CA505D834CF60EF0BBA6E25ECE76325F2A4EBFE237BE5D33D85F2EF6D5E2E0B1CE5F7C3B62EDDD5CB3731C373E6FF23CD2025B4CAEC7426C555A04E3D2A2150F4751C92C37B90FD76A437B63B667ECC96D8F756BB1CFB52F514F1F90E7E47994991E2B71D2E4394525B61E06F9ED04C35CC4C6F9627AA8FCEDE6FF79C872813C8F01A6C7CEB3CB0DD8BF459E53541C696028623C8FC8B1CDFF63CDD33E27CFC3DEC7BC794AEA1A27553EC2BC6BFD8AE11096C13E8F959C23D18ACD23CF298AF17014791E0F65FE85AC2ED9FA61A9BCFB7EB13CB72153C5C0BDF8528EECD957ABE691478C3C27CF298A3CA7C8F3D82EF3074616E5CCF90EC56DA543F5B2755BA96279B2F01C71A70B730B32D1D3AF9E0DC613F7963756F5FB9E989691E6368F6D567BB6E6B1B13DF623F3298A3CA7C8F36494196F1F8E7E73677FFCAC9A4E74F74AF9175F2A39F3C6A28F18B6BB7BEFA1EA37666EE3EBD9621F6C837D06AAEBE4C6BE5429DAB65DF6AF5BC7E74A512112E2DA766E3E297B534AE59DF53B1583310FADD677CD8DDCC4CC51E4399F877721C7CAABAFE7ABF10B0E1D6950630C621EEDFBC8A3168E73CE4FCFDACF45E7A5F1165737BF9C9B4DF723D5EBCD5C36CE678B7D74FF5A6DAF07D21795B95B29CABFD2D73FE5F13D8632269622CFC9F3E0B57B4F8D1A33186DFB474F34C9F0D86DF9707B99F40DDD0AA0CE3E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Materials|ReportField=VariantName~None|ReportField=Address1~|ReportField=Address2~|ReportField=Address3~|ReportField=Address4~|ReportField=Application_BuildNumber~|ReportField=ApprovedBy~|ReportField=Author~|ReportField=CheckedBy~|ReportField=CompanyName~|ReportField=CurrentDate~2025/10/11|ReportField=CurrentTime~15:18:12|ReportField=Date~|ReportField=DocumentFullPathAndName~C:\Users\g\Desktop\熔融流体速率仪\6.硬件设计\1.电控主板\熔体流速仪\MAIN.SchDoc|ReportField=DocumentName~MAIN.SchDoc|ReportField=DocumentNumber~|ReportField=DrawnBy~|ReportField=Engineer~|ReportField=ImagePath~|ReportField=ModifiedDate~2025/10/11|ReportField=Organization~|ReportField=ProjectName~熔体流速仪.PrjPcb|ReportField=Revision~|ReportField=Rule~|ReportField=SheetNumber~|ReportField=SheetTotal~|ReportField=Time~|ReportField=Title~|ReportField=DataSourceFileName~熔体流速仪.PrjPcb|ReportField=DataSourceFullPath~C:\Users\g\Desktop\熔融流体速率仪\6.硬件设计\1.电控主板\熔体流速仪\熔体流速仪.PrjPcb +1|TestPoint||1, 2, A1, GND1, V3|Test_Point|TestPoint_1|5 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WT||CN1|CONN-SMD_10P-P2.00_2.0-10P-WT|2.0-10P WT|1 +21|ZX-XH2.54-3PZZ||CN2, CN3, CN4, CN11, CN12|CONN-TH_3P-P2.54_2501S-3P|ZX-XH2.54-3PZZ|5 +22|ZX-XH2.54-4PZZ||CN5, CN6, CN?|CONN-TH_4P-P2.50_4PIN|ZX-XH2.54-4PZZ|3 +23|ZX-XH2.54-2PZZ||CN7, CN8|CONN-TH_2P-P2.50_HX25003-2A|ZX-XH2.54-2PZZ|2 +24|VH3.96-2P ZZ||CN9, CN10|CONN-TH_2P-P3.96_C9900035759|VH3.96-2P ZZ|2 +25|ORG_LED|Typical RED GaAs LED|D1, D2|D0805|LED1|2 +26|1N4007||D3, D4, D7|SMA_L4.3-W2.5-LS5.0-RD|1N4007|3 +27|SMBJ24CA||D5|SMB_L4.6-W3.6-LS5.4-BI|SMBJ24CA|1 +28|SS54||D6|SMB_L4.6-W3.6-LS5.3-RD|SS54|1 +29|HDL10S||D8|MBLS_L4.7-W3.8-P2.40-LS6.7-BL|HDL10S|1 +30|100uF|容值:100uF;精度:±20%;额定电压:16V;纹波电流:-;等效串联电阻:-;|E1, E2|CAP-TH_BD6.3-P2.50-D0.6-FD|KS107M016D07RR0VH2FP0|2 +31|MHCC10040-150M-R7|Inductor|L1|IND-SMD_L11.6-W10.1|Inductor|1 +32|DBT50G-9.5-2P-BK-P OGC||P2, P4, P6|CONN-TH_2P-P9.50_DBT50G-9.5-2P|DBT50G-9.5-2P-BK-P OGC|3 +33|15.5*10.5*21||P3, P5|SINK-TH_L15.0-W10.5-H21.0|15.5*10.5*21|2 +34|AO3400A||Q1, Q2, Q4, Q6|SOT-23-3_L2.9-W1.3-P1.90-LS2.4-BR|AO3400A|4 +35|BTA24-800BWRG||Q3, Q5|TO-220-3_L10.0-W4.5-P2.54-L|BTA24-800BWRG|2 +36|100R|Resister|R1, R2, R3, R4, R7, R8, R24, R31, R43, R55, R69|EIA0603|RES1|11 +37|2K2|Resister|R5, R6|EIA0603|RES1|2 +38|10K|Resister|R9, R10, R11, R12, R13, R18, R20, R29, R36, R42, R59|EIA0603|RES1|11 +39|0.1R|Resister|R14, R16|EIA1206|RES1|2 +40|300R|Resister|R15|EIA0603|RES1|1 +41|100K|Resister|R17, R25, R34|EIA0603|RES1|3 +42|3.3K|Resister|R19, R21|EIA0603|RES1|2 +43|1K|Resister|R22, R23, R53, R67, R?|EIA0603|RES1|5 +44|10K/1%|Resister|R26|EIA0603|RES1|1 +45|1.74K/1%|Resister|R27|EIA0603|RES1|1 +46|0R|Resister|R28, R71|EIA0603|RES1|2 +47|1.65K 0.1% 5ppm|Resister|R30, R48|EIA0603|RES1|2 +48|4.99K|Resister|R32, R33, R35, R37, R51, R52, R58, R60|EIA0603|RES1|8 +49|47R|Resister|R38, R39, R40, R41, R61, R62, R63, R66|EIA0603|RES1|8 +50|150K|Resister|R44, R45, R46, R47|EIA1206|RES1|4 +51|510R|Resister|R49, R50, R64, R65|EIA1206|RES1|4 +52|360R|Resister|R54, R68|R2512|RES1|2 +53|51K|Resister|R57, R70|EIA0603|RES1|2 +54|HF32F-G/005-HS||RLY1|RELAY-TH_HF32F-X-HXXXX-XXX|HF32F-G/005-HS|1 +55|KH-6X6X5H-STM||SW1, SW2|SW-SMD_4P-L6.0-W6.0-P4.50-LS9.0_H5.0|KH-6X6X5H-STM|2 +56|MAX232AESE+|+5V Powered RS-232 Driver/Receiver|U1|SOIC16N_N|MAX232CPE|1 +57|74HC14D||U2|SOIC-14_L8.7-W3.9-P1.27-LS6.0-BL|74HC14D|1 +58|STM32F401RCT6||U3|LQFP-64_L10.0-W10.0-P0.50-LS12.0-BL|STM32F401RCT6|1 +59|TMC2209-LA||U4|QFN28|TMC2209-LA|1 +60|RT8279GSP||U5|SOP-8_L4.9-W3.9-P1.27-LS6.0-BL-EP|RT8289GSP|1 +61|L78M05ABDT-TR||U6|TO-252-2_L6.5-W6.1-P4.58-LS10.0-TL|L78M05ABDT-TR|1 +62|AMS1117-3.3||U7|SOT-223-3_L6.5-W3.4-P2.30-LS7.0-BR|AMS1117-3.3|1 +63|TPS7A2033PDBVR||U8|SOT-23-5_L2.9-W1.6-P0.95-LS2.8-BR|TPS7A2033PDBVR|1 +64|ADS1220IPWR||U9, U13|TSSOP-16_L5.0-W4.4-P0.65-LS6.4-BL|ADS1220IPWR|2 +65|LTV-1008-TP1-G||U10|SOP-4_L7.5-W3.8-P2.54-LS10.2-TL|LTV-1008-TP1-G|1 +66|MOC3063SR2M||U11, U14|SOP-6_L8.5-W6.4-P2.54-LS9.2-BL|MOC3063SR2M|2 +67|SD05C||V1, V2|SOD-323|ESD|2 +68|32.768KHz|Crystal|X1|OSC-SMD_L3.2-W1.5|XTAL-HC49/S|1 +69|8M|Crystal|X2|LC-SMD-5032_2P|XTAL-HC49/S|1 diff --git a/熔体流速仪.OutJob b/熔体流速仪.OutJob new file mode 100644 index 0000000..a5bd328 --- /dev/null +++ b/熔体流速仪.OutJob @@ -0,0 +1,146 @@ +[OutputJobFile] +Version=1.0 + +[OutputGroup1] +Name= +Description= +TargetOutputMedium=PDF +VariantName=[No Variations] +VariantScope=0 +CurrentConfigurationName= +TargetPrinter=Virtual Printer +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium1=Print Job +OutputMedium1_Type=Printer +OutputMedium1_Printer= +OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium2=PDF +OutputMedium2_Type=Publish +OutputMedium3=Folder Structure +OutputMedium3_Type=GeneratedFiles +OutputMedium4=Video +OutputMedium4_Type=Multimedia +OutputType1=Schematic Print +OutputName1=Schematic Prints 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+TimestampFolder3=0 +UseOutputName3=0 +OpenODBOutput3=0 +OpenGerberOutput3=0 +OpenNCDrillOutput3=0 +OpenIPCOutput3=0 +EnableReload3=0 +RelativeOutputPath4= +OpenOutputs4=1 + diff --git a/熔体流速仪.PrjPcb b/熔体流速仪.PrjPcb new file mode 100644 index 0000000..fb0198f --- /dev/null +++ b/熔体流速仪.PrjPcb @@ -0,0 +1,1229 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ReleaseVaultGUID= +ReleaseVaultName= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=1 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Default Configuration +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=0 +PowerPortNamesTakePriority=0 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +OutputPath= +LogFolderPath= +ManagedProjectGUID= + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Document1] +DocumentPath=MAIN.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=2 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=LQLMOFBF + +[Document2] +DocumentPath=TEMP.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=6 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=SKXLVWWG + +[Document3] +DocumentPath=COMM.SchDoc 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+GenerateClassCluster=0 +DocumentUniqueId=LTCUVCWX + +[Document6] +DocumentPath=OTHER.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=4 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=GCTIPJEG + +[Document7] +DocumentPath=ENCODER.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=VXVXJGEB + +[Document8] +DocumentPath=D:\ad_Lib\Main_Pcb_lib.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=LKDRPLGL + +[Document9] +DocumentPath=D:\ad_Lib\Main_Sch_lib.SCHLIB +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=WWAXDEYM + +[Document10] +DocumentPath=MAIN-BOARD.PcbDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=GMGPBINP + +[Document11] +DocumentPath=.OutJob +AnnotationEnabled=1 +AnnotateStartValue=1 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Prints +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=C Source Print +OutputName2=C Source Prints +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType3=C/C++ Header Print +OutputName3=C/C++ Header Prints +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=C++ Source Print +OutputName4=C++ Source Prints +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=Composite +OutputName5=Composite Drawing +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 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+PageOptions13=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType14=Report Print +OutputName14=Report Prints +OutputDocumentPath14= +OutputVariantName14= +OutputDefault14=0 +PageOptions14=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType15=Schematic Print +OutputName15=Schematic Prints +OutputDocumentPath15=Sheet1.SchDoc +OutputVariantName15= +OutputDefault15=0 +PageOptions15=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +Configuration15_Name1=OutputConfigurationParameter1 +Configuration15_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0 +OutputType16=SimView Print +OutputName16=SimView Prints +OutputDocumentPath16= +OutputVariantName16= +OutputDefault16=0 +PageOptions16=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType17=VHDL Print +OutputName17=VHDL Prints +OutputDocumentPath17= +OutputVariantName17= +OutputDefault17=0 +PageOptions17=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType18=Wave Print +OutputName18=Wave Prints +OutputDocumentPath18= +OutputVariantName18= +OutputDefault18=0 +PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType19=WaveSim Print +OutputName19=WaveSim Prints +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + +[OutputGroup4] +Name=Assembly Outputs +Description= +TargetPrinter=Microsoft Print to PDF +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Assembly +OutputName1=Assembly Drawings +OutputDocumentPath1= +OutputVariantName1=[No Variations] +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=Pick Place +OutputName2=Generates pick and place files +OutputDocumentPath2= +OutputVariantName2=[No Variations] +OutputDefault2=0 +OutputType3=Test Points For Assembly +OutputName3=Test Point Report +OutputDocumentPath3= +OutputVariantName3=[No Variations] +OutputDefault3=0 + +[OutputGroup5] +Name=Fabrication Outputs +Description= +TargetPrinter=Microsoft Print to PDF +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Board Stack Report +OutputName1=Report Board Stack +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=CompositeDrill +OutputName2=Composite Drill Drawing +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType3=Drill +OutputName3=Drill Drawing/Guides +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=Final +OutputName4=Final Artwork Prints +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=Gerber +OutputName5=Gerber Files +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +OutputType6=Gerber X2 +OutputName6=Gerber X2 Files +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=IPC2581 +OutputName7=IPC-2581 Files +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=Mask +OutputName8=Solder/Paste Mask Prints +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +PageOptions8=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType9=NC Drill +OutputName9=NC Drill Files +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=ODB +OutputName10=ODB++ Files +OutputDocumentPath10= +OutputVariantName10=[No Variations] +OutputDefault10=0 +OutputType11=Plane +OutputName11=Power-Plane Prints +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType12=Test Points +OutputName12=Test Point Report +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 + +[OutputGroup6] +Name=Report Outputs +Description= +TargetPrinter=Microsoft Print to PDF +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=BOM_PartType +OutputName1=Bill of Materials +OutputDocumentPath1= +OutputVariantName1=[No Variations] +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=ComponentCrossReference +OutputName2=Component Cross Reference Report +OutputDocumentPath2= +OutputVariantName2=[No Variations] +OutputDefault2=0 +OutputType3=ReportHierarchy +OutputName3=Report Project Hierarchy +OutputDocumentPath3= +OutputVariantName3=[No Variations] +OutputDefault3=0 +OutputType4=Script +OutputName4=Script Output +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 +OutputType5=SimpleBOM +OutputName5=Simple BOM +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +OutputType6=SinglePinNetReporter +OutputName6=Report Single Pin Nets +OutputDocumentPath6= +OutputVariantName6=[No Variations] +OutputDefault6=0 + +[OutputGroup7] +Name=Other Outputs +Description= +TargetPrinter=Microsoft Print to PDF +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Text Print +OutputName1=Text Print +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=Text Print +OutputName2=Text Print +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 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