MoistureSoftware/Source/USARTHMI.c

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5.0 KiB
C
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2025-09-28 09:17:22 +00:00
#include "BSP.H"
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*******************************************************************************/
osMutexId( USART_Mutex_ID );
void BIOS_USART1_Init(void)
{
USART_TypeDef *USARTx = USART1;
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);
// USART1 configured as follow:
// - BaudRate = 9600 baud
// - Word Length = 8 Bits
// - One Stop Bit
// - No parity
// - Hardware flow control disabled (RTS and CTS signals)
// - Receive disable and transmit enabled
USARTx->BRR = SystemCoreClock / 115200; /* 115200 bps */
USARTx->CR1 = 0x0000u; /* 1 start bit, 8 data bits */
USARTx->CR2 = 0x0000u; /* 1 stop bit */
USARTx->CR3 = 0x0000u; /* no flow control */
SET_BIT(USARTx->CR1, USART_CR1_TE); /* enable TX */
SET_BIT(USARTx->CR1, USART_CR1_RE); /* enable TX */
SET_BIT(USARTx->CR1, USART_CR1_UE); /* Enable USARTx */
USART_ITConfig(USART1, /*USART_IT_TXE |*/ USART_IT_RXNE, ENABLE);
/* Configure USART1 Rx (PA10) as input floating */
/* Configure USART1 Tx (PA9) as alternate function push-pull */
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);
MODIFY_REG(GPIOA->CRH, 0x00000FF0u, 0x000004B0u);
NVIC_EnableIRQ(USART1_IRQn);
osMutexDef( USART_Mutex );
USART_Mutex_ID = osMutexCreate( osMutex( USART_Mutex ) );
}
/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*******************************************************************************/
void UART1_Send(uint8_t OutByte)
{
USART_TypeDef *USARTx = USART1;
while (!(READ_BIT(USARTx->SR, USART_SR_TXE))) {
delay_us(100);
}
USARTx->DR = OutByte;
}
/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
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*******************************************************************************/
uint8_t UART1_Received(void)
{
USART_TypeDef *USARTx = USART1;
while (!(READ_BIT(USARTx->SR, USART_SR_RXNE))) {
;
}
return USARTx->DR;
}
uint8_t DataInbuf[100u];
static volatile uint16_t UsartDelayTime = 0u;
static _Bool RxFlag = false;
static uint8_t Datai = 0u;
_Bool RxUpToDate = false;
/******************************** <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> *************************************
*
*******************************************************************************/
void DataPrint(uint8_t *buffer, uint8_t lenth)
{
uint8_t i;
osMutexWait(USART_Mutex_ID,500000);
// CLEAR_BIT(USART1->CR1, USART_CR1_RXNEIE);
for (i = 0u; i < lenth; i++) {
UART1_Send(*buffer++);
while (!READ_BIT(USART1->SR, USART_SR_TC))
delay_us(50u);
}
// SET_BIT(USART1->CR1, USART_CR1_RXNEIE);
osMutexRelease(USART_Mutex_ID);
}
void DataRec(uint8_t *buffer)
{
*buffer = UART1_Received();
}
void USART1_IRQHandler(void)
{
if (READ_BIT(USART1->SR, USART_SR_ORE) != RESET) {
DataInbuf[0] = (unsigned char)(USART1->SR);
DataInbuf[1] = (unsigned char)(USART1->DR);
}
if (READ_BIT(USART1->SR, USART_SR_RXNE)) {
if (!RxFlag) {
Datai = 0u;
RxFlag = true;
TIM2->CNT = 0u;
UsartDelayTime = 0u;
SET_BIT(TIM2->DIER, TIM_DIER_UIE); //
SET_BIT(TIM2->CR1, TIM_CR1_CEN);
}
TIM2->CNT = 0u;
UsartDelayTime = 0u;
DataRec(DataInbuf + Datai++);
}
}
void BIOS_TIM2_TIMER_Init(void)
{
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN); //
SET_BIT(TIM2->EGR, TIM_EGR_UG); //
TIM2->CR1 = TIM_CR1_ARPE; //
TIM2->PSC = (uint32_t)(SystemCoreClock / 100000u - 1u); //
TIM2->ARR = 100u; //
CLEAR_BIT(TIM2->DIER, TIM_DIER_UIE); //
CLEAR_BIT(TIM2->CR1, TIM_CR1_CEN);
TIM2->CNT = 0u;
NVIC_EnableIRQ(TIM2_IRQn);
}
osSemaphoreId semDataBack;
osSemaphoreDef(semDataBack);
void TIM2_IRQHandler(void)
{
CLEAR_BIT(TIM2->SR, TIM_SR_UIF);
if (RxFlag) {
if (UsartDelayTime++ > 10u) // 1*10ms
{
CLEAR_BIT(TIM2->DIER, TIM_DIER_UIE); //
CLEAR_BIT(TIM2->CR1, TIM_CR1_CEN);
TIM2->CNT = 0u;
UsartDelayTime = 0u;
RxFlag = false;
if ((DataInbuf[0] == 0xA5) && (DataInbuf[Datai - 1] == 0xAA)) //
{
DataInbuf[Datai] = '\0';
osSemaphoreRelease(semDataBack);
}
}
}
}
void USARTHMIInit()
{
semDataBack = osSemaphoreCreate(osSemaphore(semDataBack), 0);
BIOS_TIM2_TIMER_Init();
BIOS_USART1_Init();
}