157 lines
5.7 KiB
C
157 lines
5.7 KiB
C
/* ----------------------------------------------------------------------
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* Copyright (C) 2013 ARM Limited. All rights reserved.
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*
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* $Date: 27. August 2013
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* $Revision: V1.01
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*
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* Project: DMA Driver definitions for ST STM32F10x
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* -------------------------------------------------------------------- */
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#ifndef __DMA_STM32F10X_H
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#define __DMA_STM32F10X_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "stm32f10x.h"
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#if defined (__CC_ARM)
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#define __FORCE_INLINE static __forceinline
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#else
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#define __FORCE_INLINE __STATIC_INLINE
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#endif
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#define _DMAx_CHANNELy(x, y) DMA##x##_Channel##y
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#define DMAx_CHANNELy(x, y) _DMAx_CHANNELy(x, y)
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#define _DMAx_CHANNELy_EVENT(x, y) DMA##x##_Channel##y##_Event
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#define DMAx_CHANNELy_EVENT(x, y) _DMAx_CHANNELy_EVENT(x, y)
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// DMA channel Interrupt Flags
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#define DMA_CHANNEL_GLOBAL_INTERRUPT (1UL<<0)
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#define DMA_CHANNEL_TRANSFER_COMPLETE (1UL<<1)
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#define DMA_CHANNEL_HALF_TRANSFER (1UL<<2)
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#define DMA_CHANNEL_TRANSFER_ERROR (1UL<<3)
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#define DMA_CHANNEL_FLAGS (DMA_CHANNEL_TRANSFER_ERROR | \
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DMA_CHANNEL_HALF_TRANSFER | \
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DMA_CHANNEL_TRANSFER_COMPLETE | \
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DMA_CHANNEL_GLOBAL_INTERRUPT)
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// DMA channel Configuration Register definitions
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#define DMA_TRANSFER_ERROR_INTERRUPT DMA_CCR1_TEIE
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#define DMA_HALF_TRANSFER_INTERRUPT DMA_CCR1_HTIE
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#define DMA_TRANSFER_COMPLETE_INTERRUPT DMA_CCR1_TCIE
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#define DMA_PERIPHERAL_TO_MEMORY 0
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#define DMA_READ_MEMORY DMA_CCR1_DIR
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#define DMA_MEMORY_TO_MEMORY DMA_CCR1_MEM2MEM
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#define DMA_CIRCULAR_MODE DMA_CCR1_CIRC
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#define DMA_PERIPHERAL_INCREMENT DMA_CCR1_PINC
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#define DMA_MEMORY_INCREMENT DMA_CCR1_MINC
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#define DMA_PERIPHERAL_DATA_8BIT 0
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#define DMA_PERIPHERAL_DATA_16BIT DMA_CCR1_PSIZE_0
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#define DMA_PERIPHERAL_DATA_32BIT DMA_CCR1_PSIZE_1
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#define DMA_MEMORY_DATA_8BIT 0
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#define DMA_MEMORY_DATA_16BIT DMA_CCR1_MSIZE_0
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#define DMA_MEMORY_DATA_32BIT DMA_CCR1_MSIZE_1
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#define DMA_PRIORITY_POS 12
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#define DMA_PRIORITY_MASK DMA_CCR1_PL
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#define DMA_CHANNEL_EN DMA_CCR1_EN
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// DMA Information definitions
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typedef struct _DMA_INFO {
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DMA_Channel_TypeDef *ptr_channel;
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uint8_t dma;
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uint8_t channel;
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uint8_t priority;
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} DMA_INFO;
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/// DMA Functions
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/**
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\fn void DMA_ChannelInitialize (uint32_t dma, uint32_t channel)
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\brief Initialize DMA Channel
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\param[in] dma DMA number
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\param[in] channel DMA channel number
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*/
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extern void DMA_ChannelInitialize (uint32_t dma, uint32_t channel);
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/**
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\fn void DMA_ChannelUninitialize (uint32_t dma, uint32_t channel)
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\brief Uninitialize DMA channel
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\param[in] dma DMA number
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\param[in] channel DMA channel number
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*/
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extern void DMA_ChannelUninitialize (uint32_t dma, uint32_t channel);
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/**
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\fn void DMA_ChannelConfigure (DMA_Channel_TypeDef *DMA_Channel,
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uint32_t ccr,
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uint32_t cpar,
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uint32_t cmar,
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uint32_t cndtr);
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\brief Configure DMA channel for next transfer
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\param[in] DMA_Channel specifies pointer to DMA channel peripheral
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\param[in] ccr Configuration register value
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\param[in] cpar Peripheral address register value
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\param[in] cmar Memory address register value
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\param[in] cndtr Number of data transfer register value
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*/
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__FORCE_INLINE void DMA_ChannelConfigure (DMA_Channel_TypeDef *DMA_Channel,
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uint32_t ccr,
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uint32_t cpar,
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uint32_t cmar,
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uint32_t cndtr) {
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DMA_Channel->CCR = ccr;
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DMA_Channel->CPAR = cpar;
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DMA_Channel->CMAR = cmar;
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DMA_Channel->CNDTR = cndtr;
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}
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/**
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\fn void DMA_ChannelEnable (DMA_Channel_TypeDef *DMA_Channel)
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\brief Enable channel and/or start memory to memory transfer
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\param[in] DMA_Channel Pointer to DMA channel peripheral
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*/
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__FORCE_INLINE void DMA_ChannelEnable (DMA_Channel_TypeDef *DMA_Channel) {
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DMA_Channel->CCR |= DMA_CHANNEL_EN;
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}
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/**
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\fn void DMA_ChannelDisable (DMA_Channel_TypeDef *DMA_Channel)
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\brief Disable channel and/or stop memory to memory transfer
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\param[in] DMA_Channel Pointer to DMA channel peripheral
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*/
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__FORCE_INLINE void DMA_ChannelDisable (DMA_Channel_TypeDef *DMA_Channel) {
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DMA_Channel->CCR &= ~DMA_CHANNEL_EN;
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}
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/**
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\fn bool DMA_ChannelStatus (DMA_Channel_TypeDef *DMA_Channel)
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\brief Check if channel is enabled or disabled
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\param[in] DMA_Channel Pointer to DMA channel peripheral
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\return Channel Status
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- \b true Enabled
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- \b false Disabled
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*/
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__FORCE_INLINE bool DMA_ChannelStatus (DMA_Channel_TypeDef *DMA_Channel) {
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return (DMA_Channel->CCR & DMA_CHANNEL_EN) ? true : false;
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}
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/**
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\fn uint32_t DMA_ChannelTransferItemCount (DMA_Channel_TypeDef *DMA_Channel)
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\brief Get number of data items to transfer
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\param[in] DMA_channel Pointer to DMA channel peripheral
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\return Number of data items to transfer
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*/
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__FORCE_INLINE uint32_t DMA_ChannelTransferItemCount (DMA_Channel_TypeDef *DMA_Channel) {
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return DMA_Channel->CNDTR;
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}
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#endif /* __DMA_STM32F10X_H */
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