199 lines
7.7 KiB
C
199 lines
7.7 KiB
C
/* -----------------------------------------------------------------------------
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* Copyright (c) 2013-2015 ARM Ltd.
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*
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* This software is provided 'as-is', without any express or implied warranty.
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* In no event will the authors be held liable for any damages arising from
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* the use of this software. Permission is granted to anyone to use this
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* software for any purpose, including commercial applications, and to alter
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* it and redistribute it freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software in
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* a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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*
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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*
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*
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* $Date: 22. September 2015
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* $Revision: V2.0
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*
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* Project: I2C Driver definitions for STMicroelectronics STM32F10x
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* -------------------------------------------------------------------------- */
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#ifndef __I2C_STM32F10X_H
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#define __I2C_STM32F10X_H
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include "stm32f10x.h"
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#include "GPIO_STM32F10x.h"
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#include "DMA_STM32F10x.h"
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#include "Driver_I2C.h"
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#include "RTE_Components.h"
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#include "RTE_Device.h"
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#if ((defined(RTE_Drivers_I2C1) || \
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defined(RTE_Drivers_I2C2)) \
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&& (RTE_I2C1 == 0) \
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&& (RTE_I2C2 == 0))
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#error "I2C not configured in RTE_Device.h!"
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#endif
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#define RCC_APB_I2C1_MASK RCC_APB1ENR_I2C1EN /* same for Clock/Reset */
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#define RCC_APB_I2C2_MASK RCC_APB1ENR_I2C2EN /* same for Clock/Reset */
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#define RCC_APB_I2C3_MASK RCC_APB1ENR_I2C3EN /* same for Clock/Reset */
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/* I2C1 configuration definitions */
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#if defined (RTE_I2C1) && (RTE_I2C1 == 1)
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#if (((RTE_I2C1_RX_DMA != 0) && (RTE_I2C1_TX_DMA == 0)) || \
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((RTE_I2C1_RX_DMA == 0) && (RTE_I2C1_TX_DMA != 0)))
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#error "I2C1 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h!"
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#endif
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#define USE_I2C1
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#if (RTE_I2C1_RX_DMA == 1) && (RTE_I2C1_TX_DMA == 1)
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#define USE_I2C1_DMA
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/* Rx channel */
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#define I2C1_RX_DMA_Instance DMAx_CHANNELy(RTE_I2C1_RX_DMA_NUMBER, RTE_I2C1_RX_DMA_CHANNEL)
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#define I2C1_RX_DMA_Number RTE_I2C1_RX_DMA_NUMBER
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#define I2C1_RX_DMA_Channel RTE_I2C1_RX_DMA_CHANNEL
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#define I2C1_RX_DMA_Priority RTE_I2C1_RX_DMA_PRIORITY
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#define I2C1_RX_DMA_Handler DMAx_CHANNELy_EVENT (RTE_I2C1_RX_DMA_NUMBER, RTE_I2C1_RX_DMA_CHANNEL)
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/* Tx channel */
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#define I2C1_TX_DMA_Instance DMAx_CHANNELy(RTE_I2C1_TX_DMA_NUMBER, RTE_I2C1_TX_DMA_CHANNEL)
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#define I2C1_TX_DMA_Number RTE_I2C1_TX_DMA_NUMBER
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#define I2C1_TX_DMA_Channel RTE_I2C1_TX_DMA_CHANNEL
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#define I2C1_TX_DMA_Priority RTE_I2C1_TX_DMA_PRIORITY
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#define I2C1_TX_DMA_Handler DMAx_CHANNELy_EVENT (RTE_I2C1_TX_DMA_NUMBER, RTE_I2C1_TX_DMA_CHANNEL)
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#endif
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#define I2C1_SCL_GPIOx RTE_I2C1_SCL_PORT
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#define I2C1_SCL_GPIO_Pin RTE_I2C1_SCL_BIT
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#define I2C1_SDA_GPIOx RTE_I2C1_SDA_PORT
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#define I2C1_SDA_GPIO_Pin RTE_I2C1_SDA_BIT
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#define I2C1_AF_REMAP RTE_I2C1_AF_REMAP
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#endif
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/* I2C2 configuration definitions */
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#if defined (RTE_I2C2) && (RTE_I2C2 == 1)
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#if !defined(I2C2)
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#error "I2C2 not available for selected device!"
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#endif
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#if (((RTE_I2C2_RX_DMA != 0) && (RTE_I2C2_TX_DMA == 0)) || \
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((RTE_I2C2_RX_DMA == 0) && (RTE_I2C2_TX_DMA != 0)))
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#error "I2C2 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h!"
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#endif
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#define USE_I2C2
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#if (RTE_I2C2_RX_DMA == 1) && (RTE_I2C2_TX_DMA == 1)
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#define USE_I2C2_DMA
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/* Rx channel */
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#define I2C2_RX_DMA_Instance DMAx_CHANNELy(RTE_I2C2_RX_DMA_NUMBER, RTE_I2C2_RX_DMA_CHANNEL)
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#define I2C2_RX_DMA_Number RTE_I2C2_RX_DMA_NUMBER
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#define I2C2_RX_DMA_Channel RTE_I2C2_RX_DMA_CHANNEL
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#define I2C2_RX_DMA_Priority RTE_I2C2_RX_DMA_PRIORITY
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#define I2C2_RX_DMA_Handler DMAx_CHANNELy_EVENT (RTE_I2C2_RX_DMA_NUMBER, RTE_I2C2_RX_DMA_CHANNEL)
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/* Tx channel */
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#define I2C2_TX_DMA_Instance DMAx_CHANNELy(RTE_I2C2_TX_DMA_NUMBER, RTE_I2C2_TX_DMA_CHANNEL)
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#define I2C2_TX_DMA_Number RTE_I2C2_TX_DMA_NUMBER
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#define I2C2_TX_DMA_Channel RTE_I2C2_TX_DMA_CHANNEL
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#define I2C2_TX_DMA_Priority RTE_I2C2_TX_DMA_PRIORITY
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#define I2C2_TX_DMA_Handler DMAx_CHANNELy_EVENT (RTE_I2C2_TX_DMA_NUMBER, RTE_I2C2_TX_DMA_CHANNEL)
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#endif
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#define I2C2_SCL_GPIOx RTE_I2C2_SCL_PORT
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#define I2C2_SCL_GPIO_Pin RTE_I2C2_SCL_BIT
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#define I2C2_SDA_GPIOx RTE_I2C2_SDA_PORT
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#define I2C2_SDA_GPIO_Pin RTE_I2C2_SDA_BIT
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#define I2C2_AF_REMAP RTE_I2C2_AF_REMAP
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#endif
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/* Current driver status flag definition */
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#define I2C_INIT ((uint8_t)0x01) // I2C initialized
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#define I2C_POWER ((uint8_t)0x02) // I2C powered on
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#define I2C_SETUP ((uint8_t)0x04) // I2C configured
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/* Transfer status flags definitions */
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#define XFER_CTRL_XPENDING ((uint8_t)0x01) // Transfer pending
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#define XFER_CTRL_RSTART ((uint8_t)0x02) // Generate repeated start and readdress
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#define XFER_CTRL_ADDR_DONE ((uint8_t)0x04) // Addressing done
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#define XFER_CTRL_DMA_DONE ((uint8_t)0x08) // DMA transfer done
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#define XFER_CTRL_WAIT_BTF ((uint8_t)0x10) // Wait for byte transfer finished
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#define XFER_CTRL_XACTIVE ((uint8_t)0x20) // Transfer active
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/* DMA Information definitions */
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typedef struct _I2C_DMA {
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DMA_Channel_TypeDef *reg; // DMA register interface
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uint8_t dma_num; // DMA number
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uint8_t channel; // Channel number
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uint8_t priority; // Channel priority
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} const I2C_DMA;
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/* I2C Input/Output Configuration */
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typedef const struct _I2C_IO {
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GPIO_TypeDef *scl_port; // SCL IO Port
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GPIO_TypeDef *sda_port; // SDA IO Port
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uint16_t scl_pin; // SCL IO Pin
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uint16_t sda_pin; // SDA IO Pin
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AFIO_REMAP remap;
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} I2C_IO;
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/* I2C Transfer Information (Run-Time) */
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typedef struct _I2C_TRANSFER_INFO {
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uint32_t num; // Number of data to transfer
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uint32_t cnt; // Data transfer counter
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uint8_t *data; // Data pointer
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uint16_t addr; // Device address
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uint8_t ctrl; // Transfer control flags
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} I2C_TRANSFER_INFO;
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/* I2C Information (Run-Time) */
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typedef struct _I2C_INFO {
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ARM_I2C_SignalEvent_t cb_event; // Event Callback
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ARM_I2C_STATUS status; // Status flags
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I2C_TRANSFER_INFO xfer; // Transfer information
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uint8_t flags; // Current I2C state flags
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} I2C_INFO;
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/* I2C Resources definition */
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typedef struct {
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I2C_TypeDef *reg; // I2C peripheral register interface
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I2C_DMA *dma_rx; // I2C DMA Configuration
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I2C_DMA *dma_tx; // I2C DMA Configuration
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I2C_IO io; // I2C Input/Output pins
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IRQn_Type ev_irq_num; // I2C Event IRQ Number
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IRQn_Type er_irq_num; // I2C Error IRQ Number
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uint32_t apb_mask; // APB Clock/Reset register mask
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I2C_INFO *info; // Run-Time information
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} const I2C_RESOURCES;
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#endif /* __I2C_STM32F10X_H */
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