333 lines
12 KiB
C
333 lines
12 KiB
C
/* -----------------------------------------------------------------------------
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* Copyright (c) 2013-2015 ARM Ltd.
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*
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* This software is provided 'as-is', without any express or implied warranty.
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* In no event will the authors be held liable for any damages arising from
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* the use of this software. Permission is granted to anyone to use this
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* software for any purpose, including commercial applications, and to alter
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* it and redistribute it freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software in
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* a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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*
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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*
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*
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* $Date: 29. August 2016
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* $Revision: V2.2
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*
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* Project: SPI Driver definitions for STMicroelectronics STM32F10x
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* -------------------------------------------------------------------------- */
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#ifndef __SPI_STM32F10X_H
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#define __SPI_STM32F10X_H
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include "stm32f10x.h"
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#include "GPIO_STM32F10x.h"
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#include "DMA_STM32F10x.h"
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#include "Driver_SPI.h"
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#include "RTE_Components.h"
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#include "RTE_Device.h"
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#if ((defined(RTE_Drivers_SPI1) || \
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defined(RTE_Drivers_SPI2) || \
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defined(RTE_Drivers_SPI3)) \
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&& (RTE_SPI1 == 0) \
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&& (RTE_SPI2 == 0) \
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&& (RTE_SPI3 == 0))
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#error "SPI not configured in RTE_Device.h!"
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#endif
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// SPI1 configuration definitions
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#if (RTE_SPI1 == 1)
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#define MX_SPI1
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#if (RTE_SPI1_RX_DMA == 1)
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#define MX_SPI1_RX_DMA_Instance DMAx_CHANNELy(RTE_SPI1_RX_DMA_NUMBER, RTE_SPI1_RX_DMA_CHANNEL)
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#define MX_SPI1_RX_DMA_Number RTE_SPI1_RX_DMA_NUMBER
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#define MX_SPI1_RX_DMA_Channel RTE_SPI1_RX_DMA_CHANNEL
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#define MX_SPI1_RX_DMA_Priority RTE_SPI1_RX_DMA_PRIORITY
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#define SPI1_RX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI1_RX_DMA_NUMBER, RTE_SPI1_RX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI1_TX_DMA == 1)
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#define MX_SPI1_TX_DMA_Instance DMAx_CHANNELy(RTE_SPI1_TX_DMA_NUMBER, RTE_SPI1_TX_DMA_CHANNEL)
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#define MX_SPI1_TX_DMA_Number RTE_SPI1_TX_DMA_NUMBER
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#define MX_SPI1_TX_DMA_Channel RTE_SPI1_TX_DMA_CHANNEL
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#define MX_SPI1_TX_DMA_Priority RTE_SPI1_TX_DMA_PRIORITY
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#define SPI1_TX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI1_TX_DMA_NUMBER, RTE_SPI1_TX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI1_MISO == 1)
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#define MX_SPI1_MISO_Pin 1U
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#define MX_SPI1_MISO_GPIOx RTE_SPI1_MISO_PORT
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#define MX_SPI1_MISO_GPIO_Pin RTE_SPI1_MISO_BIT
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#endif
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#if (RTE_SPI1_MOSI == 1)
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#define MX_SPI1_MOSI_Pin 1U
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#define MX_SPI1_MOSI_GPIOx RTE_SPI1_MOSI_PORT
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#define MX_SPI1_MOSI_GPIO_Pin RTE_SPI1_MOSI_BIT
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#endif
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#define MX_SPI1_SCK_Pin 1U
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#define MX_SPI1_SCK_GPIOx RTE_SPI1_SCK_PORT
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#define MX_SPI1_SCK_GPIO_Pin RTE_SPI1_SCK_BIT
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#if (RTE_SPI1_NSS_PIN == 1)
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#define MX_SPI1_NSS_Pin 1U
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#define MX_SPI1_NSS_GPIOx RTE_SPI1_NSS_PORT
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#define MX_SPI1_NSS_GPIO_Pin RTE_SPI1_NSS_BIT
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#endif
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#define MX_SPI1_REMAP_DEF AFIO_SPI1_NO_REMAP
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#define MX_SPI1_REMAP RTE_SPI1_AF_REMAP
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#endif
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// SPI2 configuration definitions
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#if (RTE_SPI2 == 1)
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#if defined (STM32F10X_LD) || defined (STM32F10X_LD_VL)
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#error "SPI2 not available for selected device!"
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#endif
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#define MX_SPI2
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#if (RTE_SPI2_RX_DMA == 1)
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#define MX_SPI2_RX_DMA_Instance DMAx_CHANNELy(RTE_SPI2_RX_DMA_NUMBER, RTE_SPI2_RX_DMA_CHANNEL)
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#define MX_SPI2_RX_DMA_Number RTE_SPI2_RX_DMA_NUMBER
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#define MX_SPI2_RX_DMA_Channel RTE_SPI2_RX_DMA_CHANNEL
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#define MX_SPI2_RX_DMA_Priority RTE_SPI2_RX_DMA_PRIORITY
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#define SPI2_RX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI2_RX_DMA_NUMBER, RTE_SPI2_RX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI2_TX_DMA == 1)
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#define MX_SPI2_TX_DMA_Instance DMAx_CHANNELy(RTE_SPI2_TX_DMA_NUMBER, RTE_SPI2_TX_DMA_CHANNEL)
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#define MX_SPI2_TX_DMA_Number RTE_SPI2_TX_DMA_NUMBER
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#define MX_SPI2_TX_DMA_Channel RTE_SPI2_TX_DMA_CHANNEL
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#define MX_SPI2_TX_DMA_Priority RTE_SPI2_TX_DMA_PRIORITY
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#define SPI2_TX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI2_TX_DMA_NUMBER, RTE_SPI2_TX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI2_MISO == 1)
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#define MX_SPI2_MISO_Pin 1U
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#define MX_SPI2_MISO_GPIOx RTE_SPI2_MISO_PORT
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#define MX_SPI2_MISO_GPIO_Pin RTE_SPI2_MISO_BIT
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#endif
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#if (RTE_SPI2_MOSI == 1)
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#define MX_SPI2_MOSI_Pin 1U
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#define MX_SPI2_MOSI_GPIOx RTE_SPI2_MOSI_PORT
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#define MX_SPI2_MOSI_GPIO_Pin RTE_SPI2_MOSI_BIT
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#endif
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#define MX_SPI2_SCK_Pin 1U
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#define MX_SPI2_SCK_GPIOx RTE_SPI2_SCK_PORT
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#define MX_SPI2_SCK_GPIO_Pin RTE_SPI2_SCK_BIT
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#if (RTE_SPI2_NSS_PIN == 1)
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#define MX_SPI2_NSS_Pin 1U
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#define MX_SPI2_NSS_GPIOx RTE_SPI2_NSS_PORT
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#define MX_SPI2_NSS_GPIO_Pin RTE_SPI2_NSS_BIT
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#endif
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#define MX_SPI2_REMAP_DEF AFIO_UNAVAILABLE_REMAP
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#define MX_SPI2_REMAP AFIO_UNAVAILABLE_REMAP
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#endif
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// SPI3 configuration definitions
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#if (RTE_SPI3 == 1)
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#if !defined(STM32F10X_HD) && !defined(STM32F10X_CL) && !defined(STM32F10X_XL) && !defined(STM32F10X_HD_VL)
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#error "SPI3 is not available for selected device!"
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#endif
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#define MX_SPI3
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#if (RTE_SPI3_RX_DMA == 1)
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#define MX_SPI3_RX_DMA_Instance DMAx_CHANNELy(RTE_SPI3_RX_DMA_NUMBER, RTE_SPI3_RX_DMA_CHANNEL)
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#define MX_SPI3_RX_DMA_Number RTE_SPI3_RX_DMA_NUMBER
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#define MX_SPI3_RX_DMA_Channel RTE_SPI3_RX_DMA_CHANNEL
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#define MX_SPI3_RX_DMA_Priority RTE_SPI3_RX_DMA_PRIORITY
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#define SPI3_RX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI3_RX_DMA_NUMBER, RTE_SPI3_RX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI3_TX_DMA == 1)
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#define MX_SPI3_TX_DMA_Instance DMAx_CHANNELy(RTE_SPI3_TX_DMA_NUMBER, RTE_SPI3_TX_DMA_CHANNEL)
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#define MX_SPI3_TX_DMA_Number RTE_SPI3_TX_DMA_NUMBER
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#define MX_SPI3_TX_DMA_Channel RTE_SPI3_TX_DMA_CHANNEL
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#define MX_SPI3_TX_DMA_Priority RTE_SPI3_TX_DMA_PRIORITY
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#define SPI3_TX_DMA_Handler DMAx_CHANNELy_EVENT(RTE_SPI3_TX_DMA_NUMBER, RTE_SPI3_TX_DMA_CHANNEL)
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#endif
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#if (RTE_SPI3_MISO == 1)
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#define MX_SPI3_MISO_Pin 1U
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#define MX_SPI3_MISO_GPIOx RTE_SPI3_MISO_PORT
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#define MX_SPI3_MISO_GPIO_Pin RTE_SPI3_MISO_BIT
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#endif
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#if (RTE_SPI3_MOSI == 1)
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#define MX_SPI3_MOSI_Pin 1U
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#define MX_SPI3_MOSI_GPIOx RTE_SPI3_MOSI_PORT
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#define MX_SPI3_MOSI_GPIO_Pin RTE_SPI3_MOSI_BIT
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#endif
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#define MX_SPI3_SCK_Pin 1U
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#define MX_SPI3_SCK_GPIOx RTE_SPI3_SCK_PORT
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#define MX_SPI3_SCK_GPIO_Pin RTE_SPI3_SCK_BIT
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#if (RTE_SPI3_NSS_PIN == 1)
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#define MX_SPI3_NSS_Pin 1U
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#define MX_SPI3_NSS_GPIOx RTE_SPI3_NSS_PORT
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#define MX_SPI3_NSS_GPIO_Pin RTE_SPI3_NSS_BIT
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#endif
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#if defined(STM32F10X_CL)
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// SPI3 remap is available only in connectivity line devices
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#define MX_SPI3_REMAP_DEF AFIO_SPI3_NO_REMAP
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#define MX_SPI3_REMAP RTE_SPI3_AF_REMAP
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#else
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#if (RTE_SPI3_REMAP != 0)
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#error "SPI3 remap is available only in connectivity line devices!"
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#endif
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#define MX_SPI3_REMAP_DEF AFIO_UNAVAILABLE_REMAP
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#define MX_SPI3_REMAP AFIO_UNAVAILABLE_REMAP
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#endif
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#endif
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#ifdef MX_SPI1
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#if (defined(MX_SPI1_RX_DMA_Instance) || defined(MX_SPI1_TX_DMA_Instance))
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#ifndef MX_SPI1_RX_DMA_Instance
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#error "SPI1 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#ifndef MX_SPI1_TX_DMA_Instance
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#error "SPI1 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#endif
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#endif
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#ifdef MX_SPI2
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#if (defined(MX_SPI2_RX_DMA_Instance) || defined(MX_SPI2_TX_DMA_Instance))
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#ifndef MX_SPI2_RX_DMA_Instance
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#error "SPI2 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#ifndef MX_SPI2_TX_DMA_Instance
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#error "SPI2 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#endif
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#endif
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#ifdef MX_SPI3
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#if (defined(MX_SPI3_RX_DMA_Instance) || defined(MX_SPI3_TX_DMA_Instance))
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#ifndef MX_SPI3_RX_DMA_Instance
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#error "SPI3 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#ifndef MX_SPI3_TX_DMA_Instance
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#error "SPI3 using DMA requires Rx and Tx DMA channel enabled in RTE_Device.h or MX_Device.h!"
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#endif
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#endif
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#endif
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#if ((defined(MX_SPI1) && defined(MX_SPI1_RX_DMA_Instance)) || \
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(defined(MX_SPI2) && defined(MX_SPI2_RX_DMA_Instance)) || \
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(defined(MX_SPI3) && defined(MX_SPI3_RX_DMA_Instance)))
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#define __SPI_DMA_RX
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#endif
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#if ((defined(MX_SPI1) && defined(MX_SPI1_TX_DMA_Instance)) || \
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(defined(MX_SPI2) && defined(MX_SPI2_TX_DMA_Instance)) || \
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(defined(MX_SPI3) && defined(MX_SPI3_TX_DMA_Instance)))
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#define __SPI_DMA_TX
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#endif
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#if (defined(__SPI_DMA_RX) && defined(__SPI_DMA_TX))
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#define __SPI_DMA
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#endif
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// Current driver status flag definition
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#define SPI_INITIALIZED ((uint8_t)(1U)) // SPI initialized
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#define SPI_POWERED ((uint8_t)(1U << 1)) // SPI powered on
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#define SPI_CONFIGURED ((uint8_t)(1U << 2)) // SPI configured
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#define SPI_DATA_LOST ((uint8_t)(1U << 3)) // SPI data lost occurred
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#define SPI_MODE_FAULT ((uint8_t)(1U << 4)) // SPI mode fault occurred
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// SPI DMA
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typedef struct _SPI_DMA {
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DMA_Channel_TypeDef *instance; // Channel registry interface
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uint8_t dma_num; // DMA number
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uint8_t ch_num; // Channel number
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uint8_t priority; // Channel priority
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} SPI_DMA;
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// SPI pin
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typedef const struct _SPI_PIN {
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GPIO_TypeDef *port; // Port
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uint32_t pin; // Pin
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} SPI_PIN;
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// SPI Input/Output Configuration
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typedef const struct _SPI_IO {
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SPI_PIN *mosi; // Pointer to MOSI pin configuration
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SPI_PIN *miso; // Pointer to MISO pin configuration
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SPI_PIN *nss; // Pointer to NSS pin configuration
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SPI_PIN *sck; // Pointer to SCK pin configuration
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AFIO_REMAP afio_def; // Default pin remapping setting
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AFIO_REMAP afio; // Pin remapping information
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} SPI_IO;
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typedef struct _SPI_STATUS {
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uint8_t busy; // Transmitter/Receiver busy flag
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uint8_t data_lost; // Data lost: Receive overflow / Transmit underflow (cleared on start of transfer operation)
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uint8_t mode_fault; // Mode fault detected; optional (cleared on start of transfer operation)
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} SPI_STATUS;
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// SPI Information (Run-time)
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typedef struct _SPI_INFO {
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ARM_SPI_SignalEvent_t cb_event; // Event Callback
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SPI_STATUS status; // Status flags
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uint8_t state; // Current SPI state
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uint32_t mode; // Current SPI mode
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} SPI_INFO;
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// SPI Transfer Information (Run-Time)
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typedef struct _SPI_TRANSFER_INFO {
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uint32_t num; // Total number of transfers
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uint8_t *rx_buf; // Pointer to in data buffer
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uint8_t *tx_buf; // Pointer to out data buffer
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uint32_t rx_cnt; // Number of data received
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uint32_t tx_cnt; // Number of data sent
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uint32_t dump_val; // Variable for dumping DMA data
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uint16_t def_val; // Default transfer value
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} SPI_TRANSFER_INFO;
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// SPI Resources definition
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typedef struct {
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SPI_TypeDef *reg; // SPI peripheral pointer
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uint32_t pclk; // Peripheral clock frequency
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SPI_IO io; // SPI Input/Output pins
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IRQn_Type irq_num; // SPI IRQ Number
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SPI_DMA *rx_dma; // Receive stream register interface
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SPI_DMA *tx_dma; // Transmit stream register interface
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SPI_INFO *info; // Run-Time Information
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SPI_TRANSFER_INFO *xfer; // SPI transfer information
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} SPI_RESOURCES;
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#endif /* __SPI_STM32F10X_H */
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